Fix a DAGCombiner abort on a bitcast from a scalar to a vector.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43470 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index b4299f4ff85394791afc1e1eb8092ae41047146c..b423d68e0f06b8cad9eaec438021cba94e1b1c19 100644 (file)
--- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -4212,7 +4212,8 @@ SDOperand DAGCombiner::visitEXTRACT_VECTOR_ELT(SDNode *N) {
       unsigned NumElts = MVT::getVectorNumElements(VT);
       if (InVec.getOpcode() == ISD::BIT_CONVERT) {
         MVT::ValueType BCVT = InVec.getOperand(0).getValueType();
-        if (NumElts != MVT::getVectorNumElements(BCVT))
+        if (!MVT::isVector(BCVT) ||
+            NumElts != MVT::getVectorNumElements(BCVT))
           return SDOperand();
         InVec = InVec.getOperand(0);
         EVT = MVT::getVectorElementType(BCVT);

diff --git a/test/CodeGen/X86/bitcast-int-to-vector.ll b/test/CodeGen/X86/bitcast-int-to-vector.ll
new file mode 100644 (file)
index 0000000..370bec0
--- /dev/null
+++ b/test/CodeGen/X86/bitcast-int-to-vector.ll
@@ -0,0 +1,10 @@
+; RUN: llvm-as < %s | llc -march=x86
+
+define i1 @foo(i64 %a)
+{
+  %t = bitcast i64 %a to <2 x float>
+  %r = extractelement <2 x float> %t, i32 0
+  %s = extractelement <2 x float> %t, i32 1
+  %b = fcmp uno float %r, %s
+  ret i1 %b
+}