Make ppc64 jit kinda work right. About 2/3 of Olden passes with this,

there are clearly some encoding bugs lurking in there somewhere.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29949 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/PowerPC/PPCJITInfo.cpp b/lib/Target/PowerPC/PPCJITInfo.cpp
index 11942b283c2b0ee60b45d97eceb87cd2310796f3..a3ca3c52f88473f3f8b282564ad8664d43e0dc41 100644 (file)
--- a/lib/Target/PowerPC/PPCJITInfo.cpp
+++ b/lib/Target/PowerPC/PPCJITInfo.cpp
@@ -27,32 +27,50 @@ static TargetJITInfo::JITCompilerFn JITCompilerFunction;
   ((15 << 26) | ((RD) << 21) | ((RS) << 16) | ((IMM16) & 65535))
 #define BUILD_ORI(RD,RS,UIMM16) \
   ((24 << 26) | ((RS) << 21) | ((RD) << 16) | ((UIMM16) & 65535))
+#define BUILD_ORIS(RD,RS,UIMM16) \
+  ((25 << 26) | ((RS) << 21) | ((RD) << 16) | ((UIMM16) & 65535))
+#define BUILD_RLDICR(RD,RS,SH,ME) \
+  ((30 << 26) | ((RS) << 21) | ((RD) << 16) | (((SH) & 31) << 11) | \
+   (((ME) & 63) << 6) | (1 << 3) | (((SH) >> 5) & 1))
 #define BUILD_MTSPR(RS,SPR)      \
   ((31 << 26) | ((RS) << 21) | ((SPR) << 16) | (467 << 1))
 #define BUILD_BCCTRx(BO,BI,LINK) \
   ((19 << 26) | ((BO) << 21) | ((BI) << 16) | (528 << 1) | ((LINK) & 1))
+#define BUILD_B(TARGET, LINK) \
+  ((18 << 26) | (((TARGET) & 0x00FFFFFF) << 2) | ((LINK) & 1))
 
 // Pseudo-ops
 #define BUILD_LIS(RD,IMM16)    BUILD_ADDIS(RD,0,IMM16)
+#define BUILD_SLDI(RD,RS,IMM6) BUILD_RLDICR(RD,RS,IMM6,63-IMM6)
 #define BUILD_MTCTR(RS)        BUILD_MTSPR(RS,9)
 #define BUILD_BCTR(LINK)       BUILD_BCCTRx(20,0,LINK)
 
+static void EmitBranchToAt(uint64_t At, uint64_t To, bool isCall, bool is64Bit){
+  intptr_t Offset = ((intptr_t)To - (intptr_t)At) >> 2;
+  unsigned *AtI = (unsigned*)(intptr_t)At;
 
-static void EmitBranchToAt(void *At, void *To, bool isCall) {
-  intptr_t Addr = (intptr_t)To;
-
-  // FIXME: should special case the short branch case.
-  unsigned *AtI = (unsigned*)At;
-
-  AtI[0] = BUILD_LIS(12, Addr >> 16);   // lis r12, hi16(address)
-  AtI[1] = BUILD_ORI(12, 12, Addr);     // ori r12, r12, low16(address)
-  AtI[2] = BUILD_MTCTR(12);             // mtctr r12
-  AtI[3] = BUILD_BCTR(isCall);          // bctr/bctrl
+  if (Offset >= -(1 << 23) && Offset < (1 << 23)) {   // In range?
+    AtI[0] = BUILD_B(Offset, isCall);     // b/bl target
+  } else if (!is64Bit) {
+    AtI[0] = BUILD_LIS(12, To >> 16);     // lis r12, hi16(address)
+    AtI[1] = BUILD_ORI(12, 12, To);       // ori r12, r12, lo16(address)
+    AtI[2] = BUILD_MTCTR(12);             // mtctr r12
+    AtI[3] = BUILD_BCTR(isCall);          // bctr/bctrl
+  } else {
+    AtI[0] = BUILD_LIS(12, To >> 48);      // lis r12, hi16(address)
+    AtI[1] = BUILD_ORI(12, 12, To >> 32);  // ori r12, r12, lo16(address)
+    AtI[2] = BUILD_SLDI(12, 12, 32);       // sldi r12, r12, 32
+    AtI[3] = BUILD_ORIS(12, 12, To >> 16); // oris r12, r12, hi16(address)
+    AtI[4] = BUILD_ORI(12, 12, To);        // ori r12, r12, lo16(address)
+    AtI[5] = BUILD_MTCTR(12);              // mtctr r12
+    AtI[6] = BUILD_BCTR(isCall);           // bctr/bctrl
+  }
 }
 
 extern "C" void PPC32CompilationCallback();
+extern "C" void PPC64CompilationCallback();
 
-#if defined(__POWERPC__) || defined (__ppc__) || defined(_POWER)
+#if (defined(__POWERPC__) || defined (__ppc__) || defined(_POWER)) && !defined(__ppc64__)
 // CompilationCallback stub - We can't use a C function with inline assembly in
 // it, because we the prolog/epilog inserted by GCC won't work for us.  Instead,
 // write our own wrapper, which does things our way, so we have complete control
@@ -64,6 +82,7 @@ asm(
 "_PPC32CompilationCallback:\n"
     // Make space for 8 ints r[3-10] and 13 doubles f[1-13] and the 
     // FIXME: need to save v[0-19] for altivec?
+    // FIXME: could shrink frame
     // Set up a proper stack frame
     "stwu r1, -208(r1)\n"
     "mflr r0\n"
@@ -87,7 +106,8 @@ asm(
     "mr   r3, r0\n"
     "lwz  r2, 208(r1)\n" // stub's frame
     "lwz  r4, 8(r2)\n" // stub's lr
-    "bl _PPC32CompilationCallbackC\n"
+    "li   r5, 0\n"       // 0 == 32 bit
+    "bl _PPCCompilationCallbackC\n"
     "mtctr r3\n"
     // Restore all int arg registers
     "lwz r10, 204(r1)\n"    "lwz r9,  200(r1)\n"
@@ -115,8 +135,69 @@ void PPC32CompilationCallback() {
 }
 #endif
 
-extern "C" unsigned *PPC32CompilationCallbackC(unsigned *StubCallAddrPlus4,
-                                               unsigned *OrigCallAddrPlus4) {
+#if (defined(__POWERPC__) || defined (__ppc__) || defined(_POWER)) && defined(__ppc64__)
+asm(
+    ".text\n"
+    ".align 2\n"
+    ".globl _PPC64CompilationCallback\n"
+"_PPC64CompilationCallback:\n"
+    // Make space for 8 ints r[3-10] and 13 doubles f[1-13] and the 
+    // FIXME: need to save v[0-19] for altivec?
+    // Set up a proper stack frame
+    "stdu r1, -208(r1)\n"
+    "mflr r0\n"
+    "std r0,  224(r1)\n"
+    // Save all int arg registers
+    "std r10, 200(r1)\n"    "std r9,  192(r1)\n"
+    "std r8,  184(r1)\n"    "std r7,  176(r1)\n"
+    "std r6,  168(r1)\n"    "std r5,  160(r1)\n"
+    "std r4,  152(r1)\n"    "std r3,  144(r1)\n"
+    // Save all call-clobbered FP regs.
+    "stfd f13, 136(r1)\n"   "stfd f12, 128(r1)\n"
+    "stfd f11, 120(r1)\n"   "stfd f10, 112(r1)\n"
+    "stfd f9,  104(r1)\n"   "stfd f8,   96(r1)\n"
+    "stfd f7,   88(r1)\n"   "stfd f6,   80(r1)\n"
+    "stfd f5,   72(r1)\n"   "stfd f4,   64(r1)\n"
+    "stfd f3,   56(r1)\n"   "stfd f2,   48(r1)\n"
+    "stfd f1,   40(r1)\n"
+    // Arguments to Compilation Callback:
+    // r3 - our lr (address of the call instruction in stub plus 4)
+    // r4 - stub's lr (address of instruction that called the stub plus 4)
+    "mr   r3, r0\n"
+    "ld   r2, 208(r1)\n" // stub's frame
+    "ld   r4, 16(r2)\n"  // stub's lr
+    "li   r5, 1\n"       // 1 == 64 bit
+    "bl _PPCCompilationCallbackC\n"
+    "mtctr r3\n"
+    // Restore all int arg registers
+    "ld r10, 200(r1)\n"    "ld r9,  192(r1)\n"
+    "ld r8,  184(r1)\n"    "ld r7,  176(r1)\n"
+    "ld r6,  168(r1)\n"    "ld r5,  160(r1)\n"
+    "ld r4,  152(r1)\n"    "ld r3,  144(r1)\n"
+    // Restore all FP arg registers
+    "lfd f13, 136(r1)\n"    "lfd f12, 128(r1)\n"
+    "lfd f11, 120(r1)\n"    "lfd f10, 112(r1)\n"
+    "lfd f9,  104(r1)\n"    "lfd f8,   96(r1)\n"
+    "lfd f7,   88(r1)\n"    "lfd f6,   80(r1)\n"
+    "lfd f5,   72(r1)\n"    "lfd f4,   64(r1)\n"
+    "lfd f3,   56(r1)\n"    "lfd f2,   48(r1)\n"
+    "lfd f1,   40(r1)\n"
+    // Pop 3 frames off the stack and branch to target
+    "ld  r1, 208(r1)\n"
+    "ld  r2, 16(r1)\n"
+    "mtlr r2\n"
+    "bctr\n"
+    );
+#else
+void PPC64CompilationCallback() {
+  assert(0 && "This is not a power pc, you can't execute this!");
+  abort();
+}
+#endif
+
+extern "C" void *PPCCompilationCallbackC(unsigned *StubCallAddrPlus4,
+                                         unsigned *OrigCallAddrPlus4,
+                                         bool is64Bit) {
   // Adjust the pointer to the address of the call instruction in the stub
   // emitted by emitFunctionStub, rather than the instruction after it.
   unsigned *StubCallAddr = StubCallAddrPlus4 - 1;
@@ -143,17 +224,21 @@ extern "C" unsigned *PPC32CompilationCallbackC(unsigned *StubCallAddrPlus4,
 
   // Assert that we are coming from a stub that was created with our
   // emitFunctionStub.
+  if ((*StubCallAddr >> 26) == 18)
+    StubCallAddr -= 3;
+  else {
   assert((*StubCallAddr >> 26) == 19 && "Call in stub is not indirect!");
-  StubCallAddr -= 6;
+    StubCallAddr -= is64Bit ? 9 : 6;
+  }
 
   // Rewrite the stub with an unconditional branch to the target, for any users
   // who took the address of the stub.
-  EmitBranchToAt(StubCallAddr, Target, false);
+  EmitBranchToAt((intptr_t)StubCallAddr, (intptr_t)Target, false, is64Bit);
 
   // Put the address of the target function to call and the address to return to
   // after calling the target function in a place that is easy to get on the
   // stack after we restore all regs.
-  return (unsigned *)Target;
+  return Target;
 }
 
 
@@ -161,33 +246,46 @@ extern "C" unsigned *PPC32CompilationCallbackC(unsigned *StubCallAddrPlus4,
 TargetJITInfo::LazyResolverFn
 PPCJITInfo::getLazyResolverFunction(JITCompilerFn Fn) {
   JITCompilerFunction = Fn;
-  return PPC32CompilationCallback;
+  return is64Bit ? PPC64CompilationCallback : PPC32CompilationCallback;
 }
 
 void *PPCJITInfo::emitFunctionStub(void *Fn, MachineCodeEmitter &MCE) {
   // If this is just a call to an external function, emit a branch instead of a
   // call.  The code is the same except for one bit of the last instruction.
-  if (Fn != (void*)(intptr_t)PPC32CompilationCallback) {
-    MCE.startFunctionStub(4*4);
-    void *Addr = (void*)(intptr_t)MCE.getCurrentPCValue();
+  if (Fn != (void*)(intptr_t)PPC32CompilationCallback && 
+      Fn != (void*)(intptr_t)PPC64CompilationCallback) {
+    MCE.startFunctionStub(7*4);
+    intptr_t Addr = (intptr_t)MCE.getCurrentPCValue();
+    MCE.emitWordBE(0);
+    MCE.emitWordBE(0);
+    MCE.emitWordBE(0);
     MCE.emitWordBE(0);
     MCE.emitWordBE(0);
     MCE.emitWordBE(0);
     MCE.emitWordBE(0);
-    EmitBranchToAt(Addr, Fn, false);
+    EmitBranchToAt(Addr, (intptr_t)Fn, false, is64Bit);
     return MCE.finishFunctionStub(0);
   }
 
-  MCE.startFunctionStub(4*7);
-  MCE.emitWordBE(0x9421ffe0);     // stwu    r1,-32(r1)
-  MCE.emitWordBE(0x7d6802a6);     // mflr r11
-  MCE.emitWordBE(0x91610028);     // stw r11, 40(r1)
-  void *Addr = (void*)(intptr_t)MCE.getCurrentPCValue();
+  MCE.startFunctionStub(10*4);
+  if (is64Bit) {
+    MCE.emitWordBE(0xf821ffb1);     // stdu r1,-80(r1)
+    MCE.emitWordBE(0x7d6802a6);     // mflr r11
+    MCE.emitWordBE(0xf9610060);     // std r11, 96(r1)
+  } else {
+    MCE.emitWordBE(0x9421ffe0);     // stwu r1,-32(r1)
+    MCE.emitWordBE(0x7d6802a6);     // mflr r11
+    MCE.emitWordBE(0x91610028);     // stw r11, 40(r1)
+  }
+  intptr_t Addr = (intptr_t)MCE.getCurrentPCValue();
+  MCE.emitWordBE(0);
+  MCE.emitWordBE(0);
+  MCE.emitWordBE(0);
   MCE.emitWordBE(0);
   MCE.emitWordBE(0);
   MCE.emitWordBE(0);
   MCE.emitWordBE(0);
-  EmitBranchToAt(Addr, Fn, true/*is call*/);
+  EmitBranchToAt(Addr, (intptr_t)Fn, true, is64Bit);
   return MCE.finishFunctionStub(0);
 }
 
@@ -251,5 +349,5 @@ void PPCJITInfo::relocate(void *Function, MachineRelocation *MR,
 }
 
 void PPCJITInfo::replaceMachineCodeForFunction(void *Old, void *New) {
-  EmitBranchToAt(Old, New, false);
+  EmitBranchToAt((intptr_t)Old, (intptr_t)New, false, is64Bit);
 }

diff --git a/lib/Target/PowerPC/PPCJITInfo.h b/lib/Target/PowerPC/PPCJITInfo.h
index 245cf9ad9023508114982ff754e207d56c6a65e3..61ec4691cb1d2d1d725b7539f4ab3e0a988622bf 100644 (file)
--- a/lib/Target/PowerPC/PPCJITInfo.h
+++ b/lib/Target/PowerPC/PPCJITInfo.h
@@ -22,8 +22,12 @@ namespace llvm {
   class PPCJITInfo : public TargetJITInfo {
   protected:
     PPCTargetMachine &TM;
+    bool is64Bit;
   public:
-    PPCJITInfo(PPCTargetMachine &tm) : TM(tm) {useGOT = 0;}
+    PPCJITInfo(PPCTargetMachine &tm, bool tmIs64Bit) : TM(tm) {
+      useGOT = 0;
+      is64Bit = tmIs64Bit;
+    }
 
     /// addPassesToJITCompile - Add passes to the specified pass manager to
     /// implement a fast dynamic compiler for this target.  Return true if this

diff --git a/lib/Target/PowerPC/PPCTargetMachine.cpp b/lib/Target/PowerPC/PPCTargetMachine.cpp
index e360f37f3a65524e22d45b1f85b85baa3ab37d46..51586dc85bb2796f9ab3f4efb8705a079beb9119 100644 (file)
--- a/lib/Target/PowerPC/PPCTargetMachine.cpp
+++ b/lib/Target/PowerPC/PPCTargetMachine.cpp
@@ -87,7 +87,7 @@ PPCTargetMachine::PPCTargetMachine(const Module &M, const std::string &FS,
                                    bool is64Bit)
   : TargetMachine("PowerPC"), Subtarget(M, FS, is64Bit),
     DataLayout(Subtarget.getTargetDataString()), InstrInfo(*this),
-    FrameInfo(*this, false), JITInfo(*this), TLInfo(*this),
+    FrameInfo(*this, false), JITInfo(*this, is64Bit), TLInfo(*this),
     InstrItins(Subtarget.getInstrItineraryData()) {
 
   if (getRelocationModel() == Reloc::Default)