Store Register Exclusive should leave the source register Inst{3-0} unspecified.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91143 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/ARM/ARMInstrFormats.td b/lib/Target/ARM/ARMInstrFormats.td
index c6c96a86ac1ce7d167ca0b5d53961e49cf14a41a..9ce93d196a2d84a79e0439d5413e6a00e831fc5e 100644 (file)
--- a/lib/Target/ARM/ARMInstrFormats.td
+++ b/lib/Target/ARM/ARMInstrFormats.td
@@ -285,7 +285,7 @@ class AIstrex<bits<2> opcod, dag oops, dag iops, InstrItinClass itin,
   let Inst{27-23} = 0b00011;
   let Inst{22-21} = opcod;
   let Inst{20} = 0;
-  let Inst{11-0}  = 0b111110011111;
+  let Inst{11-4}  = 0b11111001;
 }
 
 // addrmode1 instructions