Register list operands are not allowed to contain only a single register. Alternate...
authorOwen Anderson <resistor@mac.com>
Wed, 2 Nov 2011 17:41:23 +0000 (17:41 +0000)
committerOwen Anderson <resistor@mac.com>
Wed, 2 Nov 2011 17:41:23 +0000 (17:41 +0000)
commite31b42a6f5598691498808673648211916bf4d0f
tree6aa26cc90dbf81ebbb3d34a2f2098c8412184438
parent5a83264fa26eb573ef25b2db0cafbeef3eeb54c8
Register list operands are not allowed to contain only a single register.  Alternate encodings are used in that case.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143552 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/ARM/Disassembler/ARMDisassembler.cpp