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(parent: b7c2ed6) | patch
Added soft fail checks for the disassembler when decoding some corner cases of the...
authorSilviu Baranga <silviu.baranga@arm.com>
Thu, 22 Mar 2012 14:14:49 +0000 (14:14 +0000)
committerSilviu Baranga <silviu.baranga@arm.com>
Thu, 22 Mar 2012 14:14:49 +0000 (14:14 +0000)
commit6fe310e1555dedba2b36dedae9a88eb900ad1804
tree0edf0b1ab35366bbf30780e800d2e2a649b21288tree | snapshot
parentb7c2ed66642b141a768b3074c465eba9d98665d8commit | diff
Added soft fail checks for the disassembler when decoding some corner cases of the STRD, STRH, LDRD, LDRH, LDRSH and LDRSB instructions on ARM.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153252 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/ARM/Disassembler/ARMDisassembler.cpp diff | blob | history
test/MC/Disassembler/ARM/arm-tests.txt diff | blob | history
test/MC/Disassembler/ARM/invalid-LDRD-arm.txt [deleted file] blob | history
test/MC/Disassembler/ARM/unpredictable-ADDREXT3-arm.txt [new file with mode: 0644] blob
test/MC/Disassembler/ARM/unpredictable-LDRD-arm.txt [new file with mode: 0644] blob
C/C++ LLVM-based compilers that forbids OOTA behaviors