Added soft fail cases for the disassembler when decoding LDRSBT, LDRHT or LDRSHT...
authorSilviu Baranga <silviu.baranga@arm.com>
Thu, 22 Mar 2012 13:24:43 +0000 (13:24 +0000)
committerSilviu Baranga <silviu.baranga@arm.com>
Thu, 22 Mar 2012 13:24:43 +0000 (13:24 +0000)
commitb7c2ed66642b141a768b3074c465eba9d98665d8
tree3b9cf751c317bcd4b0b27bd71f4769ca7ab0a359
parenta0c48eb8f69bcb619a2c2cc0044375bb4171cebe
Added soft fail cases for the disassembler when decoding LDRSBT, LDRHT or LDRSHT instruction on ARM

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153251 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/ARM/ARMInstrInfo.td
lib/Target/ARM/Disassembler/ARMDisassembler.cpp
test/MC/Disassembler/ARM/unpredictable-LDR-arm.txt [new file with mode: 0644]