[TableGen] Correct Namespace lookup with AltNames in AsmWriterEmitter

[oota-llvm.git] / utils / TableGen / X86DisassemblerTables.cpp

diff --git a/utils/TableGen/X86DisassemblerTables.cpp b/utils/TableGen/X86DisassemblerTables.cpp
index 138a34b4dc9a5866dd3077cd36fbefe41175b7a7..ad36dc427a562a1c954c8677aea38cfb00f5a435 100644 (file)
--- a/utils/TableGen/X86DisassemblerTables.cpp
+++ b/utils/TableGen/X86DisassemblerTables.cpp
@@ -114,10 +114,12 @@ static inline bool inheritsFrom(InstructionContext child,
   case IC_64BIT_REXW:
     return(inheritsFrom(child, IC_64BIT_REXW_XS) ||
            inheritsFrom(child, IC_64BIT_REXW_XD) ||
-           inheritsFrom(child, IC_64BIT_REXW_OPSIZE));
+           inheritsFrom(child, IC_64BIT_REXW_OPSIZE) ||
+           (!AdSize64 && inheritsFrom(child, IC_64BIT_REXW_ADSIZE)));
   case IC_64BIT_OPSIZE:
     return inheritsFrom(child, IC_64BIT_REXW_OPSIZE) ||
-           (!AdSize64 && inheritsFrom(child, IC_64BIT_OPSIZE_ADSIZE));
+           (!AdSize64 && inheritsFrom(child, IC_64BIT_OPSIZE_ADSIZE)) ||
+           (!AdSize64 && inheritsFrom(child, IC_64BIT_REXW_ADSIZE));
   case IC_64BIT_XD:
     return(inheritsFrom(child, IC_64BIT_REXW_XD));
   case IC_64BIT_XS:
@@ -128,6 +130,7 @@ static inline bool inheritsFrom(InstructionContext child,
   case IC_64BIT_REXW_XD:
   case IC_64BIT_REXW_XS:
   case IC_64BIT_REXW_OPSIZE:
+  case IC_64BIT_REXW_ADSIZE:
     return false;
   case IC_VEX:
     return (VEX_LIG && inheritsFrom(child, IC_VEX_L_W)) ||
@@ -212,11 +215,17 @@ static inline bool inheritsFrom(InstructionContext child,
     return inheritsFrom(child, IC_EVEX_W_K) ||
            inheritsFrom(child, IC_EVEX_L_W_K);
   case IC_EVEX_XS_K:
+  case IC_EVEX_XS_K_B:
+  case IC_EVEX_XS_KZ_B:
     return inheritsFrom(child, IC_EVEX_W_XS_K) ||
            inheritsFrom(child, IC_EVEX_L_W_XS_K);
   case IC_EVEX_XD_K:
+  case IC_EVEX_XD_K_B:
+  case IC_EVEX_XD_KZ_B:
     return inheritsFrom(child, IC_EVEX_W_XD_K) ||
            inheritsFrom(child, IC_EVEX_L_W_XD_K);
+  case IC_EVEX_XS_B:
+  case IC_EVEX_XD_B:
   case IC_EVEX_K_B:
   case IC_EVEX_KZ:
     return false;
@@ -234,6 +243,9 @@ static inline bool inheritsFrom(InstructionContext child,
   case IC_EVEX_OPSIZE_KZ_B:
     return false;
   case IC_EVEX_W_K:
+  case IC_EVEX_W_B:
+  case IC_EVEX_W_K_B:
+  case IC_EVEX_W_KZ_B:
   case IC_EVEX_W_XS_K:
   case IC_EVEX_W_XD_K:
   case IC_EVEX_W_OPSIZE_K:
@@ -243,6 +255,8 @@ static inline bool inheritsFrom(InstructionContext child,
   case IC_EVEX_L_K:
   case IC_EVEX_L_XS_K:
   case IC_EVEX_L_XD_K:
+  case IC_EVEX_L_XD_B:
+  case IC_EVEX_L_XD_K_B:
   case IC_EVEX_L_OPSIZE_K:
   case IC_EVEX_L_OPSIZE_B:
   case IC_EVEX_L_OPSIZE_K_B:
@@ -250,24 +264,43 @@ static inline bool inheritsFrom(InstructionContext child,
   case IC_EVEX_W_KZ:
   case IC_EVEX_W_XS_KZ:
   case IC_EVEX_W_XD_KZ:
+  case IC_EVEX_W_XS_B:
+  case IC_EVEX_W_XD_B:
+  case IC_EVEX_W_XS_K_B:
+  case IC_EVEX_W_XD_K_B:
+  case IC_EVEX_W_XS_KZ_B:
+  case IC_EVEX_W_XD_KZ_B:
   case IC_EVEX_W_OPSIZE_KZ:
   case IC_EVEX_W_OPSIZE_KZ_B:
     return false;
   case IC_EVEX_L_KZ:
   case IC_EVEX_L_XS_KZ:
+  case IC_EVEX_L_XS_B:
+  case IC_EVEX_L_XS_K_B:
+  case IC_EVEX_L_XS_KZ_B:
   case IC_EVEX_L_XD_KZ:
+  case IC_EVEX_L_XD_KZ_B:
   case IC_EVEX_L_OPSIZE_KZ:
   case IC_EVEX_L_OPSIZE_KZ_B:
     return false;
   case IC_EVEX_L_W_K:
+  case IC_EVEX_L_W_B:
+  case IC_EVEX_L_W_K_B:    
   case IC_EVEX_L_W_XS_K:
-  case IC_EVEX_L_W_XD_K:
+  case IC_EVEX_L_W_XS_B:
+  case IC_EVEX_L_W_XS_K_B:
+  case IC_EVEX_L_W_XS_KZ:
+  case IC_EVEX_L_W_XS_KZ_B:
   case IC_EVEX_L_W_OPSIZE_K:
   case IC_EVEX_L_W_OPSIZE_B:
   case IC_EVEX_L_W_OPSIZE_K_B:
   case IC_EVEX_L_W_KZ:
-  case IC_EVEX_L_W_XS_KZ:
+  case IC_EVEX_L_W_KZ_B:
+  case IC_EVEX_L_W_XD_K:
+  case IC_EVEX_L_W_XD_B:
+  case IC_EVEX_L_W_XD_K_B:
   case IC_EVEX_L_W_XD_KZ:
+  case IC_EVEX_L_W_XD_KZ_B:
   case IC_EVEX_L_W_OPSIZE_KZ:
   case IC_EVEX_L_W_OPSIZE_KZ_B:
     return false;
@@ -276,21 +309,29 @@ static inline bool inheritsFrom(InstructionContext child,
   case IC_EVEX_L2_K_B:
   case IC_EVEX_L2_KZ_B:
   case IC_EVEX_L2_XS_K:
+  case IC_EVEX_L2_XS_K_B:
   case IC_EVEX_L2_XS_B:
   case IC_EVEX_L2_XD_B:
   case IC_EVEX_L2_XD_K:
+  case IC_EVEX_L2_XD_K_B:
   case IC_EVEX_L2_OPSIZE_K:
   case IC_EVEX_L2_OPSIZE_B:
   case IC_EVEX_L2_OPSIZE_K_B:
   case IC_EVEX_L2_KZ:
   case IC_EVEX_L2_XS_KZ:
+  case IC_EVEX_L2_XS_KZ_B:
   case IC_EVEX_L2_XD_KZ:
+  case IC_EVEX_L2_XD_KZ_B:
   case IC_EVEX_L2_OPSIZE_KZ:
   case IC_EVEX_L2_OPSIZE_KZ_B:
     return false;
   case IC_EVEX_L2_W_K:
   case IC_EVEX_L2_W_B:
+  case IC_EVEX_L2_W_K_B:
+  case IC_EVEX_L2_W_KZ_B:
   case IC_EVEX_L2_W_XS_K:
+  case IC_EVEX_L2_W_XS_B:
+  case IC_EVEX_L2_W_XS_K_B:
   case IC_EVEX_L2_W_XD_K:
   case IC_EVEX_L2_W_XD_B:
   case IC_EVEX_L2_W_OPSIZE_K:
@@ -298,7 +339,10 @@ static inline bool inheritsFrom(InstructionContext child,
   case IC_EVEX_L2_W_OPSIZE_K_B:
   case IC_EVEX_L2_W_KZ:
   case IC_EVEX_L2_W_XS_KZ:
+  case IC_EVEX_L2_W_XS_KZ_B:
   case IC_EVEX_L2_W_XD_KZ:
+  case IC_EVEX_L2_W_XD_K_B:
+  case IC_EVEX_L2_W_XD_KZ_B:
   case IC_EVEX_L2_W_OPSIZE_KZ:
   case IC_EVEX_L2_W_OPSIZE_KZ_B:
     return false;
@@ -582,7 +626,8 @@ void DisassemblerTables::emitInstructionInfo(raw_ostream &o,
   o << "static const struct OperandSpecifier x86OperandSets[]["
     << X86_MAX_OPERANDS << "] = {\n";
 
-  typedef std::vector<std::pair<const char *, const char *> > OperandListTy;
+  typedef SmallVector<std::pair<OperandEncoding, OperandType>,
+                      X86_MAX_OPERANDS> OperandListTy;
   std::map<OperandListTy, unsigned> OperandSets;
 
   unsigned OperandSetNum = 0;
@@ -591,12 +636,10 @@ void DisassemblerTables::emitInstructionInfo(raw_ostream &o,
 
     for (unsigned OperandIndex = 0; OperandIndex < X86_MAX_OPERANDS;
          ++OperandIndex) {
-      const char *Encoding =
-        stringForOperandEncoding((OperandEncoding)InstructionSpecifiers[Index]
-                                 .operands[OperandIndex].encoding);
-      const char *Type =
-        stringForOperandType((OperandType)InstructionSpecifiers[Index]
-                             .operands[OperandIndex].type);
+      OperandEncoding Encoding = (OperandEncoding)InstructionSpecifiers[Index]
+                                 .operands[OperandIndex].encoding;
+      OperandType Type = (OperandType)InstructionSpecifiers[Index]
+                         .operands[OperandIndex].type;
       OperandList.push_back(std::make_pair(Encoding, Type));
     }
     unsigned &N = OperandSets[OperandList];
@@ -606,8 +649,9 @@ void DisassemblerTables::emitInstructionInfo(raw_ostream &o,
 
     o << "  { /* " << (OperandSetNum - 1) << " */\n";
     for (unsigned i = 0, e = OperandList.size(); i != e; ++i) {
-      o << "    { " << OperandList[i].first << ", "
-        << OperandList[i].second << " },\n";
+      const char *Encoding = stringForOperandEncoding(OperandList[i].first);
+      const char *Type     = stringForOperandType(OperandList[i].second);
+      o << "    { " << Encoding << ", " << Type << " },\n";
     }
     o << "  },\n";
   }
@@ -619,32 +663,24 @@ void DisassemblerTables::emitInstructionInfo(raw_ostream &o,
   i++;
 
   for (unsigned index = 0; index < NumInstructions; ++index) {
-    o.indent(i * 2) << "{ /* " << index << " */" << "\n";
+    o.indent(i * 2) << "{ /* " << index << " */\n";
     i++;
 
     OperandListTy OperandList;
     for (unsigned OperandIndex = 0; OperandIndex < X86_MAX_OPERANDS;
          ++OperandIndex) {
-      const char *Encoding =
-        stringForOperandEncoding((OperandEncoding)InstructionSpecifiers[index]
-                                 .operands[OperandIndex].encoding);
-      const char *Type =
-        stringForOperandType((OperandType)InstructionSpecifiers[index]
-                             .operands[OperandIndex].type);
+      OperandEncoding Encoding = (OperandEncoding)InstructionSpecifiers[index]
+                                 .operands[OperandIndex].encoding;
+      OperandType Type = (OperandType)InstructionSpecifiers[index]
+                         .operands[OperandIndex].type;
       OperandList.push_back(std::make_pair(Encoding, Type));
     }
     o.indent(i * 2) << (OperandSets[OperandList] - 1) << ",\n";
 
-    o.indent(i * 2) << "/* " << InstructionSpecifiers[index].name << " */";
-    o << "\n";
+    o.indent(i * 2) << "/* " << InstructionSpecifiers[index].name << " */\n";
 
     i--;
-    o.indent(i * 2) << "}";
-
-    if (index + 1 < NumInstructions)
-      o << ",";
-
-    o << "\n";
+    o.indent(i * 2) << "},\n";
   }
 
   i--;
@@ -720,6 +756,9 @@ void DisassemblerTables::emitContextTable(raw_ostream &o, unsigned &i) const {
     else if ((index & ATTR_64BIT) && (index & ATTR_REXW) &&
              (index & ATTR_OPSIZE))
       o << "IC_64BIT_REXW_OPSIZE";
+    else if ((index & ATTR_64BIT) && (index & ATTR_REXW) &&
+             (index & ATTR_ADSIZE))
+      o << "IC_64BIT_REXW_ADSIZE";
     else if ((index & ATTR_64BIT) && (index & ATTR_XD) && (index & ATTR_OPSIZE))
       o << "IC_64BIT_XD_OPSIZE";
     else if ((index & ATTR_64BIT) && (index & ATTR_XS) && (index & ATTR_OPSIZE))