//
// This file defines wrappers for the Target class and related global
// functionality. This makes it easier to access the data and provides a single
-// place that needs to check it for validity. All of these classes throw
-// exceptions on error conditions.
+// place that needs to check it for validity. All of these classes abort
+// on error conditions.
//
//===----------------------------------------------------------------------===//
-#ifndef CODEGEN_TARGET_H
-#define CODEGEN_TARGET_H
+#ifndef LLVM_UTILS_TABLEGEN_CODEGENTARGET_H
+#define LLVM_UTILS_TABLEGEN_CODEGENTARGET_H
-#include "CodeGenRegisters.h"
#include "CodeGenInstruction.h"
-#include <iosfwd>
-#include <map>
+#include "CodeGenRegisters.h"
+#include "llvm/Support/raw_ostream.h"
+#include "llvm/TableGen/Record.h"
+#include <algorithm>
namespace llvm {
-class Record;
-class RecordKeeper;
struct CodeGenRegister;
+class CodeGenSchedModels;
class CodeGenTarget;
// SelectionDAG node properties.
// SDNPMemOperand: indicates that a node touches memory and therefore must
// have an associated memory operand that describes the access.
enum SDNP {
- SDNPCommutative,
- SDNPAssociative,
+ SDNPCommutative,
+ SDNPAssociative,
SDNPHasChain,
- SDNPOutFlag,
- SDNPInFlag,
- SDNPOptInFlag,
+ SDNPOutGlue,
+ SDNPInGlue,
+ SDNPOptInGlue,
SDNPMayLoad,
SDNPMayStore,
SDNPSideEffect,
- SDNPMemOperand
+ SDNPMemOperand,
+ SDNPVariadic,
+ SDNPWantRoot,
+ SDNPWantParent
};
-// ComplexPattern attributes.
-enum CPAttr { CPAttrParentAsRoot };
-
/// getValueType - Return the MVT::SimpleValueType that the specified TableGen
/// record corresponds to.
MVT::SimpleValueType getValueType(Record *Rec);
/// getQualifiedName - Return the name of the specified record, with a
/// namespace qualifier if the record contains one.
std::string getQualifiedName(const Record *R);
-
+
/// CodeGenTarget - This class corresponds to the Target class in the .td files.
///
class CodeGenTarget {
+ RecordKeeper &Records;
Record *TargetRec;
- mutable std::map<std::string, CodeGenInstruction> Instructions;
- mutable std::vector<CodeGenRegister> Registers;
- mutable std::vector<CodeGenRegisterClass> RegisterClasses;
- mutable std::vector<MVT::SimpleValueType> LegalValueTypes;
- void ReadRegisters() const;
- void ReadRegisterClasses() const;
+ mutable DenseMap<const Record*,
+ std::unique_ptr<CodeGenInstruction>> Instructions;
+ mutable std::unique_ptr<CodeGenRegBank> RegBank;
+ mutable std::vector<Record*> RegAltNameIndices;
+ mutable SmallVector<MVT::SimpleValueType, 8> LegalValueTypes;
+ void ReadRegAltNameIndices() const;
void ReadInstructions() const;
void ReadLegalValueTypes() const;
+
+ mutable std::unique_ptr<CodeGenSchedModels> SchedModels;
+
+ mutable std::vector<const CodeGenInstruction*> InstrsByEnum;
public:
- CodeGenTarget();
+ CodeGenTarget(RecordKeeper &Records);
+ ~CodeGenTarget();
Record *getTargetRecord() const { return TargetRec; }
const std::string &getName() const;
///
Record *getInstructionSet() const;
+ /// getAsmParser - Return the AssemblyParser definition for this target.
+ ///
+ Record *getAsmParser() const;
+
+ /// getAsmParserVariant - Return the AssmblyParserVariant definition for
+ /// this target.
+ ///
+ Record *getAsmParserVariant(unsigned i) const;
+
+ /// getAsmParserVariantCount - Return the AssmblyParserVariant definition
+ /// available for this target.
+ ///
+ unsigned getAsmParserVariantCount() const;
+
/// getAsmWriter - Return the AssemblyWriter definition for this target.
///
Record *getAsmWriter() const;
- const std::vector<CodeGenRegister> &getRegisters() const {
- if (Registers.empty()) ReadRegisters();
- return Registers;
- }
+ /// getRegBank - Return the register bank description.
+ CodeGenRegBank &getRegBank() const;
+
+ /// getRegisterByName - If there is a register with the specific AsmName,
+ /// return it.
+ const CodeGenRegister *getRegisterByName(StringRef Name) const;
- const std::vector<CodeGenRegisterClass> &getRegisterClasses() const {
- if (RegisterClasses.empty()) ReadRegisterClasses();
- return RegisterClasses;
+ const std::vector<Record*> &getRegAltNameIndices() const {
+ if (RegAltNameIndices.empty()) ReadRegAltNameIndices();
+ return RegAltNameIndices;
}
-
+
const CodeGenRegisterClass &getRegisterClass(Record *R) const {
- const std::vector<CodeGenRegisterClass> &RC = getRegisterClasses();
- for (unsigned i = 0, e = RC.size(); i != e; ++i)
- if (RC[i].TheDef == R)
- return RC[i];
- assert(0 && "Didn't find the register class");
- abort();
- }
-
- /// getRegisterClassForRegister - Find the register class that contains the
- /// specified physical register. If there register exists in multiple
- /// register classes or is not in a register class, return null.
- const CodeGenRegisterClass *getRegisterClassForRegister(Record *R) const {
- const std::vector<CodeGenRegisterClass> &RCs = getRegisterClasses();
- const CodeGenRegisterClass *FoundRC = 0;
- for (unsigned i = 0, e = RCs.size(); i != e; ++i) {
- const CodeGenRegisterClass &RC = RegisterClasses[i];
- for (unsigned ei = 0, ee = RC.Elements.size(); ei != ee; ++ei) {
- if (R == RC.Elements[ei]) {
- if (FoundRC) return 0; // In multiple RC's
- FoundRC = &RC;
- break;
- }
- }
- }
- return FoundRC;
+ return *getRegBank().getRegClass(R);
}
/// getRegisterVTs - Find the union of all possible SimpleValueTypes for the
/// specified physical register.
- std::vector<unsigned char> getRegisterVTs(Record *R) const;
-
- const std::vector<MVT::SimpleValueType> &getLegalValueTypes() const {
+ std::vector<MVT::SimpleValueType> getRegisterVTs(Record *R) const;
+
+ ArrayRef<MVT::SimpleValueType> getLegalValueTypes() const {
if (LegalValueTypes.empty()) ReadLegalValueTypes();
return LegalValueTypes;
}
-
+
/// isLegalValueType - Return true if the specified value type is natively
/// supported by the target (i.e. there are registers that directly hold it).
bool isLegalValueType(MVT::SimpleValueType VT) const {
- const std::vector<MVT::SimpleValueType> &LegalVTs = getLegalValueTypes();
+ ArrayRef<MVT::SimpleValueType> LegalVTs = getLegalValueTypes();
for (unsigned i = 0, e = LegalVTs.size(); i != e; ++i)
if (LegalVTs[i] == VT) return true;
- return false;
+ return false;
}
- /// getInstructions - Return all of the instructions defined for this target.
- ///
- const std::map<std::string, CodeGenInstruction> &getInstructions() const {
- if (Instructions.empty()) ReadInstructions();
- return Instructions;
- }
- std::map<std::string, CodeGenInstruction> &getInstructions() {
+ CodeGenSchedModels &getSchedModels() const;
+
+private:
+ DenseMap<const Record*, std::unique_ptr<CodeGenInstruction>> &
+ getInstructions() const {
if (Instructions.empty()) ReadInstructions();
return Instructions;
}
+public:
- CodeGenInstruction &getInstruction(const std::string &Name) const {
- const std::map<std::string, CodeGenInstruction> &Insts = getInstructions();
- assert(Insts.count(Name) && "Not an instruction!");
- return const_cast<CodeGenInstruction&>(Insts.find(Name)->second);
+ CodeGenInstruction &getInstruction(const Record *InstRec) const {
+ if (Instructions.empty()) ReadInstructions();
+ auto I = Instructions.find(InstRec);
+ assert(I != Instructions.end() && "Not an instruction");
+ return *I->second;
}
- typedef std::map<std::string,
- CodeGenInstruction>::const_iterator inst_iterator;
- inst_iterator inst_begin() const { return getInstructions().begin(); }
- inst_iterator inst_end() const { return Instructions.end(); }
-
/// getInstructionsByEnumValue - Return all of the instructions defined by the
/// target, ordered by their enum value.
- void getInstructionsByEnumValue(std::vector<const CodeGenInstruction*>
- &NumberedInstructions);
+ const std::vector<const CodeGenInstruction*> &
+ getInstructionsByEnumValue() const {
+ if (InstrsByEnum.empty()) ComputeInstrsByEnum();
+ return InstrsByEnum;
+ }
+
+ typedef std::vector<const CodeGenInstruction*>::const_iterator inst_iterator;
+ inst_iterator inst_begin() const{return getInstructionsByEnumValue().begin();}
+ inst_iterator inst_end() const { return getInstructionsByEnumValue().end(); }
+ iterator_range<inst_iterator> instructions() const {
+ return make_range(inst_begin(), inst_end());
+ }
/// isLittleEndianEncoding - are instruction bit patterns defined as [0..n]?
///
bool isLittleEndianEncoding() const;
+
+ /// reverseBitsForLittleEndianEncoding - For little-endian instruction bit
+ /// encodings, reverse the bit order of all instructions.
+ void reverseBitsForLittleEndianEncoding();
+
+ /// guessInstructionProperties - should we just guess unset instruction
+ /// properties?
+ bool guessInstructionProperties() const;
+
+private:
+ void ComputeInstrsByEnum() const;
};
/// ComplexPattern - ComplexPattern info, corresponding to the ComplexPattern
std::string SelectFunc;
std::vector<Record*> RootNodes;
unsigned Properties; // Node properties
- unsigned Attributes; // Pattern attributes
public:
- ComplexPattern() : NumOperands(0) {};
+ ComplexPattern() : NumOperands(0) {}
ComplexPattern(Record *R);
MVT::SimpleValueType getValueType() const { return Ty; }
return RootNodes;
}
bool hasProperty(enum SDNP Prop) const { return Properties & (1 << Prop); }
- bool hasAttribute(enum CPAttr Attr) const { return Attributes & (1 << Attr); }
};
} // End llvm namespace
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