//
// The LLVM Compiler Infrastructure
//
-// This file was developed by the LLVM research group and is distributed under
-// the University of Illinois Open Source License. See LICENSE.TXT for details.
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
#include "CodeGenTarget.h"
#include "Record.h"
#include "llvm/ADT/StringExtras.h"
+#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Debug.h"
using namespace llvm;
+static cl::opt<bool>
+MCEmitter("mc-code-emitter",
+ cl::desc("Generate CodeEmitter for use with the MC library."),
+ cl::init(false));
+
void CodeEmitterGen::reverseBits(std::vector<Record*> &Insts) {
for (std::vector<Record*>::iterator I = Insts.begin(), E = Insts.end();
I != E; ++I) {
Record *R = *I;
- if (R->getName() == "PHI" || R->getName() == "INLINEASM") continue;
-
+ if (R->getValueAsString("Namespace") == "TargetOpcode")
+ continue;
+
BitsInit *BI = R->getValueAsBitsInit("Inst");
unsigned numBits = BI->getNumBits();
unsigned middle = (numBits + 1) / 2;
NewBI->setBit(middle, BI->getBit(middle));
}
-
+
// Update the bits in reversed order so that emitInstrOpBits will get the
// correct endianness.
R->getValue("Inst")->setValue(NewBI);
}
}
-
// If the VarBitInit at position 'bit' matches the specified variable then
// return the variable bit position. Otherwise return -1.
int CodeEmitterGen::getVariableBit(const std::string &VarName,
BitsInit *BI, int bit) {
if (VarBitInit *VBI = dynamic_cast<VarBitInit*>(BI->getBit(bit))) {
TypedInit *TI = VBI->getVariable();
-
+
if (VarInit *VI = dynamic_cast<VarInit*>(TI)) {
if (VI->getName() == VarName) return VBI->getBitNum();
}
}
-
- return -1;
-}
+ return -1;
+}
-void CodeEmitterGen::run(std::ostream &o) {
+void CodeEmitterGen::run(raw_ostream &o) {
CodeGenTarget Target;
std::vector<Record*> Insts = Records.getAllDerivedDefinitions("Instruction");
-
+
// For little-endian instruction bit encodings, reverse the bit order
if (Target.isLittleEndianEncoding()) reverseBits(Insts);
EmitSourceFileHeader("Machine Code Emitter", o);
std::string Namespace = Insts[0]->getValueAsString("Namespace") + "::";
-
- std::vector<const CodeGenInstruction*> NumberedInstructions;
- Target.getInstructionsByEnumValue(NumberedInstructions);
+
+ const std::vector<const CodeGenInstruction*> &NumberedInstructions =
+ Target.getInstructionsByEnumValue();
// Emit function declaration
o << "unsigned " << Target.getName() << "CodeEmitter::"
- << "getBinaryCodeForInstr(MachineInstr &MI) {\n";
+ << "getBinaryCodeForInstr(const MachineInstr &MI) const {\n";
// Emit instruction base values
o << " static const unsigned InstBits[] = {\n";
- for (std::vector<const CodeGenInstruction*>::iterator
+ for (std::vector<const CodeGenInstruction*>::const_iterator
IN = NumberedInstructions.begin(),
EN = NumberedInstructions.end();
IN != EN; ++IN) {
const CodeGenInstruction *CGI = *IN;
Record *R = CGI->TheDef;
-
- if (IN != NumberedInstructions.begin()) o << ",\n";
-
- if (R->getName() == "PHI" || R->getName() == "INLINEASM") {
- o << " 0U";
+
+ if (R->getValueAsString("Namespace") == "TargetOpcode") {
+ o << " 0U,\n";
continue;
}
-
+
BitsInit *BI = R->getValueAsBitsInit("Inst");
// Start by filling in fixed values...
Value |= B->getValue() << (e-i-1);
}
}
- o << " " << Value << "U";
+ o << " " << Value << "U," << '\t' << "// " << R->getName() << "\n";
}
- o << "\n };\n";
-
+ o << " 0U\n };\n";
+
// Map to accumulate all the cases.
std::map<std::string, std::vector<std::string> > CaseMap;
-
+
// Construct all cases statement for each opcode
for (std::vector<Record*>::iterator IC = Insts.begin(), EC = Insts.end();
IC != EC; ++IC) {
Record *R = *IC;
+ if (R->getValueAsString("Namespace") == "TargetOpcode")
+ continue;
const std::string &InstName = R->getName();
std::string Case("");
-
- if (InstName == "PHI" || InstName == "INLINEASM") continue;
-
+
BitsInit *BI = R->getValueAsBitsInit("Inst");
const std::vector<RecordVal> &Vals = R->getValues();
+ CodeGenInstruction &CGI = Target.getInstruction(R);
// Loop over all of the fields in the instruction, determining which are the
// operands to the instruction.
- unsigned op = 0;
+ unsigned NumberedOp = 0;
for (unsigned i = 0, e = Vals.size(); i != e; ++i) {
if (!Vals[i].getPrefix() && !Vals[i].getValue()->isComplete()) {
// Is the operand continuous? If so, we can just mask and OR it in
// instead of doing it bit-by-bit, saving a lot in runtime cost.
const std::string &VarName = Vals[i].getName();
bool gotOp = false;
-
+
for (int bit = BI->getNumBits()-1; bit >= 0; ) {
int varBit = getVariableBit(VarName, BI, bit);
-
+
if (varBit == -1) {
--bit;
} else {
int beginInstBit = bit;
int beginVarBit = varBit;
int N = 1;
-
+
for (--bit; bit >= 0;) {
varBit = getVariableBit(VarName, BI, bit);
if (varBit == -1 || varBit != (beginVarBit - N)) break;
}
if (!gotOp) {
- Case += " // op: " + VarName + "\n"
- + " op = getMachineOpValue(MI, MI.getOperand("
- + utostr(op++)
- + "));\n";
+ // If the operand matches by name, reference according to that
+ // operand number. Non-matching operands are assumed to be in
+ // order.
+ unsigned OpIdx;
+ if (CGI.Operands.hasOperandNamed(VarName, OpIdx)) {
+ // Get the machine operand number for the indicated operand.
+ OpIdx = CGI.Operands[OpIdx].MIOperandNo;
+ assert (!CGI.Operands.isFlatOperandNotEmitted(OpIdx) &&
+ "Explicitly used operand also marked as not emitted!");
+ } else {
+ /// If this operand is not supposed to be emitted by the
+ /// generated emitter, skip it.
+ while (CGI.Operands.isFlatOperandNotEmitted(NumberedOp))
+ ++NumberedOp;
+ OpIdx = NumberedOp++;
+ }
+ std::pair<unsigned, unsigned> SO =
+ CGI.Operands.getSubOperandNumber(OpIdx);
+ std::string &EncoderMethodName =
+ CGI.Operands[SO.first].EncoderMethodName;
+
+ // If the source operand has a custom encoder, use it. This will
+ // get the encoding for all of the suboperands.
+ if (!EncoderMethodName.empty()) {
+ // A custom encoder has all of the information for the
+ // sub-operands, if there are more than one, so only
+ // query the encoder once per source operand.
+ if (SO.second == 0) {
+ Case += " // op: " + VarName + "\n"
+ + " op = " + EncoderMethodName + "(MI, "
+ + utostr(OpIdx) + ");\n";
+ }
+ } else {
+ Case += " // op: " + VarName + "\n"
+ + " op = getMachineOpValue(MI, MI.getOperand("
+ + utostr(OpIdx) + "));\n";
+ }
gotOp = true;
-
- // If this is a two-address instruction and we just got the dest
- // op, skip the src op.
- if (op == 1 && Target.getInstruction(InstName).isTwoAddress)
- ++op;
}
-
- unsigned opMask = (1 << N) - 1;
+
+ unsigned opMask = ~0U >> (32-N);
int opShift = beginVarBit - N + 1;
opMask <<= opShift;
opShift = beginInstBit - beginVarBit;
-
+
if (opShift > 0) {
Case += " Value |= (op & " + utostr(opMask) + "U) << "
+ itostr(opShift) + ";\n";
}
}
- std::vector<std::string> &InstList = CaseMap[Case];
+ std::vector<std::string> &InstList = CaseMap[Case];
InstList.push_back(InstName);
}
-
// Emit initial function code
o << " const unsigned opcode = MI.getOpcode();\n"
<< " unsigned Value = InstBits[opcode];\n"
- << " unsigned op;\n"
+ << " unsigned op = 0;\n"
+ << " op = op; // suppress warning\n"
<< " switch (opcode) {\n";
// Emit each case statement
// Default case: unhandled opcode
o << " default:\n"
- << " std::cerr << \"Not supported instr: \" << MI << \"\\n\";\n"
- << " abort();\n"
+ << " std::string msg;\n"
+ << " raw_string_ostream Msg(msg);\n"
+ << " Msg << \"Not supported instr: \" << MI;\n"
+ << " report_fatal_error(Msg.str());\n"
<< " }\n"
<< " return Value;\n"
<< "}\n\n";
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