add r0, r0, #32
adds r2, r2, #56
adds r2, #56
+ add r1, r7, #0xcbcbcbcb
+ add sp, sp, #0x1fe0000
adds.w r2, #-16
adds.w r2, r2, #-16
@ CHECK: add.w r0, r0, #32 @ encoding: [0x00,0xf1,0x20,0x00]
@ CHECK: adds r2, #56 @ encoding: [0x38,0x32]
@ CHECK: adds r2, #56 @ encoding: [0x38,0x32]
+@ CHECK: add.w r1, r7, #3419130827 @ encoding: [0x07,0xf1,0xcb,0x31]
+@ CHECK: add.w sp, sp, #33423360 @ encoding: [0x0d,0xf1,0xff,0x7d]
@ CHECK: subs.w r2, r2, #16 @ encoding: [0xb2,0xf1,0x10,0x02]
@ CHECK: subs.w r2, r2, #16 @ encoding: [0xb2,0xf1,0x10,0x02]
@------------------------------------------------------------------------------
subw r11, pc, #3270
+ adr.w r2, #3
adr.w r11, #-826
adr.w r1, #-0x0
-@ CHECK: subw r11, pc, #3270 @ encoding: [0xaf,0xf6,0xc6,0x4b]
-@ CHECK: adr.w r11, #-826 @ encoding: [0xaf,0xf2,0x3a,0x3b]
-@ CHECK: adr.w r1, #-0 @ encoding: [0xaf,0xf2,0x00,0x01]
+@ CHECK: subw r11, pc, #3270 @ encoding: [0xaf,0xf6,0xc6,0x4b]
+@ CHECK: adr.w r2, #3 @ encoding: [0x0f,0xf2,0x03,0x02]
+@ CHECK: adr.w r11, #-826 @ encoding: [0xaf,0xf2,0x3a,0x3b]
+@ CHECK: adr.w r1, #-0 @ encoding: [0xaf,0xf2,0x00,0x01]
@------------------------------------------------------------------------------
@ AND (immediate)
ands r3, r12, #0xf
and r1, #0xff
and r1, r1, #0xff
+ and r5, r4, #0xffffffff
+ ands r1, r9, #0xffffffff
@ CHECK: and r2, r5, #1044480 @ encoding: [0x05,0xf4,0x7f,0x22]
@ CHECK: ands r3, r12, #15 @ encoding: [0x1c,0xf0,0x0f,0x03]
@ CHECK: and r1, r1, #255 @ encoding: [0x01,0xf0,0xff,0x01]
@ CHECK: and r1, r1, #255 @ encoding: [0x01,0xf0,0xff,0x01]
-
+@ CHECK: and r5, r4, #4294967295 @ encoding: [0x04,0xf0,0xff,0x35]
+@ CHECK: ands r1, r9, #4294967295 @ encoding: [0x19,0xf0,0xff,0x31]
@------------------------------------------------------------------------------
@ AND (register)
beq.w _bar
bmi.w #-183396
-@ CHECK: b.w _bar @ encoding: [A,0xf0'A',A,0x90'A']
+@ CHECK: b.w _bar @ encoding: [A,0xf0'A',A,0xb8'A']
@ fixup A - offset: 0, value: _bar, kind: fixup_t2_uncondbranch
@ CHECK: beq.w _bar @ encoding: [A,0xf0'A',A,0x80'A']
@ fixup A - offset: 0, value: _bar, kind: fixup_t2_condbranch
@ CHECK: it eq @ encoding: [0x08,0xbf]
-@ CHECK: beq.w _bar @ encoding: [A,0xf0'A',A,0x90'A']
+@ CHECK: beq.w _bar @ encoding: [A,0xf0'A',A,0xb8'A']
@ fixup A - offset: 0, value: _bar, kind: fixup_t2_uncondbranch
@ CHECK: bmi.w #-183396 @ encoding: [0x13,0xf5,0xce,0xa9]
@ BIC
@------------------------------------------------------------------------------
bic r10, r1, #0xf
+ bic r5, r2, #0xffffffff
+ bics r11, r10, #0xffffffff
bic r12, r3, r6
bic r11, r2, r6, lsl #12
bic r8, r4, r1, lsr #11
bic r12, r6, ror #29
@ CHECK: bic r10, r1, #15 @ encoding: [0x21,0xf0,0x0f,0x0a]
+@ CHECK: bic r5, r2, #4294967295 @ encoding: [0x22,0xf0,0xff,0x35]
+@ CHECK: bics r11, r10, #4294967295 @ encoding: [0x3a,0xf0,0xff,0x3b]
@ CHECK: bic.w r12, r3, r6 @ encoding: [0x23,0xea,0x06,0x0c]
@ CHECK: bic.w r11, r2, r6, lsl #12 @ encoding: [0x22,0xea,0x06,0x3b]
@ CHECK: bic.w r8, r4, r1, lsr #11 @ encoding: [0x24,0xea,0xd1,0x28]
@ CHECK: cmn.w r2, #2 @ encoding: [0x12,0xf1,0x02,0x0f]
@ CHECK: cmp.w r9, #1 @ encoding: [0xb9,0xf1,0x01,0x0f]
+@------------------------------------------------------------------------------
+@ CPS
+@------------------------------------------------------------------------------
+
+ cpsie f
+ cpsid a
+ cpsie.w f
+ cpsid.w a
+ cpsie i, #3
+ cpsie.w i, #3
+ cpsid f, #9
+ cpsid.w f, #9
+ cps #0
+ cps.w #0
+
+@ CHECK: cpsie f @ encoding: [0x61,0xb6]
+@ CHECK: cpsid a @ encoding: [0x74,0xb6]
+@ CHECK: cpsie.w f @ encoding: [0xaf,0xf3,0x20,0x84]
+@ CHECK: cpsid.w a @ encoding: [0xaf,0xf3,0x80,0x86]
+@ CHECK: cpsie i, #3 @ encoding: [0xaf,0xf3,0x43,0x85]
+@ CHECK: cpsie i, #3 @ encoding: [0xaf,0xf3,0x43,0x85]
+@ CHECK: cpsid f, #9 @ encoding: [0xaf,0xf3,0x29,0x87]
+@ CHECK: cpsid f, #9 @ encoding: [0xaf,0xf3,0x29,0x87]
+@ CHECK: cps #0 @ encoding: [0xaf,0xf3,0x00,0x81]
+@ CHECK: cps #0 @ encoding: [0xaf,0xf3,0x00,0x81]
@------------------------------------------------------------------------------
@ DBG
@ CHECK: ldm.w r4, {r5, r6} @ encoding: [0x94,0xe8,0x60,0x00]
@ CHECK: ldm.w r5!, {r3, r8} @ encoding: [0xb5,0xe8,0x08,0x01]
@ CHECK: ldm.w r5!, {r3, r8} @ encoding: [0xb5,0xe8,0x08,0x01]
-@ CHECK: pop.w {pc, r4, r5, r6, r7, r8, r9, r10, r11} @ encoding: [0xbd,0xe8,0xf0,0x8f]
+@ CHECK: pop.w {r4, r5, r6, r7, r8, r9, r10, r11, pc} @ encoding: [0xbd,0xe8,0xf0,0x8f]
@------------------------------------------------------------------------------
@ CHECK: ldr.w lr, _strcmp-4 @ encoding: [0x5f'A',0xf8'A',A,0xe0'A']
@ CHECK: @ fixup A - offset: 0, value: _strcmp-4, kind: fixup_t2_ldst_pcrel_12
+ ldr r7, [pc, #8]
+ ldr.n r7, [pc, #8]
+ ldr.w r7, [pc, #8]
+ ldr r4, [pc, #1020]
+ ldr r3, [pc, #-1020]
+ ldr r6, [pc, #1024]
+ ldr r0, [pc, #-1024]
+ ldr r2, [pc, #4095]
+ ldr r1, [pc, #-4095]
+ ldr r8, [pc, #132]
+ ldr pc, [pc, #256]
+ ldr pc, [pc, #-400]
+
+@ CHECK: ldr r7, [pc, #8] @ encoding: [0x02,0x4f]
+@ CHECK: ldr r7, [pc, #8] @ encoding: [0x02,0x4f]
+@ CHECK: ldr.w r7, [pc, #8] @ encoding: [0xdf,0xf8,0x08,0x70]
+@ CHECK: ldr r4, [pc, #1020] @ encoding: [0xff,0x4c]
+@ CHECK: ldr.w r3, [pc, #-1020] @ encoding: [0x5f,0xf8,0xfc,0x33]
+@ CHECK: ldr.w r6, [pc, #1024] @ encoding: [0xdf,0xf8,0x00,0x64]
+@ CHECK: ldr.w r0, [pc, #-1024] @ encoding: [0x5f,0xf8,0x00,0x04]
+@ CHECK: ldr.w r2, [pc, #4095] @ encoding: [0xdf,0xf8,0xff,0x2f]
+@ CHECK: ldr.w r1, [pc, #-4095] @ encoding: [0x5f,0xf8,0xff,0x1f]
+@ CHECK: ldr.w r8, [pc, #132] @ encoding: [0xdf,0xf8,0x84,0x80]
+@ CHECK: ldr.w pc, [pc, #256] @ encoding: [0xdf,0xf8,0x00,0xf1]
+@ CHECK: ldr.w pc, [pc, #-400] @ encoding: [0x5f,0xf8,0x90,0xf1]
+
+ ldrb r9, [pc, #-0]
+ ldrsb r11, [pc, #-0]
+ ldrh r10, [pc, #-0]
+ ldrsh r1, [pc, #-0]
+ ldr r5, [pc, #-0]
+
+@ CHECK: ldrb.w r9, [pc, #-0] @ encoding: [0x1f,0xf8,0x00,0x90]
+@ CHECK: ldrsb.w r11, [pc, #-0] @ encoding: [0x1f,0xf9,0x00,0xb0]
+@ CHECK: ldrh.w r10, [pc, #-0] @ encoding: [0x3f,0xf8,0x00,0xa0]
+@ CHECK: ldrsh.w r1, [pc, #-0] @ encoding: [0x3f,0xf9,0x00,0x10]
+@ CHECK: ldr.w r5, [pc, #-0] @ encoding: [0x5f,0xf8,0x00,0x50]
@------------------------------------------------------------------------------
@ LDR(register)
movlo r1, #-1
@ alias for mvn
- mov r3, #-3
+ mov r3, #-3
+ mov r11, #0xabcd
+ movs r0, #1
+ it ne
+ movne r3, #15
+ itt eq
+ moveq r0, #255
+ moveq r1, #256
@ CHECK: movs r1, #21 @ encoding: [0x15,0x21]
@ CHECK: movs.w r1, #21 @ encoding: [0x5f,0xf0,0x15,0x01]
@ CHECK: it lo @ encoding: [0x38,0xbf]
@ CHECK: movlo.w r1, #-1 @ encoding: [0x4f,0xf0,0xff,0x31]
@ CHECK: mvn r3, #2 @ encoding: [0x6f,0xf0,0x02,0x03]
+@ CHECK: movw r11, #43981 @ encoding: [0x4a,0xf6,0xcd,0x3b]
+@ CHECK: movs r0, #1 @ encoding: [0x01,0x20]
+@ CHECK: it ne @ encoding: [0x18,0xbf]
+@ CHECK: movne r3, #15 @ encoding: [0x0f,0x23]
+
+@ CHECK: itt eq @ encoding: [0x04,0xbf]
+@ CHECK: moveq r0, #255 @ encoding: [0xff,0x20]
+@ CHECK: movweq r1, #256 @ encoding: [0x40,0xf2,0x00,0x11]
@------------------------------------------------------------------------------
@ MOV(shifted register)
@ MRC/MRC2
@------------------------------------------------------------------------------
mrc p14, #0, r1, c1, c2, #4
- mrc2 p14, #0, r1, c1, c2, #4
- mrc p11, #1, r1, c2, c2
+ mrc p15, #7, apsr_nzcv, c15, c6, #6
+ mrc p11, #1, r1, c2, c2
mrc2 p12, #3, r3, c3, c4
-
-@ CHECK: mrc p14, #0, r1, c1, c2, #4 @ encoding: [0x11,0xee,0x92,0x1e]
-@ CHECK: mrc2 p14, #0, r1, c1, c2, #4 @ encoding: [0x11,0xfe,0x92,0x1e]
-@ CHECK: mrc p11, #1, r1, c2, c2, #0 @ encoding: [0x32,0xee,0x12,0x1b]
-@ CHECK: mrc2 p12, #3, r3, c3, c4, #0 @ encoding: [0x73,0xfe,0x14,0x3c]
-
-
+ mrc2 p14, #0, r1, c1, c2, #4
+ mrc2 p10, #7, apsr_nzcv, c15, c0, #1
+
+@ CHECK: mrc p14, #0, r1, c1, c2, #4 @ encoding: [0x11,0xee,0x92,0x1e]
+@ CHECK: mrc p15, #7, apsr_nzcv, c15, c6, #6 @ encoding: [0xff,0xee,0xd6,0xff]
+@ CHECK: mrc p11, #1, r1, c2, c2, #0 @ encoding: [0x32,0xee,0x12,0x1b]
+@ CHECK: mrc2 p12, #3, r3, c3, c4, #0 @ encoding: [0x73,0xfe,0x14,0x3c]
+@ CHECK: mrc2 p14, #0, r1, c1, c2, #4 @ encoding: [0x11,0xfe,0x92,0x1e]
+@ CHECK: mrc2 p10, #7, apsr_nzcv, c15, c0, #1 @ encoding: [0xff,0xfe,0x30,0xfa]
+
@------------------------------------------------------------------------------
@ MRRC/MRRC2
@------------------------------------------------------------------------------
@ FIXME: pld _foo @ encoding: [0x9f'A',0xf8'A',A,0xf0'A']
@ fixup A - offset: 0, value: _foo, kind: fixup_t2_ldst_pcrel_12
+ pld [pc,#-4095]
+@ CHECK: pld [pc, #-4095] @ encoding: [0x1f,0xf8,0xff,0xff]
+
@------------------------------------------------------------------------------
@ PLD(register)
pli [r6, #33]
pli [r6, #257]
pli [r7, #257]
+ pli [pc, #+4095]
+ pli [pc, #-4095]
@ CHECK: pli [r5, #-4] @ encoding: [0x15,0xf9,0x04,0xfc]
@ CHECK: pli [r6, #32] @ encoding: [0x96,0xf9,0x20,0xf0]
@ CHECK: pli [r6, #33] @ encoding: [0x96,0xf9,0x21,0xf0]
@ CHECK: pli [r6, #257] @ encoding: [0x96,0xf9,0x01,0xf1]
@ CHECK: pli [r7, #257] @ encoding: [0x97,0xf9,0x01,0xf1]
+@ CHECK: pli [pc, #4095] @ encoding: [0x9f,0xf9,0xff,0xff]
+@ CHECK: pli [pc, #-4095] @ encoding: [0x1f,0xf9,0xff,0xff]
@------------------------------------------------------------------------------
@ CHECK: srsia sp, #0 @ encoding: [0x8d,0xe9,0x00,0xc0]
@ CHECK: srsdb sp!, #19 @ encoding: [0x2d,0xe8,0x13,0xc0]
@ CHECK: srsia sp!, #2 @ encoding: [0xad,0xe9,0x02,0xc0]
-@ CHECK: srsdb sp, #10 @ encoding: [0x0d,0xe8,0x0a,0xc0]
-@ CHECK: srsia sp, #9 @ encoding: [0x8d,0xe9,0x09,0xc0]
-@ CHECK: srsdb sp!, #5 @ encoding: [0x2d,0xe8,0x05,0xc0]
+@ CHECK: srsia sp, #10 @ encoding: [0x8d,0xe9,0x0a,0xc0]
+@ CHECK: srsdb sp, #9 @ encoding: [0x0d,0xe8,0x09,0xc0]
@ CHECK: srsia sp!, #5 @ encoding: [0xad,0xe9,0x05,0xc0]
+@ CHECK: srsdb sp!, #5 @ encoding: [0x2d,0xe8,0x05,0xc0]
@ CHECK: srsia sp, #5 @ encoding: [0x8d,0xe9,0x05,0xc0]
@ CHECK: srsia sp!, #5 @ encoding: [0xad,0xe9,0x05,0xc0]
@ CHECK: srsia sp, #0 @ encoding: [0x8d,0xe9,0x00,0xc0]
@ CHECK: srsdb sp!, #19 @ encoding: [0x2d,0xe8,0x13,0xc0]
@ CHECK: srsia sp!, #2 @ encoding: [0xad,0xe9,0x02,0xc0]
-@ CHECK: srsdb sp, #10 @ encoding: [0x0d,0xe8,0x0a,0xc0]
-@ CHECK: srsia sp, #9 @ encoding: [0x8d,0xe9,0x09,0xc0]
-@ CHECK: srsdb sp!, #5 @ encoding: [0x2d,0xe8,0x05,0xc0]
+@ CHECK: srsia sp, #10 @ encoding: [0x8d,0xe9,0x0a,0xc0]
+@ CHECK: srsdb sp, #9 @ encoding: [0x0d,0xe8,0x09,0xc0]
@ CHECK: srsia sp!, #5 @ encoding: [0xad,0xe9,0x05,0xc0]
+@ CHECK: srsdb sp!, #5 @ encoding: [0x2d,0xe8,0x05,0xc0]
@ CHECK: srsia sp, #5 @ encoding: [0x8d,0xe9,0x05,0xc0]
@ CHECK: srsia sp!, #5 @ encoding: [0xad,0xe9,0x05,0xc0]
wfige
yieldlt
hint.w #4
+ hint.w #3
+ hint.w #2
+ hint.w #1
+ hint.w #0
+ hint #4
hint #3
hint #2
hint #1
hint #0
+ itet lt
+ hintlt #15
+ hintge #16
+ hintlt #239
+
@ CHECK: wfe @ encoding: [0x20,0xbf]
@ CHECK: wfi @ encoding: [0x30,0xbf]
@ CHECK: yield @ encoding: [0x10,0xbf]
@ CHECK: wfe.w @ encoding: [0xaf,0xf3,0x02,0x80]
@ CHECK: yield.w @ encoding: [0xaf,0xf3,0x01,0x80]
@ CHECK: nop.w @ encoding: [0xaf,0xf3,0x00,0x80]
+@ CHECK: sev @ encoding: [0x40,0xbf]
+@ CHECK: wfi @ encoding: [0x30,0xbf]
+@ CHECK: wfe @ encoding: [0x20,0xbf]
+@ CHECK: yield @ encoding: [0x10,0xbf]
+@ CHECK: nop @ encoding: [0x00,0xbf]
+
+@ CHECK: itet lt @ encoding: [0xb6,0xbf]
+@ CHECK: hintlt #15 @ encoding: [0xf0,0xbf]
+@ CHECK: hintge.w #16 @ encoding: [0xaf,0xf3,0x10,0x80]
+@ CHECK: hintlt.w #239 @ encoding: [0xaf,0xf3,0xef,0x80]
+@------------------------------------------------------------------------------
+@ Unallocated wide/narrow hints
+@------------------------------------------------------------------------------
+ hint #7
+ hint.w #7
+@ CHECK: hint #7 @ encoding: [0x70,0xbf]
+@ CHECK: hint.w #7 @ encoding: [0xaf,0xf3,0x07,0x80]
@------------------------------------------------------------------------------
@ Alternate syntax for LDR*(literal) encodings
@ CHECK: ldrsh.w r11, [pc, #-22] @ encoding: [0x3f,0xf9,0x16,0xb0]
@ rdar://12596361
- ldr r1, [pc, #12]
-@ CHECK: ldr.n r1, [pc, #12] @ encoding: [0x03,0x49]
+ ldr r1, [pc, #12]
+@ CHECK: ldr r1, [pc, #12] @ encoding: [0x03,0x49]
+
+@ rdar://14214063
+ subs pc, lr, #4
+@ CHECK: subs pc, lr, #4 @ encoding: [0xde,0xf3,0x04,0x8f]