Thumb2 assembler aliases for "mov(shifted register)"
[oota-llvm.git] / test / MC / ARM / basic-thumb2-instructions.s
index 5de5104ac30134bcebe9c0f790065e71c169e105..028e17bdc9a7cdc0454593ce6db29359418dd7c2 100644 (file)
@@ -581,6 +581,7 @@ _func:
         ldm r4, {r5, r6}
         ldm r5!, {r3, r8}
         ldmfd r5!, {r3, r8}
+        ldmia sp!, {r4-r11, pc}
 
 @ CHECK: ldm.w r4, {r4, r5, r8, r9}    @ encoding: [0x94,0xe8,0x30,0x03]
 @ CHECK: ldm.w r4, {r5, r6}            @ encoding: [0x94,0xe8,0x60,0x00]
@@ -598,6 +599,7 @@ _func:
 @ CHECK: ldm.w r4, {r5, r6}            @ encoding: [0x94,0xe8,0x60,0x00]
 @ CHECK: ldm.w r5!, {r3, r8}           @ encoding: [0xb5,0xe8,0x08,0x01]
 @ CHECK: ldm.w r5!, {r3, r8}           @ encoding: [0xb5,0xe8,0x08,0x01]
+@ CHECK: pop.w {pc, r4, r5, r6, r7, r8, r9, r10, r11} @ encoding: [0xbd,0xe8,0xf0,0x8f]
 
 
 @------------------------------------------------------------------------------
@@ -1145,6 +1147,18 @@ _func:
 
 @ CHECK: mvn   r3, #2                  @ encoding: [0x6f,0xf0,0x02,0x03]
 
+@------------------------------------------------------------------------------
+@ MOV(shifted register)
+@------------------------------------------------------------------------------
+        mov r6, r2, lsl #16
+        mov r6, r2, lsr #16
+        movs r6, r2, asr #32
+        movs r6, r2, ror #5
+
+@ CHECK: lsl.w r6, r2, #16             @ encoding: [0x4f,0xea,0x02,0x46]
+@ CHECK: lsr.w r6, r2, #16             @ encoding: [0x4f,0xea,0x12,0x46]
+@ CHECK: asrs  r6, r2, #32             @ encoding: [0x16,0x10]
+@ CHECK: rors.w        r6, r2, #5              @ encoding: [0x5f,0xea,0x72,0x16]
 
 
 @------------------------------------------------------------------------------
@@ -1236,7 +1250,7 @@ _func:
         muleq r3, r4, r5
         it le
         mulle r4, r4, r8
-        mul r6, r5
+        mul r5, r6
 
 @ CHECK: muls  r3, r4, r3              @ encoding: [0x63,0x43]
 @ CHECK: mul   r3, r4, r3              @ encoding: [0x04,0xfb,0x03,0xf3]
@@ -1245,7 +1259,7 @@ _func:
 @ CHECK: muleq r3, r4, r5              @ encoding: [0x04,0xfb,0x05,0xf3]
 @ CHECK: it    le                      @ encoding: [0xd8,0xbf]
 @ CHECK: mulle r4, r4, r8              @ encoding: [0x04,0xfb,0x08,0xf4]
-@ CHECK: mul   r6, r6, r5              @ encoding: [0x06,0xfb,0x05,0xf6]
+@ CHECK: mul   r5, r6, r5              @ encoding: [0x06,0xfb,0x05,0xf5]
 
 
 @------------------------------------------------------------------------------
@@ -1291,6 +1305,16 @@ _func:
 @ CHECK: it    eq                      @ encoding: [0x08,0xbf]
 @ CHECK: mvneq r2, r3                  @ encoding: [0xda,0x43]
 
+@------------------------------------------------------------------------------
+@ NEG
+@------------------------------------------------------------------------------
+        neg r5, r2
+        neg r5, r8
+
+@ CHECK: rsb.w r5, r2, #0              @ encoding: [0xc2,0xf1,0x00,0x05]
+@ CHECK: rsb.w r5, r8, #0              @ encoding: [0xc8,0xf1,0x00,0x05]
+
+
 @------------------------------------------------------------------------------
 @ NOP
 @------------------------------------------------------------------------------
@@ -1656,11 +1680,19 @@ _func:
         rsbs r3, r12, #0xf
         rsb r1, #0xff
         rsb r1, r1, #0xff
+        rsb r11, r11, #0
+        rsb r9, #0
+        rsbs r3, r1, #0
+        rsb r3, r1, #0
 
 @ CHECK: rsb.w r2, r5, #1044480        @ encoding: [0xc5,0xf5,0x7f,0x22]
 @ CHECK: rsbs.w        r3, r12, #15            @ encoding: [0xdc,0xf1,0x0f,0x03]
 @ CHECK: rsb.w r1, r1, #255            @ encoding: [0xc1,0xf1,0xff,0x01]
 @ CHECK: rsb.w r1, r1, #255            @ encoding: [0xc1,0xf1,0xff,0x01]
+@ CHECK: rsb.w r11, r11, #0            @ encoding: [0xcb,0xf1,0x00,0x0b]
+@ CHECK: rsb.w r9, r9, #0              @ encoding: [0xc9,0xf1,0x00,0x09]
+@ CHECK: rsbs  r3, r1, #0              @ encoding: [0x4b,0x42]
+@ CHECK: rsb.w r3, r1, #0              @ encoding: [0xc1,0xf1,0x00,0x03]
 
 
 @------------------------------------------------------------------------------