-; CHECK-NEXT: ldw r0, dp[pool]
-; CHECK-NEXT: stw r0, dp[pool]
-; CHECK-NEXT: ld16s r0, r1[r2]
-; CHECK-NEXT: st16 r0, r1[r2]
-; CHECK-NEXT: ld8u r0, r1[r2]
-; CHECK-NEXT: st8 r0, r1[r2]
+; CHECK-NEXT: ldw r[[R0]], dp[pool]
+; CHECK-NEXT: stw r[[R0]], dp[pool]
+; CHECK-NEXT: ld16s r[[R0]], r[[R1]][r[[R2]]]
+; CHECK-NEXT: st16 r[[R0]], r[[R1]][r[[R2]]]
+; CHECK-NEXT: ld8u r[[R0]], r[[R1]][r[[R2]]]
+; CHECK-NEXT: st8 r[[R0]], r[[R1]][r[[R2]]]