AVX512BW: Enable packed word shift for 512bit vector. Enable lowering scalar immidiat...

[oota-llvm.git] / test / CodeGen / X86 / vector-shift-lshr-512.ll

diff --git a/test/CodeGen/X86/vector-shift-lshr-512.ll b/test/CodeGen/X86/vector-shift-lshr-512.ll
index fd5f979ac4fd9cff1bdcfb306eda9c38f68d59e2..68644e61b0e5265f3a235ade091ba97f42343230 100644 (file)
--- a/test/CodeGen/X86/vector-shift-lshr-512.ll
+++ b/test/CodeGen/X86/vector-shift-lshr-512.ll
@@ -1,6 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; TODO: Add AVX512BW shift support
 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl -mattr=+avx512dq | FileCheck %s --check-prefix=ALL --check-prefix=AVX512 --check-prefix=AVX512DQ
+; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl -mattr=+avx512bw | FileCheck %s --check-prefix=ALL --check-prefix=AVX512 --check-prefix=AVX512BW
 
 ;
 ; Variable Shifts
@@ -25,63 +25,69 @@ define <16 x i32> @var_shift_v16i32(<16 x i32> %a, <16 x i32> %b) nounwind {
 }
 
 define <32 x i16> @var_shift_v32i16(<32 x i16> %a, <32 x i16> %b) nounwind {
-; ALL-LABEL: var_shift_v32i16:
-; ALL:       ## BB#0:
-; ALL-NEXT:    vpxor %ymm4, %ymm4, %ymm4
-; ALL-NEXT:    vpunpckhwd {{.*#+}} ymm5 = ymm2[4],ymm4[4],ymm2[5],ymm4[5],ymm2[6],ymm4[6],ymm2[7],ymm4[7],ymm2[12],ymm4[12],ymm2[13],ymm4[13],ymm2[14],ymm4[14],ymm2[15],ymm4[15]
-; ALL-NEXT:    vpunpckhwd {{.*#+}} ymm6 = ymm0[4,4,5,5,6,6,7,7,12,12,13,13,14,14,15,15]
-; ALL-NEXT:    vpsrlvd %ymm5, %ymm6, %ymm5
-; ALL-NEXT:    vpsrld $16, %ymm5, %ymm5
-; ALL-NEXT:    vpunpcklwd {{.*#+}} ymm2 = ymm2[0],ymm4[0],ymm2[1],ymm4[1],ymm2[2],ymm4[2],ymm2[3],ymm4[3],ymm2[8],ymm4[8],ymm2[9],ymm4[9],ymm2[10],ymm4[10],ymm2[11],ymm4[11]
-; ALL-NEXT:    vpunpcklwd {{.*#+}} ymm0 = ymm0[0,0,1,1,2,2,3,3,8,8,9,9,10,10,11,11]
-; ALL-NEXT:    vpsrlvd %ymm2, %ymm0, %ymm0
-; ALL-NEXT:    vpsrld $16, %ymm0, %ymm0
-; ALL-NEXT:    vpackusdw %ymm5, %ymm0, %ymm0
-; ALL-NEXT:    vpunpckhwd {{.*#+}} ymm2 = ymm3[4],ymm4[4],ymm3[5],ymm4[5],ymm3[6],ymm4[6],ymm3[7],ymm4[7],ymm3[12],ymm4[12],ymm3[13],ymm4[13],ymm3[14],ymm4[14],ymm3[15],ymm4[15]
-; ALL-NEXT:    vpunpckhwd {{.*#+}} ymm5 = ymm1[4,4,5,5,6,6,7,7,12,12,13,13,14,14,15,15]
-; ALL-NEXT:    vpsrlvd %ymm2, %ymm5, %ymm2
-; ALL-NEXT:    vpsrld $16, %ymm2, %ymm2
-; ALL-NEXT:    vpunpcklwd {{.*#+}} ymm3 = ymm3[0],ymm4[0],ymm3[1],ymm4[1],ymm3[2],ymm4[2],ymm3[3],ymm4[3],ymm3[8],ymm4[8],ymm3[9],ymm4[9],ymm3[10],ymm4[10],ymm3[11],ymm4[11]
-; ALL-NEXT:    vpunpcklwd {{.*#+}} ymm1 = ymm1[0,0,1,1,2,2,3,3,8,8,9,9,10,10,11,11]
-; ALL-NEXT:    vpsrlvd %ymm3, %ymm1, %ymm1
-; ALL-NEXT:    vpsrld $16, %ymm1, %ymm1
-; ALL-NEXT:    vpackusdw %ymm2, %ymm1, %ymm1
-; ALL-NEXT:    retq
+; AVX512DQ-LABEL: var_shift_v32i16:
+; AVX512DQ:       ## BB#0:
+; AVX512DQ-NEXT:    vpxor %ymm4, %ymm4, %ymm4
+; AVX512DQ-NEXT:    vpunpckhwd {{.*#+}} ymm5 = ymm2[4],ymm4[4],ymm2[5],ymm4[5],ymm2[6],ymm4[6],ymm2[7],ymm4[7],ymm2[12],ymm4[12],ymm2[13],ymm4[13],ymm2[14],ymm4[14],ymm2[15],ymm4[15]
+; AVX512DQ-NEXT:    vpunpckhwd {{.*#+}} ymm6 = ymm0[4,4,5,5,6,6,7,7,12,12,13,13,14,14,15,15]
+; AVX512DQ-NEXT:    vpsrlvd %ymm5, %ymm6, %ymm5
+; AVX512DQ-NEXT:    vpsrld $16, %ymm5, %ymm5
+; AVX512DQ-NEXT:    vpunpcklwd {{.*#+}} ymm2 = ymm2[0],ymm4[0],ymm2[1],ymm4[1],ymm2[2],ymm4[2],ymm2[3],ymm4[3],ymm2[8],ymm4[8],ymm2[9],ymm4[9],ymm2[10],ymm4[10],ymm2[11],ymm4[11]
+; AVX512DQ-NEXT:    vpunpcklwd {{.*#+}} ymm0 = ymm0[0,0,1,1,2,2,3,3,8,8,9,9,10,10,11,11]
+; AVX512DQ-NEXT:    vpsrlvd %ymm2, %ymm0, %ymm0
+; AVX512DQ-NEXT:    vpsrld $16, %ymm0, %ymm0
+; AVX512DQ-NEXT:    vpackusdw %ymm5, %ymm0, %ymm0
+; AVX512DQ-NEXT:    vpunpckhwd {{.*#+}} ymm2 = ymm3[4],ymm4[4],ymm3[5],ymm4[5],ymm3[6],ymm4[6],ymm3[7],ymm4[7],ymm3[12],ymm4[12],ymm3[13],ymm4[13],ymm3[14],ymm4[14],ymm3[15],ymm4[15]
+; AVX512DQ-NEXT:    vpunpckhwd {{.*#+}} ymm5 = ymm1[4,4,5,5,6,6,7,7,12,12,13,13,14,14,15,15]
+; AVX512DQ-NEXT:    vpsrlvd %ymm2, %ymm5, %ymm2
+; AVX512DQ-NEXT:    vpsrld $16, %ymm2, %ymm2
+; AVX512DQ-NEXT:    vpunpcklwd {{.*#+}} ymm3 = ymm3[0],ymm4[0],ymm3[1],ymm4[1],ymm3[2],ymm4[2],ymm3[3],ymm4[3],ymm3[8],ymm4[8],ymm3[9],ymm4[9],ymm3[10],ymm4[10],ymm3[11],ymm4[11]
+; AVX512DQ-NEXT:    vpunpcklwd {{.*#+}} ymm1 = ymm1[0,0,1,1,2,2,3,3,8,8,9,9,10,10,11,11]
+; AVX512DQ-NEXT:    vpsrlvd %ymm3, %ymm1, %ymm1
+; AVX512DQ-NEXT:    vpsrld $16, %ymm1, %ymm1
+; AVX512DQ-NEXT:    vpackusdw %ymm2, %ymm1, %ymm1
+; AVX512DQ-NEXT:    retq
+;
+; AVX512BW-LABEL: var_shift_v32i16:
+; AVX512BW:       ## BB#0:
+; AVX512BW-NEXT:    vpsrlvw %zmm1, %zmm0, %zmm0
+; AVX512BW-NEXT:    retq
   %shift = lshr <32 x i16> %a, %b
   ret <32 x i16> %shift
 }
 
 define <64 x i8> @var_shift_v64i8(<64 x i8> %a, <64 x i8> %b) nounwind {
-; ALL-LABEL: var_shift_v64i8:
-; ALL:       ## BB#0:
-; ALL-NEXT:    vpsrlw $4, %ymm0, %ymm4
-; ALL-NEXT:    vmovdqa {{.*#+}} ymm5 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
-; ALL-NEXT:    vpand %ymm5, %ymm4, %ymm4
-; ALL-NEXT:    vpsllw $5, %ymm2, %ymm2
-; ALL-NEXT:    vpblendvb %ymm2, %ymm4, %ymm0, %ymm0
-; ALL-NEXT:    vpsrlw $2, %ymm0, %ymm4
-; ALL-NEXT:    vmovdqa {{.*#+}} ymm6 = [63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63]
-; ALL-NEXT:    vpand %ymm6, %ymm4, %ymm4
-; ALL-NEXT:    vpaddb %ymm2, %ymm2, %ymm2
-; ALL-NEXT:    vpblendvb %ymm2, %ymm4, %ymm0, %ymm0
-; ALL-NEXT:    vpsrlw $1, %ymm0, %ymm4
-; ALL-NEXT:    vmovdqa {{.*#+}} ymm7 = [127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127]
-; ALL-NEXT:    vpand %ymm7, %ymm4, %ymm4
-; ALL-NEXT:    vpaddb %ymm2, %ymm2, %ymm2
-; ALL-NEXT:    vpblendvb %ymm2, %ymm4, %ymm0, %ymm0
-; ALL-NEXT:    vpsrlw $4, %ymm1, %ymm2
-; ALL-NEXT:    vpand %ymm5, %ymm2, %ymm2
-; ALL-NEXT:    vpsllw $5, %ymm3, %ymm3
-; ALL-NEXT:    vpblendvb %ymm3, %ymm2, %ymm1, %ymm1
-; ALL-NEXT:    vpsrlw $2, %ymm1, %ymm2
-; ALL-NEXT:    vpand %ymm6, %ymm2, %ymm2
-; ALL-NEXT:    vpaddb %ymm3, %ymm3, %ymm3
-; ALL-NEXT:    vpblendvb %ymm3, %ymm2, %ymm1, %ymm1
-; ALL-NEXT:    vpsrlw $1, %ymm1, %ymm2
-; ALL-NEXT:    vpand %ymm7, %ymm2, %ymm2
-; ALL-NEXT:    vpaddb %ymm3, %ymm3, %ymm3
-; ALL-NEXT:    vpblendvb %ymm3, %ymm2, %ymm1, %ymm1
-; ALL-NEXT:    retq
+; AVX512DQ-LABEL: var_shift_v64i8:
+; AVX512DQ:       ## BB#0:
+; AVX512DQ-NEXT:    vpsrlw $4, %ymm0, %ymm4
+; AVX512DQ-NEXT:    vmovdqa {{.*#+}} ymm5 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
+; AVX512DQ-NEXT:    vpand %ymm5, %ymm4, %ymm4
+; AVX512DQ-NEXT:    vpsllw $5, %ymm2, %ymm2
+; AVX512DQ-NEXT:    vpblendvb %ymm2, %ymm4, %ymm0, %ymm0
+; AVX512DQ-NEXT:    vpsrlw $2, %ymm0, %ymm4
+; AVX512DQ-NEXT:    vmovdqa {{.*#+}} ymm6 = [63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63]
+; AVX512DQ-NEXT:    vpand %ymm6, %ymm4, %ymm4
+; AVX512DQ-NEXT:    vpaddb %ymm2, %ymm2, %ymm2
+; AVX512DQ-NEXT:    vpblendvb %ymm2, %ymm4, %ymm0, %ymm0
+; AVX512DQ-NEXT:    vpsrlw $1, %ymm0, %ymm4
+; AVX512DQ-NEXT:    vmovdqa {{.*#+}} ymm7 = [127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127]
+; AVX512DQ-NEXT:    vpand %ymm7, %ymm4, %ymm4
+; AVX512DQ-NEXT:    vpaddb %ymm2, %ymm2, %ymm2
+; AVX512DQ-NEXT:    vpblendvb %ymm2, %ymm4, %ymm0, %ymm0
+; AVX512DQ-NEXT:    vpsrlw $4, %ymm1, %ymm2
+; AVX512DQ-NEXT:    vpand %ymm5, %ymm2, %ymm2
+; AVX512DQ-NEXT:    vpsllw $5, %ymm3, %ymm3
+; AVX512DQ-NEXT:    vpblendvb %ymm3, %ymm2, %ymm1, %ymm1
+; AVX512DQ-NEXT:    vpsrlw $2, %ymm1, %ymm2
+; AVX512DQ-NEXT:    vpand %ymm6, %ymm2, %ymm2
+; AVX512DQ-NEXT:    vpaddb %ymm3, %ymm3, %ymm3
+; AVX512DQ-NEXT:    vpblendvb %ymm3, %ymm2, %ymm1, %ymm1
+; AVX512DQ-NEXT:    vpsrlw $1, %ymm1, %ymm2
+; AVX512DQ-NEXT:    vpand %ymm7, %ymm2, %ymm2
+; AVX512DQ-NEXT:    vpaddb %ymm3, %ymm3, %ymm3
+; AVX512DQ-NEXT:    vpblendvb %ymm3, %ymm2, %ymm1, %ymm1
+; AVX512DQ-NEXT:    retq
+
   %shift = lshr <64 x i8> %a, %b
   ret <64 x i8> %shift
 }
@@ -113,48 +119,56 @@ define <16 x i32> @splatvar_shift_v16i32(<16 x i32> %a, <16 x i32> %b) nounwind
 }
 
 define <32 x i16> @splatvar_shift_v32i16(<32 x i16> %a, <32 x i16> %b) nounwind {
-; ALL-LABEL: splatvar_shift_v32i16:
-; ALL:       ## BB#0:
-; ALL-NEXT:    vmovd %xmm2, %eax
-; ALL-NEXT:    movzwl %ax, %eax
-; ALL-NEXT:    vmovd %eax, %xmm2
-; ALL-NEXT:    vpsrlw %xmm2, %ymm0, %ymm0
-; ALL-NEXT:    vpsrlw %xmm2, %ymm1, %ymm1
-; ALL-NEXT:    retq
+; AVX512DQ-LABEL: splatvar_shift_v32i16:
+; AVX512DQ:       ## BB#0:
+; AVX512DQ-NEXT:    vmovd %xmm2, %eax
+; AVX512DQ-NEXT:    movzwl %ax, %eax
+; AVX512DQ-NEXT:    vmovd %eax, %xmm2
+; AVX512DQ-NEXT:    vpsrlw %xmm2, %ymm0, %ymm0
+; AVX512DQ-NEXT:    vpsrlw %xmm2, %ymm1, %ymm1
+; AVX512DQ-NEXT:    retq
+;
+; AVX512BW-LABEL: splatvar_shift_v32i16:
+; AVX512BW:       ## BB#0:
+; AVX512BW-NEXT:    vmovd %xmm1, %eax
+; AVX512BW-NEXT:    movzwl %ax, %eax
+; AVX512BW-NEXT:    vmovd %eax, %xmm1
+; AVX512BW-NEXT:    vpsrlw %xmm1, %zmm0, %zmm0
+; AVX512BW-NEXT:    retq
   %splat = shufflevector <32 x i16> %b, <32 x i16> undef, <32 x i32> zeroinitializer
   %shift = lshr <32 x i16> %a, %splat
   ret <32 x i16> %shift
 }
 
 define <64 x i8> @splatvar_shift_v64i8(<64 x i8> %a, <64 x i8> %b) nounwind {
-; ALL-LABEL: splatvar_shift_v64i8:
-; ALL:       ## BB#0:
-; ALL-NEXT:    vpbroadcastb %xmm2, %ymm2
-; ALL-NEXT:    vpsrlw $4, %ymm0, %ymm3
-; ALL-NEXT:    vmovdqa {{.*#+}} ymm4 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
-; ALL-NEXT:    vpand %ymm4, %ymm3, %ymm3
-; ALL-NEXT:    vpsllw $5, %ymm2, %ymm2
-; ALL-NEXT:    vpblendvb %ymm2, %ymm3, %ymm0, %ymm0
-; ALL-NEXT:    vpsrlw $2, %ymm0, %ymm3
-; ALL-NEXT:    vmovdqa {{.*#+}} ymm5 = [63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63]
-; ALL-NEXT:    vpand %ymm5, %ymm3, %ymm3
-; ALL-NEXT:    vpaddb %ymm2, %ymm2, %ymm6
-; ALL-NEXT:    vpblendvb %ymm6, %ymm3, %ymm0, %ymm0
-; ALL-NEXT:    vpsrlw $1, %ymm0, %ymm3
-; ALL-NEXT:    vmovdqa {{.*#+}} ymm7 = [127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127]
-; ALL-NEXT:    vpand %ymm7, %ymm3, %ymm3
-; ALL-NEXT:    vpaddb %ymm6, %ymm6, %ymm8
-; ALL-NEXT:    vpblendvb %ymm8, %ymm3, %ymm0, %ymm0
-; ALL-NEXT:    vpsrlw $4, %ymm1, %ymm3
-; ALL-NEXT:    vpand %ymm4, %ymm3, %ymm3
-; ALL-NEXT:    vpblendvb %ymm2, %ymm3, %ymm1, %ymm1
-; ALL-NEXT:    vpsrlw $2, %ymm1, %ymm2
-; ALL-NEXT:    vpand %ymm5, %ymm2, %ymm2
-; ALL-NEXT:    vpblendvb %ymm6, %ymm2, %ymm1, %ymm1
-; ALL-NEXT:    vpsrlw $1, %ymm1, %ymm2
-; ALL-NEXT:    vpand %ymm7, %ymm2, %ymm2
-; ALL-NEXT:    vpblendvb %ymm8, %ymm2, %ymm1, %ymm1
-; ALL-NEXT:    retq
+; AVX512DQ-LABEL: splatvar_shift_v64i8:
+; AVX512DQ:       ## BB#0:
+; AVX512DQ-NEXT:    vpbroadcastb %xmm2, %ymm2
+; AVX512DQ-NEXT:    vpsrlw $4, %ymm0, %ymm3
+; AVX512DQ-NEXT:    vmovdqa {{.*#+}} ymm4 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
+; AVX512DQ-NEXT:    vpand %ymm4, %ymm3, %ymm3
+; AVX512DQ-NEXT:    vpsllw $5, %ymm2, %ymm2
+; AVX512DQ-NEXT:    vpblendvb %ymm2, %ymm3, %ymm0, %ymm0
+; AVX512DQ-NEXT:    vpsrlw $2, %ymm0, %ymm3
+; AVX512DQ-NEXT:    vmovdqa {{.*#+}} ymm5 = [63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63]
+; AVX512DQ-NEXT:    vpand %ymm5, %ymm3, %ymm3
+; AVX512DQ-NEXT:    vpaddb %ymm2, %ymm2, %ymm6
+; AVX512DQ-NEXT:    vpblendvb %ymm6, %ymm3, %ymm0, %ymm0
+; AVX512DQ-NEXT:    vpsrlw $1, %ymm0, %ymm3
+; AVX512DQ-NEXT:    vmovdqa {{.*#+}} ymm7 = [127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127]
+; AVX512DQ-NEXT:    vpand %ymm7, %ymm3, %ymm3
+; AVX512DQ-NEXT:    vpaddb %ymm6, %ymm6, %ymm8
+; AVX512DQ-NEXT:    vpblendvb %ymm8, %ymm3, %ymm0, %ymm0
+; AVX512DQ-NEXT:    vpsrlw $4, %ymm1, %ymm3
+; AVX512DQ-NEXT:    vpand %ymm4, %ymm3, %ymm3
+; AVX512DQ-NEXT:    vpblendvb %ymm2, %ymm3, %ymm1, %ymm1
+; AVX512DQ-NEXT:    vpsrlw $2, %ymm1, %ymm2
+; AVX512DQ-NEXT:    vpand %ymm5, %ymm2, %ymm2
+; AVX512DQ-NEXT:    vpblendvb %ymm6, %ymm2, %ymm1, %ymm1
+; AVX512DQ-NEXT:    vpsrlw $1, %ymm1, %ymm2
+; AVX512DQ-NEXT:    vpand %ymm7, %ymm2, %ymm2
+; AVX512DQ-NEXT:    vpblendvb %ymm8, %ymm2, %ymm1, %ymm1
+; AVX512DQ-NEXT:    retq
   %splat = shufflevector <64 x i8> %b, <64 x i8> undef, <64 x i32> zeroinitializer
   %shift = lshr <64 x i8> %a, %splat
   ret <64 x i8> %shift
@@ -183,60 +197,65 @@ define <16 x i32> @constant_shift_v16i32(<16 x i32> %a) nounwind {
 }
 
 define <32 x i16> @constant_shift_v32i16(<32 x i16> %a) nounwind {
-; ALL-LABEL: constant_shift_v32i16:
-; ALL:       ## BB#0:
-; ALL-NEXT:    vpxor %ymm2, %ymm2, %ymm2
-; ALL-NEXT:    vmovdqa {{.*#+}} ymm3 = [0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15]
-; ALL-NEXT:    vpunpckhwd {{.*#+}} ymm4 = ymm3[4],ymm2[4],ymm3[5],ymm2[5],ymm3[6],ymm2[6],ymm3[7],ymm2[7],ymm3[12],ymm2[12],ymm3[13],ymm2[13],ymm3[14],ymm2[14],ymm3[15],ymm2[15]
-; ALL-NEXT:    vpunpckhwd {{.*#+}} ymm5 = ymm0[4,4,5,5,6,6,7,7,12,12,13,13,14,14,15,15]
-; ALL-NEXT:    vpsrlvd %ymm4, %ymm5, %ymm5
-; ALL-NEXT:    vpsrld $16, %ymm5, %ymm5
-; ALL-NEXT:    vpunpcklwd {{.*#+}} ymm2 = ymm3[0],ymm2[0],ymm3[1],ymm2[1],ymm3[2],ymm2[2],ymm3[3],ymm2[3],ymm3[8],ymm2[8],ymm3[9],ymm2[9],ymm3[10],ymm2[10],ymm3[11],ymm2[11]
-; ALL-NEXT:    vpunpcklwd {{.*#+}} ymm0 = ymm0[0,0,1,1,2,2,3,3,8,8,9,9,10,10,11,11]
-; ALL-NEXT:    vpsrlvd %ymm2, %ymm0, %ymm0
-; ALL-NEXT:    vpsrld $16, %ymm0, %ymm0
-; ALL-NEXT:    vpackusdw %ymm5, %ymm0, %ymm0
-; ALL-NEXT:    vpunpckhwd {{.*#+}} ymm3 = ymm1[4,4,5,5,6,6,7,7,12,12,13,13,14,14,15,15]
-; ALL-NEXT:    vpsrlvd %ymm4, %ymm3, %ymm3
-; ALL-NEXT:    vpsrld $16, %ymm3, %ymm3
-; ALL-NEXT:    vpunpcklwd {{.*#+}} ymm1 = ymm1[0,0,1,1,2,2,3,3,8,8,9,9,10,10,11,11]
-; ALL-NEXT:    vpsrlvd %ymm2, %ymm1, %ymm1
-; ALL-NEXT:    vpsrld $16, %ymm1, %ymm1
-; ALL-NEXT:    vpackusdw %ymm3, %ymm1, %ymm1
-; ALL-NEXT:    retq
+; AVX512DQ-LABEL: constant_shift_v32i16:
+; AVX512DQ:       ## BB#0:
+; AVX512DQ-NEXT:    vpxor %ymm2, %ymm2, %ymm2
+; AVX512DQ-NEXT:    vmovdqa {{.*#+}} ymm3 = [0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15]
+; AVX512DQ-NEXT:    vpunpckhwd {{.*#+}} ymm4 = ymm3[4],ymm2[4],ymm3[5],ymm2[5],ymm3[6],ymm2[6],ymm3[7],ymm2[7],ymm3[12],ymm2[12],ymm3[13],ymm2[13],ymm3[14],ymm2[14],ymm3[15],ymm2[15]
+; AVX512DQ-NEXT:    vpunpckhwd {{.*#+}} ymm5 = ymm0[4,4,5,5,6,6,7,7,12,12,13,13,14,14,15,15]
+; AVX512DQ-NEXT:    vpsrlvd %ymm4, %ymm5, %ymm5
+; AVX512DQ-NEXT:    vpsrld $16, %ymm5, %ymm5
+; AVX512DQ-NEXT:    vpunpcklwd {{.*#+}} ymm2 = ymm3[0],ymm2[0],ymm3[1],ymm2[1],ymm3[2],ymm2[2],ymm3[3],ymm2[3],ymm3[8],ymm2[8],ymm3[9],ymm2[9],ymm3[10],ymm2[10],ymm3[11],ymm2[11]
+; AVX512DQ-NEXT:    vpunpcklwd {{.*#+}} ymm0 = ymm0[0,0,1,1,2,2,3,3,8,8,9,9,10,10,11,11]
+; AVX512DQ-NEXT:    vpsrlvd %ymm2, %ymm0, %ymm0
+; AVX512DQ-NEXT:    vpsrld $16, %ymm0, %ymm0
+; AVX512DQ-NEXT:    vpackusdw %ymm5, %ymm0, %ymm0
+; AVX512DQ-NEXT:    vpunpckhwd {{.*#+}} ymm3 = ymm1[4,4,5,5,6,6,7,7,12,12,13,13,14,14,15,15]
+; AVX512DQ-NEXT:    vpsrlvd %ymm4, %ymm3, %ymm3
+; AVX512DQ-NEXT:    vpsrld $16, %ymm3, %ymm3
+; AVX512DQ-NEXT:    vpunpcklwd {{.*#+}} ymm1 = ymm1[0,0,1,1,2,2,3,3,8,8,9,9,10,10,11,11]
+; AVX512DQ-NEXT:    vpsrlvd %ymm2, %ymm1, %ymm1
+; AVX512DQ-NEXT:    vpsrld $16, %ymm1, %ymm1
+; AVX512DQ-NEXT:    vpackusdw %ymm3, %ymm1, %ymm1
+; AVX512DQ-NEXT:    retq
+;
+; AVX512BW-LABEL: constant_shift_v32i16:
+; AVX512BW:       ## BB#0:
+; AVX512BW-NEXT:    vpsrlvw {{.*}}(%rip), %zmm0, %zmm0
+; AVX512BW-NEXT:    retq
   %shift = lshr <32 x i16> %a, <i16 0, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7, i16 8, i16 9, i16 10, i16 11, i16 12, i16 13, i16 14, i16 15, i16 0, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7, i16 8, i16 9, i16 10, i16 11, i16 12, i16 13, i16 14, i16 15>
   ret <32 x i16> %shift
 }
 
 define <64 x i8> @constant_shift_v64i8(<64 x i8> %a) nounwind {
-; ALL-LABEL: constant_shift_v64i8:
-; ALL:       ## BB#0:
-; ALL-NEXT:    vpsrlw $4, %ymm0, %ymm2
-; ALL-NEXT:    vmovdqa {{.*#+}} ymm3 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
-; ALL-NEXT:    vpand %ymm3, %ymm2, %ymm2
-; ALL-NEXT:    vmovdqa {{.*#+}} ymm4 = [0,1,2,3,4,5,6,7,7,6,5,4,3,2,1,0,0,1,2,3,4,5,6,7,7,6,5,4,3,2,1,0]
-; ALL-NEXT:    vpsllw $5, %ymm4, %ymm4
-; ALL-NEXT:    vpblendvb %ymm4, %ymm2, %ymm0, %ymm0
-; ALL-NEXT:    vpsrlw $2, %ymm0, %ymm2
-; ALL-NEXT:    vmovdqa {{.*#+}} ymm5 = [63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63]
-; ALL-NEXT:    vpand %ymm5, %ymm2, %ymm2
-; ALL-NEXT:    vpaddb %ymm4, %ymm4, %ymm6
-; ALL-NEXT:    vpblendvb %ymm6, %ymm2, %ymm0, %ymm0
-; ALL-NEXT:    vpsrlw $1, %ymm0, %ymm2
-; ALL-NEXT:    vmovdqa {{.*#+}} ymm7 = [127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127]
-; ALL-NEXT:    vpand %ymm7, %ymm2, %ymm2
-; ALL-NEXT:    vpaddb %ymm6, %ymm6, %ymm8
-; ALL-NEXT:    vpblendvb %ymm8, %ymm2, %ymm0, %ymm0
-; ALL-NEXT:    vpsrlw $4, %ymm1, %ymm2
-; ALL-NEXT:    vpand %ymm3, %ymm2, %ymm2
-; ALL-NEXT:    vpblendvb %ymm4, %ymm2, %ymm1, %ymm1
-; ALL-NEXT:    vpsrlw $2, %ymm1, %ymm2
-; ALL-NEXT:    vpand %ymm5, %ymm2, %ymm2
-; ALL-NEXT:    vpblendvb %ymm6, %ymm2, %ymm1, %ymm1
-; ALL-NEXT:    vpsrlw $1, %ymm1, %ymm2
-; ALL-NEXT:    vpand %ymm7, %ymm2, %ymm2
-; ALL-NEXT:    vpblendvb %ymm8, %ymm2, %ymm1, %ymm1
-; ALL-NEXT:    retq
+; AVX512DQ-LABEL: constant_shift_v64i8:
+; AVX512DQ:       ## BB#0:
+; AVX512DQ-NEXT:    vpsrlw $4, %ymm0, %ymm2
+; AVX512DQ-NEXT:    vmovdqa {{.*#+}} ymm3 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
+; AVX512DQ-NEXT:    vpand %ymm3, %ymm2, %ymm2
+; AVX512DQ-NEXT:    vmovdqa {{.*#+}} ymm4 = [0,1,2,3,4,5,6,7,7,6,5,4,3,2,1,0,0,1,2,3,4,5,6,7,7,6,5,4,3,2,1,0]
+; AVX512DQ-NEXT:    vpsllw $5, %ymm4, %ymm4
+; AVX512DQ-NEXT:    vpblendvb %ymm4, %ymm2, %ymm0, %ymm0
+; AVX512DQ-NEXT:    vpsrlw $2, %ymm0, %ymm2
+; AVX512DQ-NEXT:    vmovdqa {{.*#+}} ymm5 = [63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63]
+; AVX512DQ-NEXT:    vpand %ymm5, %ymm2, %ymm2
+; AVX512DQ-NEXT:    vpaddb %ymm4, %ymm4, %ymm6
+; AVX512DQ-NEXT:    vpblendvb %ymm6, %ymm2, %ymm0, %ymm0
+; AVX512DQ-NEXT:    vpsrlw $1, %ymm0, %ymm2
+; AVX512DQ-NEXT:    vmovdqa {{.*#+}} ymm7 = [127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127]
+; AVX512DQ-NEXT:    vpand %ymm7, %ymm2, %ymm2
+; AVX512DQ-NEXT:    vpaddb %ymm6, %ymm6, %ymm8
+; AVX512DQ-NEXT:    vpblendvb %ymm8, %ymm2, %ymm0, %ymm0
+; AVX512DQ-NEXT:    vpsrlw $4, %ymm1, %ymm2
+; AVX512DQ-NEXT:    vpand %ymm3, %ymm2, %ymm2
+; AVX512DQ-NEXT:    vpblendvb %ymm4, %ymm2, %ymm1, %ymm1
+; AVX512DQ-NEXT:    vpsrlw $2, %ymm1, %ymm2
+; AVX512DQ-NEXT:    vpand %ymm5, %ymm2, %ymm2
+; AVX512DQ-NEXT:    vpblendvb %ymm6, %ymm2, %ymm1, %ymm1
+; AVX512DQ-NEXT:    vpsrlw $1, %ymm1, %ymm2
+; AVX512DQ-NEXT:    vpand %ymm7, %ymm2, %ymm2
+; AVX512DQ-NEXT:    vpblendvb %ymm8, %ymm2, %ymm1, %ymm1
+; AVX512DQ-NEXT:    retq
   %shift = lshr <64 x i8> %a, <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0>
   ret <64 x i8> %shift
 }
@@ -264,24 +283,35 @@ define <16 x i32> @splatconstant_shift_v16i32(<16 x i32> %a) nounwind {
 }
 
 define <32 x i16> @splatconstant_shift_v32i16(<32 x i16> %a) nounwind {
-; ALL-LABEL: splatconstant_shift_v32i16:
-; ALL:       ## BB#0:
-; ALL-NEXT:    vpsrlw $3, %ymm0, %ymm0
-; ALL-NEXT:    vpsrlw $3, %ymm1, %ymm1
-; ALL-NEXT:    retq
+; AVX512DQ-LABEL: splatconstant_shift_v32i16:
+; AVX512DQ:       ## BB#0:
+; AVX512DQ-NEXT:    vpsrlw $3, %ymm0, %ymm0
+; AVX512DQ-NEXT:    vpsrlw $3, %ymm1, %ymm1
+; AVX512DQ-NEXT:    retq
+;
+; AVX512BW-LABEL: splatconstant_shift_v32i16:
+; AVX512BW:       ## BB#0:
+; AVX512BW-NEXT:    vpsrlw $3, %zmm0, %zmm0
+; AVX512BW-NEXT:    retq
   %shift = lshr <32 x i16> %a, <i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3>
   ret <32 x i16> %shift
 }
 
 define <64 x i8> @splatconstant_shift_v64i8(<64 x i8> %a) nounwind {
-; ALL-LABEL: splatconstant_shift_v64i8:
-; ALL:       ## BB#0:
-; ALL-NEXT:    vpsrlw $3, %ymm0, %ymm0
-; ALL-NEXT:    vmovdqa {{.*#+}} ymm2 = [31,31,31,31,31,31,31,31,31,31,31,31,31,31,31,31,31,31,31,31,31,31,31,31,31,31,31,31,31,31,31,31]
-; ALL-NEXT:    vpand %ymm2, %ymm0, %ymm0
-; ALL-NEXT:    vpsrlw $3, %ymm1, %ymm1
-; ALL-NEXT:    vpand %ymm2, %ymm1, %ymm1
-; ALL-NEXT:    retq
+; AVX512DQ-LABEL: splatconstant_shift_v64i8:
+; AVX512DQ:       ## BB#0:
+; AVX512DQ-NEXT:    vpsrlw $3, %ymm0, %ymm0
+; AVX512DQ-NEXT:    vmovdqa {{.*#+}} ymm2 = [31,31,31,31,31,31,31,31,31,31,31,31,31,31,31,31,31,31,31,31,31,31,31,31,31,31,31,31,31,31,31,31]
+; AVX512DQ-NEXT:    vpand %ymm2, %ymm0, %ymm0
+; AVX512DQ-NEXT:    vpsrlw $3, %ymm1, %ymm1
+; AVX512DQ-NEXT:    vpand %ymm2, %ymm1, %ymm1
+; AVX512DQ-NEXT:    retq
+;
+; AVX512BW-LABEL: splatconstant_shift_v64i8:
+; AVX512BW:       ## BB#0:
+; AVX512BW-NEXT:    vpsrlw $3, %zmm0, %zmm0
+; AVX512BW-NEXT:    vpandq {{.*}}(%rip), %zmm0, %zmm0
+; AVX512BW-NEXT:    retq
   %shift = lshr <64 x i8> %a, <i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3>
   ret <64 x i8> %shift
 }