[X86][SSE] Detect AVG pattern during instruction combine for SSE2/AVX2/AVX512BW.

[oota-llvm.git] / test / CodeGen / X86 / vec_extract.ll

diff --git a/test/CodeGen/X86/vec_extract.ll b/test/CodeGen/X86/vec_extract.ll
index 03d71b99d297b580413016545416b0b6c7ba7498..3b478880590d21db913da58b8f1eaf5d9e50e100 100644 (file)
--- a/test/CodeGen/X86/vec_extract.ll
+++ b/test/CodeGen/X86/vec_extract.ll
@@ -1,25 +1,74 @@
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep movss    | wc -l | grep 3
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep unpckhps | wc -l | grep 1
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep pshufd   | wc -l | grep 1
+; RUN: llc < %s -mcpu=corei7 -march=x86 -mattr=+sse2,-sse4.1 | FileCheck %s
 
-void %test1(<4 x float>* %F, float* %f) {
-       %tmp = load <4 x float>* %F
-       %tmp7 = add <4 x float> %tmp, %tmp
-       %tmp2 = extractelement <4 x float> %tmp7, uint 0
+target triple = "x86_64-unknown-linux-gnu"
+
+define void @test1(<4 x float>* %F, float* %f) nounwind {
+; CHECK-LABEL: test1:
+; CHECK:       # BB#0: # %entry
+; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %ecx
+; CHECK-NEXT:    movaps (%ecx), %xmm0
+; CHECK-NEXT:    addps %xmm0, %xmm0
+; CHECK-NEXT:    movss %xmm0, (%eax)
+; CHECK-NEXT:    retl
+entry:
+       %tmp = load <4 x float>, <4 x float>* %F                ; <<4 x float>> [#uses=2]
+       %tmp7 = fadd <4 x float> %tmp, %tmp             ; <<4 x float>> [#uses=1]
+       %tmp2 = extractelement <4 x float> %tmp7, i32 0         ; <float> [#uses=1]
        store float %tmp2, float* %f
        ret void
 }
 
-float %test2(<4 x float>* %F, float* %f) {
-       %tmp = load <4 x float>* %F
-       %tmp7 = add <4 x float> %tmp, %tmp
-       %tmp2 = extractelement <4 x float> %tmp7, uint 2
-        ret float %tmp2
+define float @test2(<4 x float>* %F, float* %f) nounwind {
+; CHECK-LABEL: test2:
+; CHECK:       # BB#0: # %entry
+; CHECK-NEXT:    pushl %eax
+; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; CHECK-NEXT:    movaps (%eax), %xmm0
+; CHECK-NEXT:    addps %xmm0, %xmm0
+; CHECK-NEXT:    shufpd {{.*#+}} xmm0 = xmm0[1,0]
+; CHECK-NEXT:    movss %xmm0, (%esp)
+; CHECK-NEXT:    flds (%esp)
+; CHECK-NEXT:    popl %eax
+; CHECK-NEXT:    retl
+entry:
+       %tmp = load <4 x float>, <4 x float>* %F                ; <<4 x float>> [#uses=2]
+       %tmp7 = fadd <4 x float> %tmp, %tmp             ; <<4 x float>> [#uses=1]
+       %tmp2 = extractelement <4 x float> %tmp7, i32 2         ; <float> [#uses=1]
+       ret float %tmp2
 }
 
-void %test2(float* %R, <4 x float>* %P1) {
-       %X = load <4 x float>* %P1
-       %tmp = extractelement <4 x float> %X, uint 2
+define void @test3(float* %R, <4 x float>* %P1) nounwind {
+; CHECK-LABEL: test3:
+; CHECK:       # BB#0: # %entry
+; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %ecx
+; CHECK-NEXT:    movss 12(%ecx), %xmm0
+; CHECK-NEXT:    movss %xmm0, (%eax)
+; CHECK-NEXT:    retl
+entry:
+       %X = load <4 x float>, <4 x float>* %P1         ; <<4 x float>> [#uses=1]
+       %tmp = extractelement <4 x float> %X, i32 3             ; <float> [#uses=1]
        store float %tmp, float* %R
        ret void
 }
+
+define double @test4(double %A) nounwind {
+; CHECK-LABEL: test4:
+; CHECK:       # BB#0: # %entry
+; CHECK-NEXT:    subl $12, %esp
+; CHECK-NEXT:    calll foo
+; CHECK-NEXT:    shufpd {{.*#+}} xmm0 = xmm0[1,0]
+; CHECK-NEXT:    addsd {{[0-9]+}}(%esp), %xmm0
+; CHECK-NEXT:    movsd %xmm0, (%esp)
+; CHECK-NEXT:    fldl (%esp)
+; CHECK-NEXT:    addl $12, %esp
+; CHECK-NEXT:    retl
+entry:
+       %tmp1 = call <2 x double> @foo( )               ; <<2 x double>> [#uses=1]
+       %tmp2 = extractelement <2 x double> %tmp1, i32 1                ; <double> [#uses=1]
+       %tmp3 = fadd double %tmp2, %A           ; <double> [#uses=1]
+       ret double %tmp3
+}
+
+declare <2 x double> @foo()