This CL changes the function prologue and epilogue emitted on X86 when stack needs...

[oota-llvm.git] / test / CodeGen / X86 / force-align-stack-alloca.ll

diff --git a/test/CodeGen/X86/force-align-stack-alloca.ll b/test/CodeGen/X86/force-align-stack-alloca.ll
index ecef781f880eb0bef941b8ce1e7db8ba9fd206f4..6d4455943709fdd4ec479a3beba81ebf5b818263 100644 (file)
--- a/test/CodeGen/X86/force-align-stack-alloca.ll
+++ b/test/CodeGen/X86/force-align-stack-alloca.ll
@@ -19,10 +19,10 @@ define i64 @g(i32 %i) nounwind {
 ; CHECK: g:
 ; CHECK:      pushl  %ebp
 ; CHECK-NEXT: movl   %esp, %ebp
-; CHECK-NEXT: andl   $-32, %esp
 ; CHECK-NEXT: pushl
 ; CHECK-NEXT: pushl
-; CHECK-NEXT: subl   $24, %esp
+; CHECK-NEXT: andl   $-32, %esp
+; CHECK-NEXT: subl   $32, %esp
 ;
 ; Now setup the base pointer (%ebx).
 ; CHECK-NEXT: movl   %esp, %ebx
@@ -46,17 +46,13 @@ define i64 @g(i32 %i) nounwind {
 ; CHECK-NEXT: addl   $32, %esp
 ; CHECK-NOT:         {{[^ ,]*}}, %esp
 ;
-; Restore %esp from %ebx (base pointer) so we can pop the callee-saved
-; registers.  This is the state prior to the allocation of VLAs.
+; Restore %esp from %ebp (frame pointer) and subtract the size of
+; zone with callee-saved registers to pop them.
+; This is the state prior to stack realignment and the allocation of VLAs.
 ; CHECK-NOT:  popl
-; CHECK:      movl   %ebx, %esp
-; CHECK-NEXT: addl   $24, %esp
+; CHECK:      leal   -8(%ebp), %esp
 ; CHECK-NEXT: popl
 ; CHECK-NEXT: popl
-;
-; Finally we need to restore %esp from %ebp due to dynamic stack
-; realignment.
-; CHECK-NEXT: movl   %ebp, %esp
 ; CHECK-NEXT: popl   %ebp
 ; CHECK-NEXT: ret