[AVX512] Bring back vector-shuffle lowering support through broadcasts

[oota-llvm.git] / test / CodeGen / X86 / fast-isel-constpool.ll

diff --git a/test/CodeGen/X86/fast-isel-constpool.ll b/test/CodeGen/X86/fast-isel-constpool.ll
index ac2595a7461d7f390b6291457e21fe9bfc016349..4e6f7c0f9e8e289a09ea2c41a4ed90661593e616 100644 (file)
--- a/test/CodeGen/X86/fast-isel-constpool.ll
+++ b/test/CodeGen/X86/fast-isel-constpool.ll
@@ -1,17 +1,23 @@
-; RUN: llvm-as < %s | llc -fast-isel | grep {LCPI1_0(%rip)}
-; Make sure fast isel uses rip-relative addressing when required.
-target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
-target triple = "x86_64-apple-darwin9.0"
+; RUN: llc -mtriple=x86_64-apple-darwin -fast-isel -code-model=small < %s | FileCheck %s
+; RUN: llc -mtriple=x86_64-apple-darwin -fast-isel -code-model=large < %s | FileCheck %s --check-prefix=LARGE
 
-define i32 @f0(double %x) nounwind {
-entry:
-       %retval = alloca i32            ; <i32*> [#uses=2]
-       %x.addr = alloca double         ; <double*> [#uses=2]
-       store double %x, double* %x.addr
-       %tmp = load double* %x.addr             ; <double> [#uses=1]
-       %cmp = fcmp olt double %tmp, 8.500000e-01               ; <i1> [#uses=1]
-       %conv = zext i1 %cmp to i32             ; <i32> [#uses=1]
-       store i32 %conv, i32* %retval
-       %0 = load i32* %retval          ; <i32> [#uses=1]
-       ret i32 %0
+; Make sure fast isel uses rip-relative addressing for the small code model.
+define float @constpool_float(float %x) {
+; CHECK-LABEL: constpool_float
+; CHECK:       LCPI0_0(%rip)
+
+; LARGE-LABEL: constpool_float
+; LARGE:       movabsq  $LCPI0_0, %rax
+  %1 = fadd float %x, 16.50e+01
+  ret float %1
+}
+
+define double @constpool_double(double %x) nounwind {
+; CHECK-LABEL: constpool_double
+; CHECK:       LCPI1_0(%rip)
+
+; LARGE-LABEL: constpool_double
+; LARGE:       movabsq  $LCPI1_0, %rax
+  %1 = fadd double %x, 8.500000e-01
+  ret double %1
 }