[AVX512] add PSLLD and PSLLQ Intrinsic

[oota-llvm.git] / test / CodeGen / X86 / avoid-loop-align-2.ll

diff --git a/test/CodeGen/X86/avoid-loop-align-2.ll b/test/CodeGen/X86/avoid-loop-align-2.ll
index 9f0aeb32c417f2c69710d8d33d6a31cad4bd2899..e02f3569c89d3c27b9e615fc1923dac966c0016d 100644 (file)
--- a/test/CodeGen/X86/avoid-loop-align-2.ll
+++ b/test/CodeGen/X86/avoid-loop-align-2.ll
@@ -1,4 +1,8 @@
-; RUN: llvm-as < %s | llc -march=x86 | grep align | count 3
+; RUN: llc < %s -march=x86 | grep align | count 4
+
+; TODO: Is it a good idea to align inner loops? It's hard to know without
+; knowing what their trip counts are, or other dynamic information. For
+; now, CodeGen aligns all loops.
 
 @x = external global i32*              ; <i32**> [#uses=1]
 
@@ -9,7 +13,7 @@ entry:
 
 bb.nph12:              ; preds = %entry
        %1 = icmp eq i32 %b, 0          ; <i1> [#uses=1]
-       %2 = load i32** @x, align 8             ; <i32*> [#uses=1]
+       %2 = load i32*, i32** @x, align 8               ; <i32*> [#uses=1]
        br i1 %1, label %bb2.preheader, label %bb2.preheader.us
 
 bb2.preheader.us:              ; preds = %bb2.bb3_crit_edge.us, %bb.nph12
@@ -22,8 +26,8 @@ bb1.us:               ; preds = %bb1.us, %bb2.preheader.us
        %indvar = phi i32 [ 0, %bb2.preheader.us ], [ %indvar.next, %bb1.us ]           ; <i32> [#uses=2]
        %tmp17 = add i32 %indvar, %tmp16                ; <i32> [#uses=1]
        %tmp. = zext i32 %tmp17 to i64          ; <i64> [#uses=1]
-       %3 = getelementptr i32* %2, i64 %tmp.           ; <i32*> [#uses=1]
-       %4 = load i32* %3, align 4              ; <i32> [#uses=2]
+       %3 = getelementptr i32, i32* %2, i64 %tmp.              ; <i32*> [#uses=1]
+       %4 = load i32, i32* %3, align 4         ; <i32> [#uses=2]
        %indvar.next = add i32 %indvar, 1               ; <i32> [#uses=2]
        %exitcond = icmp eq i32 %indvar.next, %b                ; <i1> [#uses=1]
        br i1 %exitcond, label %bb2.bb3_crit_edge.us, label %bb1.us