[ARM] Enable shrink-wrapping by default.

[oota-llvm.git] / test / CodeGen / SystemZ / cond-store-03.ll

diff --git a/test/CodeGen/SystemZ/cond-store-03.ll b/test/CodeGen/SystemZ/cond-store-03.ll
index 6f19fbc35980ec13f4173fcfe16af80a6a7c3b5d..7207164a631443d58c160facab65f3946c185d84 100644 (file)
--- a/test/CodeGen/SystemZ/cond-store-03.ll
+++ b/test/CodeGen/SystemZ/cond-store-03.ll
@@ -1,20 +1,20 @@
 ; Test 32-bit conditional stores that are presented as selects.
 ;
-; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
+; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s
 
 declare void @foo(i32 *)
 
 ; Test the simple case, with the loaded value first.
 define void @f1(i32 *%ptr, i32 %alt, i32 %limit) {
-; CHECK: f1:
+; CHECK-LABEL: f1:
 ; CHECK-NOT: %r2
 ; CHECK: jl [[LABEL:[^ ]*]]
 ; CHECK-NOT: %r2
 ; CHECK: st %r3, 0(%r2)
 ; CHECK: [[LABEL]]:
 ; CHECK: br %r14
-  %cond = icmp ult i32 %limit, 42
-  %orig = load i32 *%ptr
+  %cond = icmp ult i32 %limit, 420
+  %orig = load i32 , i32 *%ptr
   %res = select i1 %cond, i32 %orig, i32 %alt
   store i32 %res, i32 *%ptr
   ret void
@@ -22,15 +22,15 @@ define void @f1(i32 *%ptr, i32 %alt, i32 %limit) {
 
 ; ...and with the loaded value second
 define void @f2(i32 *%ptr, i32 %alt, i32 %limit) {
-; CHECK: f2:
+; CHECK-LABEL: f2:
 ; CHECK-NOT: %r2
-; CHECK: jnl [[LABEL:[^ ]*]]
+; CHECK: jhe [[LABEL:[^ ]*]]
 ; CHECK-NOT: %r2
 ; CHECK: st %r3, 0(%r2)
 ; CHECK: [[LABEL]]:
 ; CHECK: br %r14
-  %cond = icmp ult i32 %limit, 42
-  %orig = load i32 *%ptr
+  %cond = icmp ult i32 %limit, 420
+  %orig = load i32 , i32 *%ptr
   %res = select i1 %cond, i32 %alt, i32 %orig
   store i32 %res, i32 *%ptr
   ret void
@@ -39,15 +39,15 @@ define void @f2(i32 *%ptr, i32 %alt, i32 %limit) {
 ; Test cases where the value is explicitly sign-extended to 64 bits, with the
 ; loaded value first.
 define void @f3(i32 *%ptr, i64 %alt, i32 %limit) {
-; CHECK: f3:
+; CHECK-LABEL: f3:
 ; CHECK-NOT: %r2
 ; CHECK: jl [[LABEL:[^ ]*]]
 ; CHECK-NOT: %r2
 ; CHECK: st %r3, 0(%r2)
 ; CHECK: [[LABEL]]:
 ; CHECK: br %r14
-  %cond = icmp ult i32 %limit, 42
-  %orig = load i32 *%ptr
+  %cond = icmp ult i32 %limit, 420
+  %orig = load i32 , i32 *%ptr
   %ext = sext i32 %orig to i64
   %res = select i1 %cond, i64 %ext, i64 %alt
   %trunc = trunc i64 %res to i32
@@ -57,15 +57,15 @@ define void @f3(i32 *%ptr, i64 %alt, i32 %limit) {
 
 ; ...and with the loaded value second
 define void @f4(i32 *%ptr, i64 %alt, i32 %limit) {
-; CHECK: f4:
+; CHECK-LABEL: f4:
 ; CHECK-NOT: %r2
-; CHECK: jnl [[LABEL:[^ ]*]]
+; CHECK: jhe [[LABEL:[^ ]*]]
 ; CHECK-NOT: %r2
 ; CHECK: st %r3, 0(%r2)
 ; CHECK: [[LABEL]]:
 ; CHECK: br %r14
-  %cond = icmp ult i32 %limit, 42
-  %orig = load i32 *%ptr
+  %cond = icmp ult i32 %limit, 420
+  %orig = load i32 , i32 *%ptr
   %ext = sext i32 %orig to i64
   %res = select i1 %cond, i64 %alt, i64 %ext
   %trunc = trunc i64 %res to i32
@@ -76,15 +76,15 @@ define void @f4(i32 *%ptr, i64 %alt, i32 %limit) {
 ; Test cases where the value is explicitly zero-extended to 32 bits, with the
 ; loaded value first.
 define void @f5(i32 *%ptr, i64 %alt, i32 %limit) {
-; CHECK: f5:
+; CHECK-LABEL: f5:
 ; CHECK-NOT: %r2
 ; CHECK: jl [[LABEL:[^ ]*]]
 ; CHECK-NOT: %r2
 ; CHECK: st %r3, 0(%r2)
 ; CHECK: [[LABEL]]:
 ; CHECK: br %r14
-  %cond = icmp ult i32 %limit, 42
-  %orig = load i32 *%ptr
+  %cond = icmp ult i32 %limit, 420
+  %orig = load i32 , i32 *%ptr
   %ext = zext i32 %orig to i64
   %res = select i1 %cond, i64 %ext, i64 %alt
   %trunc = trunc i64 %res to i32
@@ -94,15 +94,15 @@ define void @f5(i32 *%ptr, i64 %alt, i32 %limit) {
 
 ; ...and with the loaded value second
 define void @f6(i32 *%ptr, i64 %alt, i32 %limit) {
-; CHECK: f6:
+; CHECK-LABEL: f6:
 ; CHECK-NOT: %r2
-; CHECK: jnl [[LABEL:[^ ]*]]
+; CHECK: jhe [[LABEL:[^ ]*]]
 ; CHECK-NOT: %r2
 ; CHECK: st %r3, 0(%r2)
 ; CHECK: [[LABEL]]:
 ; CHECK: br %r14
-  %cond = icmp ult i32 %limit, 42
-  %orig = load i32 *%ptr
+  %cond = icmp ult i32 %limit, 420
+  %orig = load i32 , i32 *%ptr
   %ext = zext i32 %orig to i64
   %res = select i1 %cond, i64 %alt, i64 %ext
   %trunc = trunc i64 %res to i32
@@ -112,16 +112,16 @@ define void @f6(i32 *%ptr, i64 %alt, i32 %limit) {
 
 ; Check the high end of the aligned ST range.
 define void @f7(i32 *%base, i32 %alt, i32 %limit) {
-; CHECK: f7:
+; CHECK-LABEL: f7:
 ; CHECK-NOT: %r2
 ; CHECK: jl [[LABEL:[^ ]*]]
 ; CHECK-NOT: %r2
 ; CHECK: st %r3, 4092(%r2)
 ; CHECK: [[LABEL]]:
 ; CHECK: br %r14
-  %ptr = getelementptr i32 *%base, i64 1023
-  %cond = icmp ult i32 %limit, 42
-  %orig = load i32 *%ptr
+  %ptr = getelementptr i32, i32 *%base, i64 1023
+  %cond = icmp ult i32 %limit, 420
+  %orig = load i32 , i32 *%ptr
   %res = select i1 %cond, i32 %orig, i32 %alt
   store i32 %res, i32 *%ptr
   ret void
@@ -129,16 +129,16 @@ define void @f7(i32 *%base, i32 %alt, i32 %limit) {
 
 ; Check the next word up, which should use STY instead of ST.
 define void @f8(i32 *%base, i32 %alt, i32 %limit) {
-; CHECK: f8:
+; CHECK-LABEL: f8:
 ; CHECK-NOT: %r2
 ; CHECK: jl [[LABEL:[^ ]*]]
 ; CHECK-NOT: %r2
 ; CHECK: sty %r3, 4096(%r2)
 ; CHECK: [[LABEL]]:
 ; CHECK: br %r14
-  %ptr = getelementptr i32 *%base, i64 1024
-  %cond = icmp ult i32 %limit, 42
-  %orig = load i32 *%ptr
+  %ptr = getelementptr i32, i32 *%base, i64 1024
+  %cond = icmp ult i32 %limit, 420
+  %orig = load i32 , i32 *%ptr
   %res = select i1 %cond, i32 %orig, i32 %alt
   store i32 %res, i32 *%ptr
   ret void
@@ -146,16 +146,16 @@ define void @f8(i32 *%base, i32 %alt, i32 %limit) {
 
 ; Check the high end of the aligned STY range.
 define void @f9(i32 *%base, i32 %alt, i32 %limit) {
-; CHECK: f9:
+; CHECK-LABEL: f9:
 ; CHECK-NOT: %r2
 ; CHECK: jl [[LABEL:[^ ]*]]
 ; CHECK-NOT: %r2
 ; CHECK: sty %r3, 524284(%r2)
 ; CHECK: [[LABEL]]:
 ; CHECK: br %r14
-  %ptr = getelementptr i32 *%base, i64 131071
-  %cond = icmp ult i32 %limit, 42
-  %orig = load i32 *%ptr
+  %ptr = getelementptr i32, i32 *%base, i64 131071
+  %cond = icmp ult i32 %limit, 420
+  %orig = load i32 , i32 *%ptr
   %res = select i1 %cond, i32 %orig, i32 %alt
   store i32 %res, i32 *%ptr
   ret void
@@ -164,7 +164,7 @@ define void @f9(i32 *%base, i32 %alt, i32 %limit) {
 ; Check the next word up, which needs separate address logic.
 ; Other sequences besides this one would be OK.
 define void @f10(i32 *%base, i32 %alt, i32 %limit) {
-; CHECK: f10:
+; CHECK-LABEL: f10:
 ; CHECK-NOT: %r2
 ; CHECK: jl [[LABEL:[^ ]*]]
 ; CHECK-NOT: %r2
@@ -172,9 +172,9 @@ define void @f10(i32 *%base, i32 %alt, i32 %limit) {
 ; CHECK: st %r3, 0(%r2)
 ; CHECK: [[LABEL]]:
 ; CHECK: br %r14
-  %ptr = getelementptr i32 *%base, i64 131072
-  %cond = icmp ult i32 %limit, 42
-  %orig = load i32 *%ptr
+  %ptr = getelementptr i32, i32 *%base, i64 131072
+  %cond = icmp ult i32 %limit, 420
+  %orig = load i32 , i32 *%ptr
   %res = select i1 %cond, i32 %orig, i32 %alt
   store i32 %res, i32 *%ptr
   ret void
@@ -182,16 +182,16 @@ define void @f10(i32 *%base, i32 %alt, i32 %limit) {
 
 ; Check the low end of the STY range.
 define void @f11(i32 *%base, i32 %alt, i32 %limit) {
-; CHECK: f11:
+; CHECK-LABEL: f11:
 ; CHECK-NOT: %r2
 ; CHECK: jl [[LABEL:[^ ]*]]
 ; CHECK-NOT: %r2
 ; CHECK: sty %r3, -524288(%r2)
 ; CHECK: [[LABEL]]:
 ; CHECK: br %r14
-  %ptr = getelementptr i32 *%base, i64 -131072
-  %cond = icmp ult i32 %limit, 42
-  %orig = load i32 *%ptr
+  %ptr = getelementptr i32, i32 *%base, i64 -131072
+  %cond = icmp ult i32 %limit, 420
+  %orig = load i32 , i32 *%ptr
   %res = select i1 %cond, i32 %orig, i32 %alt
   store i32 %res, i32 *%ptr
   ret void
@@ -200,7 +200,7 @@ define void @f11(i32 *%base, i32 %alt, i32 %limit) {
 ; Check the next word down, which needs separate address logic.
 ; Other sequences besides this one would be OK.
 define void @f12(i32 *%base, i32 %alt, i32 %limit) {
-; CHECK: f12:
+; CHECK-LABEL: f12:
 ; CHECK-NOT: %r2
 ; CHECK: jl [[LABEL:[^ ]*]]
 ; CHECK-NOT: %r2
@@ -208,9 +208,9 @@ define void @f12(i32 *%base, i32 %alt, i32 %limit) {
 ; CHECK: st %r3, 0(%r2)
 ; CHECK: [[LABEL]]:
 ; CHECK: br %r14
-  %ptr = getelementptr i32 *%base, i64 -131073
-  %cond = icmp ult i32 %limit, 42
-  %orig = load i32 *%ptr
+  %ptr = getelementptr i32, i32 *%base, i64 -131073
+  %cond = icmp ult i32 %limit, 420
+  %orig = load i32 , i32 *%ptr
   %res = select i1 %cond, i32 %orig, i32 %alt
   store i32 %res, i32 *%ptr
   ret void
@@ -218,7 +218,7 @@ define void @f12(i32 *%base, i32 %alt, i32 %limit) {
 
 ; Check that STY allows an index.
 define void @f13(i64 %base, i64 %index, i32 %alt, i32 %limit) {
-; CHECK: f13:
+; CHECK-LABEL: f13:
 ; CHECK-NOT: %r2
 ; CHECK: jl [[LABEL:[^ ]*]]
 ; CHECK-NOT: %r2
@@ -228,8 +228,8 @@ define void @f13(i64 %base, i64 %index, i32 %alt, i32 %limit) {
   %add1 = add i64 %base, %index
   %add2 = add i64 %add1, 4096
   %ptr = inttoptr i64 %add2 to i32 *
-  %cond = icmp ult i32 %limit, 42
-  %orig = load i32 *%ptr
+  %cond = icmp ult i32 %limit, 420
+  %orig = load i32 , i32 *%ptr
   %res = select i1 %cond, i32 %orig, i32 %alt
   store i32 %res, i32 *%ptr
   ret void
@@ -237,14 +237,14 @@ define void @f13(i64 %base, i64 %index, i32 %alt, i32 %limit) {
 
 ; Check that volatile loads are not matched.
 define void @f14(i32 *%ptr, i32 %alt, i32 %limit) {
-; CHECK: f14:
+; CHECK-LABEL: f14:
 ; CHECK: l {{%r[0-5]}}, 0(%r2)
 ; CHECK: {{jl|jnl}} [[LABEL:[^ ]*]]
 ; CHECK: [[LABEL]]:
 ; CHECK: st {{%r[0-5]}}, 0(%r2)
 ; CHECK: br %r14
-  %cond = icmp ult i32 %limit, 42
-  %orig = load volatile i32 *%ptr
+  %cond = icmp ult i32 %limit, 420
+  %orig = load volatile i32 , i32 *%ptr
   %res = select i1 %cond, i32 %orig, i32 %alt
   store i32 %res, i32 *%ptr
   ret void
@@ -252,14 +252,14 @@ define void @f14(i32 *%ptr, i32 %alt, i32 %limit) {
 
 ; ...likewise stores.  In this case we should have a conditional load into %r3.
 define void @f15(i32 *%ptr, i32 %alt, i32 %limit) {
-; CHECK: f15:
-; CHECK: jnl [[LABEL:[^ ]*]]
+; CHECK-LABEL: f15:
+; CHECK: jhe [[LABEL:[^ ]*]]
 ; CHECK: l %r3, 0(%r2)
 ; CHECK: [[LABEL]]:
 ; CHECK: st %r3, 0(%r2)
 ; CHECK: br %r14
-  %cond = icmp ult i32 %limit, 42
-  %orig = load i32 *%ptr
+  %cond = icmp ult i32 %limit, 420
+  %orig = load i32 , i32 *%ptr
   %res = select i1 %cond, i32 %orig, i32 %alt
   store volatile i32 %res, i32 *%ptr
   ret void
@@ -271,14 +271,14 @@ define void @f15(i32 *%ptr, i32 %alt, i32 %limit) {
 ; to restrict the test to a stronger ordering.
 define void @f16(i32 *%ptr, i32 %alt, i32 %limit) {
 ; FIXME: should use a normal load instead of CS.
-; CHECK: f16:
-; CHECK: cs {{%r[0-5]}}, {{%r[0-5]}}, 0(%r2)
+; CHECK-LABEL: f16:
+; CHECK: l {{%r[0-5]}}, 0(%r2)
 ; CHECK: {{jl|jnl}} [[LABEL:[^ ]*]]
 ; CHECK: [[LABEL]]:
 ; CHECK: st {{%r[0-5]}}, 0(%r2)
 ; CHECK: br %r14
-  %cond = icmp ult i32 %limit, 42
-  %orig = load atomic i32 *%ptr unordered, align 4
+  %cond = icmp ult i32 %limit, 420
+  %orig = load atomic i32 , i32 *%ptr unordered, align 4
   %res = select i1 %cond, i32 %orig, i32 %alt
   store i32 %res, i32 *%ptr
   ret void
@@ -287,14 +287,14 @@ define void @f16(i32 *%ptr, i32 %alt, i32 %limit) {
 ; ...likewise stores.
 define void @f17(i32 *%ptr, i32 %alt, i32 %limit) {
 ; FIXME: should use a normal store instead of CS.
-; CHECK: f17:
-; CHECK: jnl [[LABEL:[^ ]*]]
+; CHECK-LABEL: f17:
+; CHECK: jhe [[LABEL:[^ ]*]]
 ; CHECK: l %r3, 0(%r2)
 ; CHECK: [[LABEL]]:
-; CHECK: cs {{%r[0-5]}}, %r3, 0(%r2)
+; CHECK: st %r3, 0(%r2)
 ; CHECK: br %r14
-  %cond = icmp ult i32 %limit, 42
-  %orig = load i32 *%ptr
+  %cond = icmp ult i32 %limit, 420
+  %orig = load i32 , i32 *%ptr
   %res = select i1 %cond, i32 %orig, i32 %alt
   store atomic i32 %res, i32 *%ptr unordered, align 4
   ret void
@@ -302,7 +302,7 @@ define void @f17(i32 *%ptr, i32 %alt, i32 %limit) {
 
 ; Try a frame index base.
 define void @f18(i32 %alt, i32 %limit) {
-; CHECK: f18:
+; CHECK-LABEL: f18:
 ; CHECK: brasl %r14, foo@PLT
 ; CHECK-NOT: %r15
 ; CHECK: jl [[LABEL:[^ ]*]]
@@ -313,8 +313,8 @@ define void @f18(i32 %alt, i32 %limit) {
 ; CHECK: br %r14
   %ptr = alloca i32
   call void @foo(i32 *%ptr)
-  %cond = icmp ult i32 %limit, 42
-  %orig = load i32 *%ptr
+  %cond = icmp ult i32 %limit, 420
+  %orig = load i32 , i32 *%ptr
   %res = select i1 %cond, i32 %orig, i32 %alt
   store i32 %res, i32 *%ptr
   call void @foo(i32 *%ptr)