llvm/test/CodeGen/AArch64/tailcall_misched_graph.ll: s/REQUIRE/REQUIRES/

[oota-llvm.git] / test / CodeGen / PowerPC / stfiwx.ll

diff --git a/test/CodeGen/PowerPC/stfiwx.ll b/test/CodeGen/PowerPC/stfiwx.ll
index acc9c67aaf585af989c0c2f1d2531a4e6105893d..5f90dcad032d02d4312e5e77cb9022471a9f1bf8 100644 (file)
--- a/test/CodeGen/PowerPC/stfiwx.ll
+++ b/test/CodeGen/PowerPC/stfiwx.ll
@@ -1,21 +1,43 @@
-; RUN: llvm-as < %s | llc -march=ppc32 -mattr=stfiwx | grep stfiwx &&
-; RUN: llvm-as < %s | llc -march=ppc32 -mattr=stfiwx | not grep r1 &&
-; RUN: llvm-as < %s | llc -march=ppc32 -mattr=-stfiwx | not grep stfiwx &&
-; RUN: llvm-as < %s | llc -march=ppc32 -mattr=-stfiwx | grep r1
+; RUN: llc < %s -march=ppc32 -mtriple=powerpc-apple-darwin8 -mattr=stfiwx | FileCheck %s
+; RUN: llc < %s -march=ppc32 -mtriple=powerpc-apple-darwin8 -mattr=-stfiwx | FileCheck -check-prefix=CHECK-LS %s
 
-void %test(float %a, int* %b) {
-        %tmp.2 = cast float %a to int
-        store int %tmp.2, int* %b
+define void @test1(float %a, i32* %b) nounwind {
+; CHECK-LABEL: @test1
+; CHECK-LS-LABEL: @test1
+        %tmp.2 = fptosi float %a to i32         ; <i32> [#uses=1]
+        store i32 %tmp.2, i32* %b
         ret void
+
+; CHECK-NOT: lwz
+; CHECK-NOT: stw
+; CHECK: stfiwx
+; CHECK: blr
+
+; CHECK-LS: lwz
+; CHECK-LS: stw
+; CHECK-LS-NOT: stfiwx
+; CHECK-LS: blr
 }
 
-void %test2(float %a, int* %b, int %i) {
-        %tmp.2 = getelementptr int* %b, int 1
-        %tmp.5 = getelementptr int* %b, int %i
-        %tmp.7 = cast float %a to int
-        store int %tmp.7, int* %tmp.5
-        store int %tmp.7, int* %tmp.2
-        store int %tmp.7, int* %b
+define void @test2(float %a, i32* %b, i32 %i) nounwind {
+; CHECK-LABEL: @test2
+; CHECK-LS-LABEL: @test2
+        %tmp.2 = getelementptr i32, i32* %b, i32 1           ; <i32*> [#uses=1]
+        %tmp.5 = getelementptr i32, i32* %b, i32 %i          ; <i32*> [#uses=1]
+        %tmp.7 = fptosi float %a to i32         ; <i32> [#uses=3]
+        store i32 %tmp.7, i32* %tmp.5
+        store i32 %tmp.7, i32* %tmp.2
+        store i32 %tmp.7, i32* %b
         ret void
+
+; CHECK-NOT: lwz
+; CHECK-NOT: stw
+; CHECK: stfiwx
+; CHECK: blr
+
+; CHECK-LS: lwz
+; CHECK-LS: stw
+; CHECK-LS-NOT: stfiwx
+; CHECK-LS: blr
 }