Fix typo.

[oota-llvm.git] / test / CodeGen / PowerPC / anon_aggr.ll

diff --git a/test/CodeGen/PowerPC/anon_aggr.ll b/test/CodeGen/PowerPC/anon_aggr.ll
index 6c4f140de127b6417dccf56340155d18c2410105..9f9eed019c151074dc3f38d4a7f962d0c6fb752c 100644 (file)
--- a/test/CodeGen/PowerPC/anon_aggr.ll
+++ b/test/CodeGen/PowerPC/anon_aggr.ll
@@ -21,7 +21,7 @@ unequal:
 }
 
 ; CHECK-LABEL: func1:
-; CHECK: cmpld {{[0-9]+}}, 4, 5
+; CHECK: cmpld {{([0-9]+,)?}}4, 5
 ; CHECK-DAG: std 4, -[[OFFSET1:[0-9]+]]
 ; CHECK-DAG: std 5, -[[OFFSET2:[0-9]+]]
 ; CHECK: ld 3, -[[OFFSET1]](1)
@@ -31,7 +31,7 @@ unequal:
 ; DARWIN32: mr
 ; DARWIN32: mr r[[REG1:[0-9]+]], r[[REGA:[0-9]+]]
 ; DARWIN32: mr r[[REG2:[0-9]+]], r[[REGB:[0-9]+]]
-; DARWIN32: cmplw cr{{[0-9]+}}, r[[REGA]], r[[REGB]]
+; DARWIN32: cmplw {{(cr[0-9]+,)?}}r[[REGA]], r[[REGB]]
 ; DARWIN32: stw r[[REG1]], -[[OFFSET1:[0-9]+]]
 ; DARWIN32: stw r[[REG2]], -[[OFFSET2:[0-9]+]]
 ; DARWIN32: lwz r3, -[[OFFSET1]]
@@ -41,7 +41,7 @@ unequal:
 ; DARWIN64: mr
 ; DARWIN64: mr r[[REG1:[0-9]+]], r[[REGA:[0-9]+]]
 ; DARWIN64: mr r[[REG2:[0-9]+]], r[[REGB:[0-9]+]]
-; DARWIN64: cmpld cr{{[0-9]+}}, r[[REGA]], r[[REGB]]
+; DARWIN64: cmpld {{(cr[0-9]+,)?}}r[[REGA]], r[[REGB]]
 ; DARWIN64: std r[[REG1]], -[[OFFSET1:[0-9]+]]
 ; DARWIN64: std r[[REG2]], -[[OFFSET2:[0-9]+]]
 ; DARWIN64: ld r3, -[[OFFSET1]]
@@ -51,8 +51,8 @@ unequal:
 define i8* @func2({ i64, i8* } %array1, %tarray* byval %array2) {
 entry:
   %array1_ptr = extractvalue {i64, i8* } %array1, 1
-  %tmp = getelementptr inbounds %tarray* %array2, i32 0, i32 1
-  %array2_ptr = load i8** %tmp
+  %tmp = getelementptr inbounds %tarray, %tarray* %array2, i32 0, i32 1
+  %array2_ptr = load i8*, i8** %tmp
   %cond = icmp eq i8* %array1_ptr, %array2_ptr
   br i1 %cond, label %equal, label %unequal
 equal:
@@ -63,7 +63,7 @@ unequal:
 
 ; CHECK-LABEL: func2:
 ; CHECK: ld [[REG2:[0-9]+]], 72(1)
-; CHECK: cmpld {{[0-9]+}}, 4, [[REG2]]
+; CHECK: cmpld {{([0-9]+,)?}}4, [[REG2]]
 ; CHECK-DAG: std [[REG2]], -[[OFFSET1:[0-9]+]]
 ; CHECK-DAG: std 4, -[[OFFSET2:[0-9]+]]
 ; CHECK: ld 3, -[[OFFSET2]](1)
@@ -74,7 +74,7 @@ unequal:
 ; DARWIN32: lwz r[[REG2:[0-9]+]], 44(r[[REGSP]])
 ; DARWIN32: mr
 ; DARWIN32: mr r[[REG3:[0-9]+]], r[[REGA:[0-9]+]]
-; DARWIN32: cmplw cr{{[0-9]+}}, r[[REGA]], r[[REG2]]
+; DARWIN32: cmplw {{(cr[0-9]+,)?}}r[[REGA]], r[[REG2]]
 ; DARWIN32: stw r[[REG3]], -[[OFFSET1:[0-9]+]]
 ; DARWIN32: stw r[[REG2]], -[[OFFSET2:[0-9]+]]
 ; DARWIN32: lwz r3, -[[OFFSET1]]
@@ -84,7 +84,7 @@ unequal:
 ; DARWIN64: ld r[[REG2:[0-9]+]], 72(r1)
 ; DARWIN64: mr
 ; DARWIN64: mr r[[REG3:[0-9]+]], r[[REGA:[0-9]+]]
-; DARWIN64: cmpld cr{{[0-9]+}}, r[[REGA]], r[[REG2]]
+; DARWIN64: cmpld {{(cr[0-9]+,)?}}r[[REGA]], r[[REG2]]
 ; DARWIN64: std r[[REG3]], -[[OFFSET1:[0-9]+]]
 ; DARWIN64: std r[[REG2]], -[[OFFSET2:[0-9]+]]
 ; DARWIN64: ld r3, -[[OFFSET1]]
@@ -93,10 +93,10 @@ unequal:
 
 define i8* @func3({ i64, i8* }* byval %array1, %tarray* byval %array2) {
 entry:
-  %tmp1 = getelementptr inbounds { i64, i8* }* %array1, i32 0, i32 1
-  %array1_ptr = load i8** %tmp1
-  %tmp2 = getelementptr inbounds %tarray* %array2, i32 0, i32 1
-  %array2_ptr = load i8** %tmp2
+  %tmp1 = getelementptr inbounds { i64, i8* }, { i64, i8* }* %array1, i32 0, i32 1
+  %array1_ptr = load i8*, i8** %tmp1
+  %tmp2 = getelementptr inbounds %tarray, %tarray* %array2, i32 0, i32 1
+  %array2_ptr = load i8*, i8** %tmp2
   %cond = icmp eq i8* %array1_ptr, %array2_ptr
   br i1 %cond, label %equal, label %unequal
 equal:
@@ -108,7 +108,7 @@ unequal:
 ; CHECK-LABEL: func3:
 ; CHECK: ld [[REG3:[0-9]+]], 72(1)
 ; CHECK: ld [[REG4:[0-9]+]], 56(1)
-; CHECK: cmpld {{[0-9]+}}, [[REG4]], [[REG3]]
+; CHECK: cmpld {{([0-9]+,)?}}[[REG4]], [[REG3]]
 ; CHECK: std [[REG3]], -[[OFFSET1:[0-9]+]](1)
 ; CHECK: std [[REG4]], -[[OFFSET2:[0-9]+]](1)
 ; CHECK: ld 3, -[[OFFSET2]](1)
@@ -119,7 +119,7 @@ unequal:
 ; DARWIN32: addi r[[REG2:[0-9]+]], r[[REGSP]], 24
 ; DARWIN32: lwz r[[REG3:[0-9]+]], 44(r[[REGSP]])
 ; DARWIN32: lwz r[[REG4:[0-9]+]], 32(r[[REGSP]])
-; DARWIN32: cmplw cr{{[0-9]+}}, r[[REG4]], r[[REG3]]
+; DARWIN32: cmplw {{(cr[0-9]+,)?}}r[[REG4]], r[[REG3]]
 ; DARWIN32: stw r[[REG3]], -[[OFFSET1:[0-9]+]]
 ; DARWIN32: stw r[[REG4]], -[[OFFSET2:[0-9]+]]
 ; DARWIN32: lwz r3, -[[OFFSET2]]
@@ -128,7 +128,7 @@ unequal:
 ; DARWIN64: _func3:
 ; DARWIN64: ld r[[REG3:[0-9]+]], 72(r1)
 ; DARWIN64: ld r[[REG4:[0-9]+]], 56(r1)
-; DARWIN64: cmpld cr{{[0-9]+}}, r[[REG4]], r[[REG3]]
+; DARWIN64: cmpld {{(cr[0-9]+,)?}}r[[REG4]], r[[REG3]]
 ; DARWIN64: std r[[REG3]], -[[OFFSET1:[0-9]+]]
 ; DARWIN64: std r[[REG4]], -[[OFFSET2:[0-9]+]]
 ; DARWIN64: ld r3, -[[OFFSET2]]
@@ -140,8 +140,8 @@ define i8* @func4(i64 %p1, i64 %p2, i64 %p3, i64 %p4,
                   { i64, i8* } %array1, %tarray* byval %array2) {
 entry:
   %array1_ptr = extractvalue {i64, i8* } %array1, 1
-  %tmp = getelementptr inbounds %tarray* %array2, i32 0, i32 1
-  %array2_ptr = load i8** %tmp
+  %tmp = getelementptr inbounds %tarray, %tarray* %array2, i32 0, i32 1
+  %array2_ptr = load i8*, i8** %tmp
   %cond = icmp eq i8* %array1_ptr, %array2_ptr
   br i1 %cond, label %equal, label %unequal
 equal:
@@ -153,7 +153,7 @@ unequal:
 ; CHECK-LABEL: func4:
 ; CHECK: ld [[REG3:[0-9]+]], 136(1)
 ; CHECK: ld [[REG2:[0-9]+]], 120(1)
-; CHECK: cmpld {{[0-9]+}}, [[REG2]], [[REG3]]
+; CHECK: cmpld {{([0-9]+,)?}}[[REG2]], [[REG3]]
 ; CHECK: std [[REG3]], -[[OFFSET2:[0-9]+]](1)
 ; CHECK: std [[REG2]], -[[OFFSET1:[0-9]+]](1)
 ; CHECK: ld 3, -[[OFFSET1]](1)
@@ -164,8 +164,8 @@ unequal:
 ; DARWIN32: addi r[[REG1:[0-9]+]], r1, 100
 ; DARWIN32: lwz r[[REG3:[0-9]+]], 108(r1)
 ; DARWIN32: mr r[[REG2:[0-9]+]], r[[REG4]]
-; DARWIN32: cmplw cr{{[0-9]+}}, r[[REG4]], r[[REG3]]
-; DARWIN32: stw r[[REG4]], -[[OFFSET1:[0-9]+]]
+; DARWIN32: cmplw {{(cr[0-9]+,)?}}r[[REG4]], r[[REG3]]
+; DARWIN32: stw r[[REG2]], -[[OFFSET1:[0-9]+]]
 ; DARWIN32: stw r[[REG3]], -[[OFFSET2:[0-9]+]]
 ; DARWIN32: lwz r[[REG1]], -[[OFFSET1]]
 ; DARWIN32: lwz r[[REG1]], -[[OFFSET2]]
@@ -174,7 +174,7 @@ unequal:
 ; DARWIN64: ld r[[REG2:[0-9]+]], 120(r1)
 ; DARWIN64: ld r[[REG3:[0-9]+]], 136(r1)
 ; DARWIN64: mr r[[REG4:[0-9]+]], r[[REG2]]
-; DARWIN64: cmpld cr{{[0-9]+}}, r[[REG2]], r[[REG3]]
+; DARWIN64: cmpld {{(cr[0-9]+,)?}}r[[REG2]], r[[REG3]]
 ; DARWIN64: std r[[REG4]], -[[OFFSET1:[0-9]+]]
 ; DARWIN64: std r[[REG3]], -[[OFFSET2:[0-9]+]]
 ; DARWIN64: ld r3, -[[OFFSET1]]