[mips] Avoid redundant sign extension of the result of binary bitwise instructions.

[oota-llvm.git] / test / CodeGen / Mips / llvm-ir / and.ll

diff --git a/test/CodeGen/Mips/llvm-ir/and.ll b/test/CodeGen/Mips/llvm-ir/and.ll
index 09d0ef9238af4400cd871bf1ae22636ff1cb7384..eec98831bd637ebdb97607b3a075a9094d4e0496 100644 (file)
--- a/test/CodeGen/Mips/llvm-ir/and.ll
+++ b/test/CodeGen/Mips/llvm-ir/and.ll
@@ -51,10 +51,7 @@ define signext i32 @and_i32(i32 signext %a, i32 signext %b) {
 entry:
 ; ALL-LABEL: and_i32:
 
-  ; GP32:         and     $2, $4, $5
-
-  ; GP64:         and     $[[T0:[0-9]+]], $4, $5
-  ; GP64:         sll     $2, $[[T0]], 0
+  ; ALL:          and     $2, $4, $5
 
   %r = and i32 %a, %b
   ret i32 %r