Taints the non-acquire RMW's store address with the load part

[oota-llvm.git] / test / CodeGen / Mips / hf1_body.ll

diff --git a/test/CodeGen/Mips/hf1_body.ll b/test/CodeGen/Mips/hf1_body.ll
index b2cce92aa1a42516cb5fd1c809f6647309d42418..adf45109d69a4cbd634f6f51a96c23386b4e9c5c 100644 (file)
--- a/test/CodeGen/Mips/hf1_body.ll
+++ b/test/CodeGen/Mips/hf1_body.ll
@@ -1,4 +1,4 @@
-; RUN: llc  -mtriple=mipsel-linux-gnu -march=mipsel -mcpu=mips16  -relocation-model=pic -soft-float -mips16-hard-float < %s | FileCheck %s -check-prefix=picfp16
+; RUN: llc -mtriple=mipsel-linux-gnu -march=mipsel -mattr=mips16 -relocation-model=pic < %s | FileCheck %s -check-prefix=picfp16
 
 @x = external global float
 
@@ -7,15 +7,15 @@ define void @v_sf(float %p) #0 {
 entry:
   %p.addr = alloca float, align 4
   store float %p, float* %p.addr, align 4
-  %0 = load float* %p.addr, align 4
+  %0 = load float, float* %p.addr, align 4
   store float %0, float* @x, align 4
   ret void
 }
-; picfp16:     .ent    __fn_stub_v_sf
-; picfp16:     .cpload  $25
-; picfp16:     .set reorder
-; picfp16:     .reloc 0,R_MIPS_NONE,v_sf
-; picfp16:     la $25,$__fn_local_v_sf
-; picfp16:     mfc1 $4,$f12
-; picfp16:     jr $25
-; picfp16:     .end    __fn_stub_v_sf
+; picfp16: .ent __fn_stub_v_sf
+; picfp16: .cpload $25
+; picfp16: .set reorder
+; picfp16: .reloc 0, R_MIPS_NONE, v_sf
+; picfp16: la $25, $__fn_local_v_sf
+; picfp16: mfc1 $4, $f12
+; picfp16: jr $25
+; picfp16: .end __fn_stub_v_sf