MIR Serialization: Change MIR syntax - use custom syntax for MBBs.

[oota-llvm.git] / test / CodeGen / MIR / X86 / used-physical-register-info.mir

diff --git a/test/CodeGen/MIR/X86/used-physical-register-info.mir b/test/CodeGen/MIR/X86/used-physical-register-info.mir
index 7858fe29841b6a4e66cfc65bdaa1c57005775351..9a81578703e05ff75561646adab628b70e9a211a 100644 (file)
--- a/test/CodeGen/MIR/X86/used-physical-register-info.mir
+++ b/test/CodeGen/MIR/X86/used-physical-register-info.mir
@@ -41,13 +41,12 @@ liveins:
   - { reg: '%edi' }
 frameInfo:
   stackSize:     8
-body:
-  - id:          0
-    name:        body
-    liveins:     [ '%edi' ]
-    instructions:
-      - '%eax = IMUL32rri8 %edi, 11, implicit-def %eflags'
-      - 'RETQ %eax'
+body: |
+  bb.0.body:
+    liveins: %edi
+
+    %eax = IMUL32rri8 %edi, 11, implicit-def %eflags
+    RETQ %eax
 ...
 ---
 name:            foo
@@ -62,15 +61,14 @@ calleeSavedRegisters: [ '%bh', '%bl', '%bp', '%bpl', '%bx', '%ebp', '%ebx',
                         '%rbp', '%rbx', '%r12', '%r13', '%r14', '%r15',
                         '%r12b', '%r13b', '%r14b', '%r15b', '%r12d', '%r13d',
                         '%r14d', '%r15d', '%r12w', '%r13w', '%r14w', '%r15w' ]
-body:
-  - id:          0
-    name:        entry
-    liveins:     [ '%edi' ]
-    instructions:
-      - 'PUSH64r %rax, implicit-def %rsp, implicit %rsp'
-      - 'CALL64pcrel32 @compute, csr_64, implicit %rsp, implicit %edi, implicit-def %rsp, implicit-def %eax'
-      - '%rdx = POP64r implicit-def %rsp, implicit %rsp'
-      - 'RETQ %eax'
+body: |
+  bb.0.entry:
+    liveins: %edi
+
+    PUSH64r %rax, implicit-def %rsp, implicit %rsp
+    CALL64pcrel32 @compute, csr_64, implicit %rsp, implicit %edi, implicit-def %rsp, implicit-def %eax
+    %rdx = POP64r implicit-def %rsp, implicit %rsp
+    RETQ %eax
 ...
 ---
 name:            bar
@@ -83,15 +81,14 @@ liveins:
 # CHECK-NEXT:                    '%rbp', '%rbx', '%r12', '%r13', '%r14', '%r15',
 # CHECK-NEXT:                    '%r12b', '%r13b', '%r14b', '%r15b', '%r12d', '%r13d',
 # CHECK-NEXT:                    '%r14d', '%r15d', '%r12w', '%r13w', '%r14w', '%r15w' ]
-body:
-  - id:          0
-    name:        entry
-    liveins:     [ '%edi' ]
-    instructions:
-      - 'PUSH64r %rax, implicit-def %rsp, implicit %rsp'
-      - 'CALL64pcrel32 @compute, csr_64, implicit %rsp, implicit %edi, implicit-def %rsp, implicit-def %eax'
-      - '%rdx = POP64r implicit-def %rsp, implicit %rsp'
-      - 'RETQ %eax'
+body: |
+  bb.0.entry:
+    liveins: %edi
+
+    PUSH64r %rax, implicit-def %rsp, implicit %rsp
+    CALL64pcrel32 @compute, csr_64, implicit %rsp, implicit %edi, implicit-def %rsp, implicit-def %eax
+    %rdx = POP64r implicit-def %rsp, implicit %rsp
+    RETQ %eax
 ...
 ---
 name:            empty
@@ -101,13 +98,12 @@ liveins:
 # CHECK: name: empty
 # CHECK: calleeSavedRegisters: [ ]
 calleeSavedRegisters: [ ]
-body:
-  - id:          0
-    name:        entry
-    liveins:     [ '%edi' ]
-    instructions:
-      - 'PUSH64r %rax, implicit-def %rsp, implicit %rsp'
-      - 'CALL64pcrel32 @compute, csr_64, implicit %rsp, implicit %edi, implicit-def %rsp, implicit-def %eax'
-      - '%rdx = POP64r implicit-def %rsp, implicit %rsp'
-      - 'RETQ %eax'
+body: |
+  bb.0.entry:
+    liveins: %edi
+
+    PUSH64r %rax, implicit-def %rsp, implicit %rsp
+    CALL64pcrel32 @compute, csr_64, implicit %rsp, implicit %edi, implicit-def %rsp, implicit-def %eax
+    %rdx = POP64r implicit-def %rsp, implicit %rsp
+    RETQ %eax
 ...