MIR Serialization: Change MIR syntax - use custom syntax for MBBs.

[oota-llvm.git] / test / CodeGen / MIR / X86 / machine-basic-block-operands.mir

diff --git a/test/CodeGen/MIR/X86/machine-basic-block-operands.mir b/test/CodeGen/MIR/X86/machine-basic-block-operands.mir
index 25cb7a1211a68419db341f2b9dac1bfab2646c88..0d7a9f8ef34cb2b3722e04dae5c588a8e1b55c88 100644 (file)
--- a/test/CodeGen/MIR/X86/machine-basic-block-operands.mir
+++ b/test/CodeGen/MIR/X86/machine-basic-block-operands.mir
@@ -33,45 +33,41 @@
 ---
 # CHECK: name: foo
 name:            foo
-body:
- # CHECK: name: entry
- - id:              0
-   name:            entry
-   successors:      [ '%bb.1.less', '%bb.2.exit' ]
-   instructions:
-     - '%eax = MOV32rm %rdi, 1, _, 0, _'
-     # CHECK:      - 'CMP32ri8 %eax, 10
-     # CHECK-NEXT: - 'JG_1 %bb.2.exit
-     - 'CMP32ri8 %eax, 10, implicit-def %eflags'
-     - 'JG_1 %bb.2.exit, implicit %eflags'
- # CHECK: name: less
- - id:              1
-   name:            less
-   instructions:
-     - '%eax = MOV32r0 implicit-def %eflags'
- - id:              2
-   name:            exit
-   instructions:
-     - 'RETQ %eax'
+body: |
+  ; CHECK: bb.0.entry
+  bb.0.entry:
+    successors: %bb.1.less, %bb.2.exit
+
+    %eax = MOV32rm %rdi, 1, _, 0, _
+    ; CHECK:      CMP32ri8 %eax, 10
+    ; CHECK-NEXT: JG_1 %bb.2.exit
+    CMP32ri8 %eax, 10, implicit-def %eflags
+    JG_1 %bb.2.exit, implicit %eflags
+  ; CHECK: bb.1.less:
+
+  bb.1.less:
+    %eax = MOV32r0 implicit-def %eflags
+
+  bb.2.exit:
+    RETQ %eax
 ...
 ---
 # CHECK: name: bar
 name:            bar
-body:
- # CHECK: name: entry
- - id: 0
-   name: entry
-   successors:  [ '%bb.1', '%bb.3' ]
-   instructions:
-     - '%eax = MOV32rm %rdi, 1, _, 0, _'
-     # CHECK:      - 'CMP32ri8 %eax, 10
-     # CHECK-NEXT: - 'JG_1 %bb.2
-     - 'CMP32ri8 %eax, 10, implicit-def %eflags'
-     - 'JG_1 %bb.3, implicit %eflags'
- - id: 1
-   instructions:
-     - '%eax = MOV32r0 implicit-def %eflags'
- - id: 3
-   instructions:
-     - 'RETQ %eax'
+body: |
+  ; CHECK: bb.0.entry:
+  bb.0.entry:
+    successors: %bb.1, %bb.3
+
+    %eax = MOV32rm %rdi, 1, _, 0, _
+    ; CHECK:      CMP32ri8 %eax, 10
+    ; CHECK-NEXT: JG_1 %bb.2
+    CMP32ri8 %eax, 10, implicit-def %eflags
+    JG_1 %bb.3, implicit %eflags
+
+  bb.1:
+    %eax = MOV32r0 implicit-def %eflags
+
+  bb.3:
+    RETQ %eax
 ...