MIR Serialization: Change MIR syntax - use custom syntax for MBBs.

[oota-llvm.git] / test / CodeGen / MIR / X86 / cfi-def-cfa-register.mir

diff --git a/test/CodeGen/MIR/X86/cfi-def-cfa-register.mir b/test/CodeGen/MIR/X86/cfi-def-cfa-register.mir
index aad546494d7ceadcf99e4d1f8d0f3538ad2d440a..74a33b5c34375fb79c15c3e7eae8eb7bd2396479 100644 (file)
--- a/test/CodeGen/MIR/X86/cfi-def-cfa-register.mir
+++ b/test/CodeGen/MIR/X86/cfi-def-cfa-register.mir
@@ -19,15 +19,14 @@ frameInfo:
   stackSize:     8
 fixedStack:
   - { id: 0, type: spill-slot, offset: -16, size: 8, alignment: 16 }
-body:
-  - id:          0
-    name:        entry
-    liveins:     [ '%rbp' ]
-    instructions:
-      - 'PUSH64r killed %rbp, implicit-def %rsp, implicit %rsp'
-      - 'CFI_INSTRUCTION .cfi_def_cfa_offset 16'
-      - 'CFI_INSTRUCTION .cfi_offset %rbp, -16'
-      - '%rbp = MOV64rr %rsp'
-      # CHECK: CFI_INSTRUCTION .cfi_def_cfa_register %rbp
-      - 'CFI_INSTRUCTION .cfi_def_cfa_register %rbp'
+body: |
+  bb.0.entry:
+    liveins: %rbp
+
+    PUSH64r killed %rbp, implicit-def %rsp, implicit %rsp
+    CFI_INSTRUCTION .cfi_def_cfa_offset 16
+    CFI_INSTRUCTION .cfi_offset %rbp, -16
+    %rbp = MOV64rr %rsp
+    ; CHECK: CFI_INSTRUCTION .cfi_def_cfa_register %rbp
+    CFI_INSTRUCTION .cfi_def_cfa_register %rbp
 ...