; CHECK: add [[VR_TOP:x[0-9]+]], [[VR_TOPTMP]], #128
; CHECK: str [[VR_TOP]], [x[[VA_LIST]], #16]
-; CHECK: movn [[GR_OFFS:w[0-9]+]], #55
+; CHECK: movn [[GR_OFFS:w[0-9]+]], #0x37
; CHECK: str [[GR_OFFS]], [x[[VA_LIST]], #24]
; CHECK: orr [[VR_OFFS:w[0-9]+]], wzr, #0xffffff80
; CHECK: add [[VR_TOP:x[0-9]+]], [[VR_TOPTMP]], #112
; CHECK: str [[VR_TOP]], [x[[VA_LIST]], #16]
-; CHECK: movn [[GR_OFFS:w[0-9]+]], #39
+; CHECK: movn [[GR_OFFS:w[0-9]+]], #0x27
; CHECK: str [[GR_OFFS]], [x[[VA_LIST]], #24]
-; CHECK: movn [[VR_OFFS:w[0-9]+]], #111
+; CHECK: movn [[VR_OFFS:w[0-9]+]], #0x6f
; CHECK: str [[VR_OFFS]], [x[[VA_LIST]], #28]
%addr = bitcast %va_list* @var to i8*