define i32 @t6(i32 %a, i32 %b) nounwind readnone ssp {
entry:
; CHECK-LABEL: t6:
-; CHECK: lslv w0, w0, w1
+; CHECK: lsl w0, w0, w1
; CHECK: ret
%shl = shl i32 %a, %b
ret i32 %shl
define i64 @t7(i64 %a, i64 %b) nounwind readnone ssp {
entry:
; CHECK-LABEL: t7:
-; CHECK: lslv x0, x0, x1
+; CHECK: lsl x0, x0, x1
; CHECK: ret
%shl = shl i64 %a, %b
ret i64 %shl
define i32 @t8(i32 %a, i32 %b) nounwind readnone ssp {
entry:
; CHECK-LABEL: t8:
-; CHECK: lsrv w0, w0, w1
+; CHECK: lsr w0, w0, w1
; CHECK: ret
%lshr = lshr i32 %a, %b
ret i32 %lshr
define i64 @t9(i64 %a, i64 %b) nounwind readnone ssp {
entry:
; CHECK-LABEL: t9:
-; CHECK: lsrv x0, x0, x1
+; CHECK: lsr x0, x0, x1
; CHECK: ret
%lshr = lshr i64 %a, %b
ret i64 %lshr
define i32 @t10(i32 %a, i32 %b) nounwind readnone ssp {
entry:
; CHECK-LABEL: t10:
-; CHECK: asrv w0, w0, w1
+; CHECK: asr w0, w0, w1
; CHECK: ret
%ashr = ashr i32 %a, %b
ret i32 %ashr
define i64 @t11(i64 %a, i64 %b) nounwind readnone ssp {
entry:
; CHECK-LABEL: t11:
-; CHECK: asrv x0, x0, x1
+; CHECK: asr x0, x0, x1
; CHECK: ret
%ashr = ashr i64 %a, %b
ret i64 %ashr
define i64 @t17(i16 %a, i64 %x) nounwind ssp {
entry:
; CHECK-LABEL: t17:
-; CHECK: sxth [[REG:x[0-9]+]], x0
-; CHECK: sub x0, xzr, [[REG]], lsl #32
+; CHECK: sxth [[REG:x[0-9]+]], w0
+; CHECK: neg x0, [[REG]], lsl #32
; CHECK: ret
%tmp16 = sext i16 %a to i64
%tmp17 = mul i64 %tmp16, -4294967296