[WebAssembly] Don't perform the returned-argument optimization on constants.

[oota-llvm.git] / test / CodeGen / ARM / vceq.ll

diff --git a/test/CodeGen/ARM/vceq.ll b/test/CodeGen/ARM/vceq.ll
index 1af67e8d635cbfa7bdc7dd8b64300dfd713bbf38..3772401a2f95757767926d01b41a1ef04a121a94 100644 (file)
--- a/test/CodeGen/ARM/vceq.ll
+++ b/test/CodeGen/ARM/vceq.ll
@@ -1,69 +1,92 @@
-; RUN: llvm-as < %s | llc -march=arm -mattr=+neon > %t
-; RUN: grep {vceq\\.i8} %t | count 2
-; RUN: grep {vceq\\.i16} %t | count 2
-; RUN: grep {vceq\\.i32} %t | count 2
-; RUN: grep {vceq\\.f32} %t | count 2
+; RUN: llc -mtriple=arm-eabi -mattr=+neon %s -o - | FileCheck %s
 
 define <8 x i8> @vceqi8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
-       %tmp1 = load <8 x i8>* %A
-       %tmp2 = load <8 x i8>* %B
+;CHECK-LABEL: vceqi8:
+;CHECK: vceq.i8
+       %tmp1 = load <8 x i8>, <8 x i8>* %A
+       %tmp2 = load <8 x i8>, <8 x i8>* %B
        %tmp3 = icmp eq <8 x i8> %tmp1, %tmp2
         %tmp4 = sext <8 x i1> %tmp3 to <8 x i8>
        ret <8 x i8> %tmp4
 }
 
 define <4 x i16> @vceqi16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
-       %tmp1 = load <4 x i16>* %A
-       %tmp2 = load <4 x i16>* %B
+;CHECK-LABEL: vceqi16:
+;CHECK: vceq.i16
+       %tmp1 = load <4 x i16>, <4 x i16>* %A
+       %tmp2 = load <4 x i16>, <4 x i16>* %B
        %tmp3 = icmp eq <4 x i16> %tmp1, %tmp2
         %tmp4 = sext <4 x i1> %tmp3 to <4 x i16>
        ret <4 x i16> %tmp4
 }
 
 define <2 x i32> @vceqi32(<2 x i32>* %A, <2 x i32>* %B) nounwind {
-       %tmp1 = load <2 x i32>* %A
-       %tmp2 = load <2 x i32>* %B
+;CHECK-LABEL: vceqi32:
+;CHECK: vceq.i32
+       %tmp1 = load <2 x i32>, <2 x i32>* %A
+       %tmp2 = load <2 x i32>, <2 x i32>* %B
        %tmp3 = icmp eq <2 x i32> %tmp1, %tmp2
         %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
        ret <2 x i32> %tmp4
 }
 
 define <2 x i32> @vceqf32(<2 x float>* %A, <2 x float>* %B) nounwind {
-       %tmp1 = load <2 x float>* %A
-       %tmp2 = load <2 x float>* %B
+;CHECK-LABEL: vceqf32:
+;CHECK: vceq.f32
+       %tmp1 = load <2 x float>, <2 x float>* %A
+       %tmp2 = load <2 x float>, <2 x float>* %B
        %tmp3 = fcmp oeq <2 x float> %tmp1, %tmp2
         %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
        ret <2 x i32> %tmp4
 }
 
 define <16 x i8> @vceqQi8(<16 x i8>* %A, <16 x i8>* %B) nounwind {
-       %tmp1 = load <16 x i8>* %A
-       %tmp2 = load <16 x i8>* %B
+;CHECK-LABEL: vceqQi8:
+;CHECK: vceq.i8
+       %tmp1 = load <16 x i8>, <16 x i8>* %A
+       %tmp2 = load <16 x i8>, <16 x i8>* %B
        %tmp3 = icmp eq <16 x i8> %tmp1, %tmp2
         %tmp4 = sext <16 x i1> %tmp3 to <16 x i8>
        ret <16 x i8> %tmp4
 }
 
 define <8 x i16> @vceqQi16(<8 x i16>* %A, <8 x i16>* %B) nounwind {
-       %tmp1 = load <8 x i16>* %A
-       %tmp2 = load <8 x i16>* %B
+;CHECK-LABEL: vceqQi16:
+;CHECK: vceq.i16
+       %tmp1 = load <8 x i16>, <8 x i16>* %A
+       %tmp2 = load <8 x i16>, <8 x i16>* %B
        %tmp3 = icmp eq <8 x i16> %tmp1, %tmp2
         %tmp4 = sext <8 x i1> %tmp3 to <8 x i16>
        ret <8 x i16> %tmp4
 }
 
 define <4 x i32> @vceqQi32(<4 x i32>* %A, <4 x i32>* %B) nounwind {
-       %tmp1 = load <4 x i32>* %A
-       %tmp2 = load <4 x i32>* %B
+;CHECK-LABEL: vceqQi32:
+;CHECK: vceq.i32
+       %tmp1 = load <4 x i32>, <4 x i32>* %A
+       %tmp2 = load <4 x i32>, <4 x i32>* %B
        %tmp3 = icmp eq <4 x i32> %tmp1, %tmp2
         %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
        ret <4 x i32> %tmp4
 }
 
 define <4 x i32> @vceqQf32(<4 x float>* %A, <4 x float>* %B) nounwind {
-       %tmp1 = load <4 x float>* %A
-       %tmp2 = load <4 x float>* %B
+;CHECK-LABEL: vceqQf32:
+;CHECK: vceq.f32
+       %tmp1 = load <4 x float>, <4 x float>* %A
+       %tmp2 = load <4 x float>, <4 x float>* %B
        %tmp3 = fcmp oeq <4 x float> %tmp1, %tmp2
         %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
        ret <4 x i32> %tmp4
 }
+
+define <8 x i8> @vceqi8Z(<8 x i8>* %A) nounwind {
+;CHECK-LABEL: vceqi8Z:
+;CHECK-NOT: vmov
+;CHECK-NOT: vmvn
+;CHECK: vceq.i8
+       %tmp1 = load <8 x i8>, <8 x i8>* %A
+       %tmp3 = icmp eq <8 x i8> %tmp1, <i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0>
+        %tmp4 = sext <8 x i1> %tmp3 to <8 x i8>
+       ret <8 x i8> %tmp4
+}