[ARM] Enable shrink-wrapping by default.

[oota-llvm.git] / test / CodeGen / ARM / pack.ll

diff --git a/test/CodeGen/ARM/pack.ll b/test/CodeGen/ARM/pack.ll
index 791c95f08ecf3057fb3b27433fb63ce836fbce59..89abe28b0f5490312208e3d27265623fdc4abfb7 100644 (file)
--- a/test/CodeGen/ARM/pack.ll
+++ b/test/CodeGen/ARM/pack.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=arm -mattr=+v6 | FileCheck %s
+; RUN: llc -mtriple=arm-eabi -mattr=+v6 %s -o - | FileCheck %s
 
 ; CHECK: test1
 ; CHECK: pkhbt   r0, r0, r1, lsl #16
@@ -9,15 +9,6 @@ define i32 @test1(i32 %X, i32 %Y) {
        ret i32 %tmp5
 }
 
-; CHECK: test1a
-; CHECK: pkhbt   r0, r0, r1, lsl #16
-define i32 @test1a(i32 %X, i32 %Y) {
-       %tmp19 = and i32 %X, 65535
-       %tmp37 = shl i32 %Y, 16
-       %tmp5 = or i32 %tmp37, %tmp19
-       ret i32 %tmp5
-}
-
 ; CHECK: test2
 ; CHECK: pkhbt   r0, r0, r1, lsl #12
 define i32 @test2(i32 %X, i32 %Y) {
@@ -87,11 +78,34 @@ define i32 @test7(i32 %X, i32 %Y) {
        ret i32 %tmp57
 }
 
+; Arithmetic and logic right shift does not have the same semantics if shifting
+; by more than 16 in this context.
+
 ; CHECK: test8
-; CHECK: pkhtb   r0, r0, r1, asr #22
+; CHECK-NOT: pkhtb   r0, r0, r1, asr #22
 define i32 @test8(i32 %X, i32 %Y) {
        %tmp1 = and i32 %X, -65536
        %tmp3 = lshr i32 %Y, 22
        %tmp57 = or i32 %tmp3, %tmp1
        ret i32 %tmp57
 }
+
+; CHECK-LABEL: test9:
+; CHECK: pkhtb r0, r0, r1, asr #16
+define i32 @test9(i32 %src1, i32 %src2) {
+entry:
+    %tmp = and i32 %src1, -65536
+    %tmp2 = lshr i32 %src2, 16
+    %tmp3 = or i32 %tmp, %tmp2
+    ret i32 %tmp3
+}
+
+; CHECK-LABEL: test10:
+; CHECK: pkhtb r0, r0, r1, asr #17
+define i32 @test10(i32 %src1, i32 %src2) {
+entry:
+    %tmp = and i32 %src1, -65536
+    %tmp2 = ashr i32 %src2, 17
+    %tmp3 = or i32 %tmp, %tmp2
+    ret i32 %tmp3
+}