Add explicit -mtriple=arm-unknown to llvm/test/CodeGen/ARM/disable-tail-calls.ll...

[oota-llvm.git] / test / CodeGen / ARM / ifcvt1.ll

diff --git a/test/CodeGen/ARM/ifcvt1.ll b/test/CodeGen/ARM/ifcvt1.ll
index 21ebb2e747fc513e30c6d3db27c54b9d57fc1d6a..cae2399d873681c756d8efa6d5f2158be050d502 100644 (file)
--- a/test/CodeGen/ARM/ifcvt1.ll
+++ b/test/CodeGen/ARM/ifcvt1.ll
@@ -1,15 +1,21 @@
-; RUN: llvm-as < %s | llc -march=arm -enable-arm-if-conversion
-; RUN: llvm-as < %s | llc -march=arm -enable-arm-if-conversion | grep bx | count 1
+; RUN: llc -mtriple=arm-eabi -mcpu=cortex-a8 %s -o - | FileCheck %s -check-prefix=A8
+; RUN: llc -mtriple=arm-eabi -mcpu=swift %s -o - | FileCheck %s -check-prefix=SWIFT
 
 define i32 @t1(i32 %a, i32 %b) {
+; A8-LABEL: t1:
+; SWIFT-LABEL: t1:
        %tmp2 = icmp eq i32 %a, 0
        br i1 %tmp2, label %cond_false, label %cond_true
 
 cond_true:
+; A8: subeq r0, r1, #1
+; SWIFT: sub r0, r1, #1
        %tmp5 = add i32 %b, 1
        ret i32 %tmp5
 
 cond_false:
+; A8: addne r0, r1, #1
+; SWIFT: addne r0, r1, #1
        %tmp7 = add i32 %b, -1
        ret i32 %tmp7
 }