[AArch64] Fix bug in prolog clobbering live reg when shrink wrapping.

[oota-llvm.git] / test / CodeGen / ARM / func-argpassing-endian.ll

diff --git a/test/CodeGen/ARM/func-argpassing-endian.ll b/test/CodeGen/ARM/func-argpassing-endian.ll
index b32b09b962e7b42d4d83667676a556f2846fa7ca..26f0597a05a7cfc7efb42648cf4485990297ea56 100644 (file)
--- a/test/CodeGen/ARM/func-argpassing-endian.ll
+++ b/test/CodeGen/ARM/func-argpassing-endian.ll
@@ -22,11 +22,11 @@ define void @arg_double( double %val ) {
 
 define void @arg_v4i32(<4 x i32> %vec ) {
 ; CHECK-LABEL: arg_v4i32:
-; CHECK-LE: vmov d17, r2, r3
-; CHECK-LE: vmov d16, r0, r1
-; CHECK-BE: vmov d17, r3, r2
-; CHECK-BE: vmov d16, r1, r0
-; CHECK: vst1.32 {d16[0]}, [r0:32]
+; CHECK-LE: vmov {{d[0-9]+}}, r2, r3
+; CHECK-LE: vmov [[ARG_V4I32_REG:d[0-9]+]], r0, r1
+; CHECK-BE: vmov {{d[0-9]+}}, r3, r2
+; CHECK-BE: vmov [[ARG_V4I32_REG:d[0-9]+]], r1, r0
+; CHECK: vst1.32 {[[ARG_V4I32_REG]][0]}, [r0:32]
     %tmp = extractelement <4 x i32> %vec, i32 0
     store i32 %tmp, i32* @var32
     ret void
@@ -51,26 +51,26 @@ define i64 @return_longint() {
 
 define double @return_double() {
 ; CHECK-LABEL: return_double:
-; CHECK-LE: vmov r0, r1, d16
-; CHECK-BE: vmov r1, r0, d16
+; CHECK-LE: vmov r0, r1, {{d[0-9]+}}
+; CHECK-BE: vmov r1, r0, {{d[0-9]+}}
     ret double 1.0
 }
 
 define <4 x i32> @return_v4i32() {
 ; CHECK-LABEL: return_v4i32:
-; CHECK-LE: vmov r0, r1, d16
-; CHECK-LE: vmov r2, r3, d17
-; CHECK-BE: vmov r1, r0, d16
-; CHECK-BE: vmov r3, r2, d17
+; CHECK-LE: vmov r0, r1, {{d[0-9]+}}
+; CHECK-LE: vmov r2, r3, {{d[0-9]+}}
+; CHECK-BE: vmov r1, r0, {{d[0-9]+}}
+; CHECK-BE: vmov r3, r2, {{d[0-9]+}}
    ret < 4 x i32> < i32 42, i32 43, i32 44, i32 45 >
 }
 
 define <2 x double> @return_v2f64() {
 ; CHECK-LABEL: return_v2f64:
-; CHECK-LE: vmov r0, r1, d16
-; CHECK-LE: vmov r2, r3, d17
-; CHECK-BE: vmov r1, r0, d16
-; CHECK-BE: vmov r3, r2, d17
+; CHECK-LE: vmov r0, r1, {{d[0-9]+}}
+; CHECK-LE: vmov r2, r3, {{d[0-9]+}}
+; CHECK-BE: vmov r1, r0, {{d[0-9]+}}
+; CHECK-BE: vmov r3, r2, {{d[0-9]+}}
    ret <2 x double> < double 3.14, double 6.28 >
 }
 
@@ -86,8 +86,8 @@ define void @caller_arg_longint() {
 
 define void @caller_arg_double() {
 ; CHECK-LABEL: caller_arg_double:
-; CHECK-LE: vmov r0, r1, d16
-; CHECK-BE: vmov r1, r0, d16
+; CHECK-LE: vmov r0, r1, {{d[0-9]+}}
+; CHECK-BE: vmov r1, r0, {{d[0-9]+}}
    call void @arg_double( double 1.0 )
    ret void
 }
@@ -104,8 +104,8 @@ define void @caller_return_longint() {
 
 define void @caller_return_double() {
 ; CHECK-LABEL: caller_return_double:
-; CHECK-LE: vmov d17, r0, r1
-; CHECK-BE: vmov d17, r1, r0
+; CHECK-LE: vmov {{d[0-9]+}}, r0, r1
+; CHECK-BE: vmov {{d[0-9]+}}, r1, r0
   %val = call double @return_double( )
   %tmp = fadd double %val, 3.14
   store double  %tmp, double* @vardouble
@@ -120,4 +120,3 @@ define void @caller_return_v2f64() {
     store double %tmp, double* @vardouble
     ret void
 }
-