Guard fabs to bfc convert with V6T2 flag

[oota-llvm.git] / test / CodeGen / ARM / 2009-09-13-InvalidSuperReg.ll

diff --git a/test/CodeGen/ARM/2009-09-13-InvalidSuperReg.ll b/test/CodeGen/ARM/2009-09-13-InvalidSuperReg.ll
index dd9a6fd12d7e13b14a47dd76db02725644f19e56..b8a1479fd34c9e5de25f347d5a45a175af3f56a5 100644 (file)
--- a/test/CodeGen/ARM/2009-09-13-InvalidSuperReg.ll
+++ b/test/CodeGen/ARM/2009-09-13-InvalidSuperReg.ll
@@ -16,13 +16,13 @@ define arm_aapcs_vfpcc <4 x float> @foo(i8* nocapture %pBuffer, i32 %numItems) n
   %tmp3738 = inttoptr i32 %tmp37 to float*
   %tmp39 = add i32 %1, 24
   %tmp3940 = inttoptr i32 %tmp39 to float*
-  %2 = load float* %lsr.iv2641, align 4
-  %3 = load float* %tmp2930, align 4
-  %4 = load float* %tmp3132, align 4
-  %5 = load float* %tmp3334, align 4
-  %6 = load float* %tmp3536, align 4
-  %7 = load float* %tmp3738, align 4
-  %8 = load float* %tmp3940, align 4
+  %2 = load float, float* %lsr.iv2641, align 4
+  %3 = load float, float* %tmp2930, align 4
+  %4 = load float, float* %tmp3132, align 4
+  %5 = load float, float* %tmp3334, align 4
+  %6 = load float, float* %tmp3536, align 4
+  %7 = load float, float* %tmp3738, align 4
+  %8 = load float, float* %tmp3940, align 4
   %9 = insertelement <4 x float> undef, float %6, i32 0
   %10 = shufflevector <4 x float> %9, <4 x float> undef, <4 x i32> zeroinitializer
   %11 = insertelement <4 x float> %10, float %7, i32 1