Revert "[AArch64] Add DAG combine for extract extend pattern"

[oota-llvm.git] / test / CodeGen / AArch64 / zero-reg.ll

diff --git a/test/CodeGen/AArch64/zero-reg.ll b/test/CodeGen/AArch64/zero-reg.ll
index 44072c67d9042d8333f328c73b9aaf10f7f88b05..62b2ea34ade15dcd04f753a08b4290f70e164fb6 100644 (file)
--- a/test/CodeGen/AArch64/zero-reg.ll
+++ b/test/CodeGen/AArch64/zero-reg.ll
@@ -1,4 +1,4 @@
-; RUN: llc -verify-machineinstrs -o - %s -mtriple=arm64-linux-gnu | FileCheck %s
+; RUN: llc -verify-machineinstrs -o - %s -mtriple=aarch64-linux-gnu | FileCheck %s
 
 @var32 = global i32 0
 @var64 = global i64 0
@@ -21,7 +21,7 @@ define void @test_sp(i32 %val) {
 ; Important correctness point here is that LLVM doesn't try to use xzr
 ; as an addressing register: "str w0, [xzr]" is not a valid A64
 ; instruction (0b11111 in the Rn field would mean "sp").
-  %addr = getelementptr i32* null, i64 0
+  %addr = getelementptr i32, i32* null, i64 0
   store i32 %val, i32* %addr
 ; CHECK: str {{w[0-9]+}}, [{{x[0-9]+|sp}}]