Revert r237579, as it broke windows buildbots

[oota-llvm.git] / test / CodeGen / AArch64 / neon-truncStore-extLoad.ll

diff --git a/test/CodeGen/AArch64/neon-truncStore-extLoad.ll b/test/CodeGen/AArch64/neon-truncStore-extLoad.ll
index e5b76942446c4e9d6099b0705ff527944e7d3dab..0d5ebb324ecb6aae98a80f1e7a0c9db0ebddc4ce 100644 (file)
--- a/test/CodeGen/AArch64/neon-truncStore-extLoad.ll
+++ b/test/CodeGen/AArch64/neon-truncStore-extLoad.ll
@@ -5,7 +5,7 @@
 define void @truncStore.v2i64(<2 x i64> %a, <2 x i32>* %result) {
 ; CHECK-LABEL: truncStore.v2i64:
 ; CHECK: xtn v{{[0-9]+}}.2s, v{{[0-9]+}}.2d
-; CHECK: st1 {v{{[0-9]+}}.2s}, [x{{[0-9]+|sp}}]
+; CHECK: {{st1 { v[0-9]+.2s }|str d[0-9]+}}, [x{{[0-9]+|sp}}]
   %b = trunc <2 x i64> %a to <2 x i32>
   store <2 x i32> %b, <2 x i32>* %result
   ret void
@@ -14,7 +14,7 @@ define void @truncStore.v2i64(<2 x i64> %a, <2 x i32>* %result) {
 define void @truncStore.v4i32(<4 x i32> %a, <4 x i16>* %result) {
 ; CHECK-LABEL: truncStore.v4i32:
 ; CHECK: xtn v{{[0-9]+}}.4h, v{{[0-9]+}}.4s
-; CHECK: st1 {v{{[0-9]+}}.4h}, [x{{[0-9]+|sp}}]
+; CHECK: {{st1 { v[0-9]+.4h }|str d[0-9]+}}, [x{{[0-9]+|sp}}]
   %b = trunc <4 x i32> %a to <4 x i16>
   store <4 x i16> %b, <4 x i16>* %result
   ret void
@@ -23,7 +23,7 @@ define void @truncStore.v4i32(<4 x i32> %a, <4 x i16>* %result) {
 define void @truncStore.v8i16(<8 x i16> %a, <8 x i8>* %result) {
 ; CHECK-LABEL: truncStore.v8i16:
 ; CHECK: xtn v{{[0-9]+}}.8b, v{{[0-9]+}}.8h
-; CHECK: st1 {v{{[0-9]+}}.8b}, [x{{[0-9]+|sp}}]
+; CHECK: {{st1 { v[0-9]+.8b }|str d[0-9]+}}, [x{{[0-9]+|sp}}]
   %b = trunc <8 x i16> %a to <8 x i8>
   store <8 x i8> %b, <8 x i8>* %result
   ret void
@@ -34,7 +34,7 @@ define void @truncStore.v8i16(<8 x i16> %a, <8 x i8>* %result) {
 define <4 x i32> @loadSExt.v4i8(<4 x i8>* %ref) {
 ; CHECK-LABEL: loadSExt.v4i8:
 ; CHECK: ldrsb
-  %a = load <4 x i8>* %ref
+  %a = load <4 x i8>, <4 x i8>* %ref
   %conv = sext <4 x i8> %a to <4 x i32>
   ret <4 x i32> %conv
 }
@@ -42,7 +42,7 @@ define <4 x i32> @loadSExt.v4i8(<4 x i8>* %ref) {
 define <4 x i32> @loadZExt.v4i8(<4 x i8>* %ref) {
 ; CHECK-LABEL: loadZExt.v4i8:
 ; CHECK: ldrb
-  %a = load <4 x i8>* %ref
+  %a = load <4 x i8>, <4 x i8>* %ref
   %conv = zext <4 x i8> %a to <4 x i32>
   ret <4 x i32> %conv
 }
@@ -50,8 +50,8 @@ define <4 x i32> @loadZExt.v4i8(<4 x i8>* %ref) {
 define i32 @loadExt.i32(<4 x i8>* %ref) {
 ; CHECK-LABEL: loadExt.i32:
 ; CHECK: ldrb
-  %a = load <4 x i8>* %ref
+  %a = load <4 x i8>, <4 x i8>* %ref
   %vecext = extractelement <4 x i8> %a, i32 0
   %conv = zext i8 %vecext to i32
   ret i32 %conv
-}
\ No newline at end of file
+}