[FastISel][AArch64] Optimize compare-and-branch for i1 to use 'tbz'.

[oota-llvm.git] / test / CodeGen / AArch64 / neon-bitwise-instructions.ll

diff --git a/test/CodeGen/AArch64/neon-bitwise-instructions.ll b/test/CodeGen/AArch64/neon-bitwise-instructions.ll
index 228a6bfdf5ddb91b008bd08ef45de6ce308f46be..6497856c7d36c90e98e3517e829c13545b5ead45 100644 (file)
--- a/test/CodeGen/AArch64/neon-bitwise-instructions.ll
+++ b/test/CodeGen/AArch64/neon-bitwise-instructions.ll
@@ -1,5 +1,4 @@
 ; RUN: llc < %s -verify-machineinstrs -mtriple=aarch64-none-linux-gnu -mattr=+neon | FileCheck %s
-; RUN: llc < %s -verify-machineinstrs -mtriple=arm64-none-linux-gnu -mattr=+neon | FileCheck %s
 
 define <8 x i8> @and8xi8(<8 x i8> %a, <8 x i8> %b) {
 ; CHECK-LABEL: and8xi8: