[AArch64] Also custom-lowering mismatched vector/f16 FCOPYSIGN.

[oota-llvm.git] / test / CodeGen / AArch64 / f16-instructions.ll

diff --git a/test/CodeGen/AArch64/f16-instructions.ll b/test/CodeGen/AArch64/f16-instructions.ll
index 26fc3a9ae24dc2f3a1ad58bf75625383c1559149..99dc8e3301486b75d1333e1d023dad5e47d75093 100644 (file)
--- a/test/CodeGen/AArch64/f16-instructions.ll
+++ b/test/CodeGen/AArch64/f16-instructions.ll
@@ -666,17 +666,11 @@ define half @test_maxnum(half %a, half %b) #0 {
 }
 
 ; CHECK-LABEL: test_copysign:
-; CHECK-NEXT: sub sp, sp, #16
-; CHECK-NEXT: str h1, [sp, #8]
-; CHECK-NEXT: ldr x8, [sp, #8]
+; CHECK-NEXT: fcvt s1, h1
 ; CHECK-NEXT: fcvt s0, h0
-; CHECK-NEXT: fabs s0, s0
-; CHECK-NEXT: fneg s1, s0
-; CHECK-NEXT: lsl x8, x8, #48
-; CHECK-NEXT: cmp  x8, #0
-; CHECK-NEXT: fcsel s0, s1, s0, lt
+; CHECK-NEXT: movi.4s v2, #0x80, lsl #24
+; CHECK-NEXT: bit.16b v0, v1, v2
 ; CHECK-NEXT: fcvt h0, s0
-; CHECK-NEXT: add sp, sp, #16
 ; CHECK-NEXT: ret
 define half @test_copysign(half %a, half %b) #0 {
   %r = call half @llvm.copysign.f16(half %a, half %b)