Merging r258471:

[oota-llvm.git] / test / CodeGen / AArch64 / arm64-indexed-vector-ldst.ll

diff --git a/test/CodeGen/AArch64/arm64-indexed-vector-ldst.ll b/test/CodeGen/AArch64/arm64-indexed-vector-ldst.ll
index 9ee4063658b2de3ed71e4ec5da6a354877e7761c..98d4e3646f56cbd8afb291f22f0280337b08da84 100644 (file)
--- a/test/CodeGen/AArch64/arm64-indexed-vector-ldst.ll
+++ b/test/CodeGen/AArch64/arm64-indexed-vector-ldst.ll
@@ -1,12 +1,12 @@
-; RUN: llc -mtriple=arm64-apple-ios7.0 -o - %s | FileCheck %s
+; RUN: llc -mtriple=arm64-apple-ios7.0 -disable-post-ra -o - %s | FileCheck %s
 
 @ptr = global i8* null
 
 define <8 x i8> @test_v8i8_pre_load(<8 x i8>* %addr) {
 ; CHECK-LABEL: test_v8i8_pre_load:
 ; CHECK: ldr d0, [x0, #40]!
-  %newaddr = getelementptr <8 x i8>* %addr, i32 5
-  %val = load <8 x i8>* %newaddr, align 8
+  %newaddr = getelementptr <8 x i8>, <8 x i8>* %addr, i32 5
+  %val = load <8 x i8>, <8 x i8>* %newaddr, align 8
   store <8 x i8>* %newaddr, <8 x i8>** bitcast(i8** @ptr to <8 x i8>**)
   ret <8 x i8> %val
 }
@@ -14,8 +14,8 @@ define <8 x i8> @test_v8i8_pre_load(<8 x i8>* %addr) {
 define <8 x i8> @test_v8i8_post_load(<8 x i8>* %addr) {
 ; CHECK-LABEL: test_v8i8_post_load:
 ; CHECK: ldr d0, [x0], #40
-  %newaddr = getelementptr <8 x i8>* %addr, i32 5
-  %val = load <8 x i8>* %addr, align 8
+  %newaddr = getelementptr <8 x i8>, <8 x i8>* %addr, i32 5
+  %val = load <8 x i8>, <8 x i8>* %addr, align 8
   store <8 x i8>* %newaddr, <8 x i8>** bitcast(i8** @ptr to <8 x i8>**)
   ret <8 x i8> %val
 }
@@ -23,7 +23,7 @@ define <8 x i8> @test_v8i8_post_load(<8 x i8>* %addr) {
 define void @test_v8i8_pre_store(<8 x i8> %in, <8 x i8>* %addr) {
 ; CHECK-LABEL: test_v8i8_pre_store:
 ; CHECK: str d0, [x0, #40]!
-  %newaddr = getelementptr <8 x i8>* %addr, i32 5
+  %newaddr = getelementptr <8 x i8>, <8 x i8>* %addr, i32 5
   store <8 x i8> %in, <8 x i8>* %newaddr, align 8
   store <8 x i8>* %newaddr, <8 x i8>** bitcast(i8** @ptr to <8 x i8>**)
   ret void
@@ -32,7 +32,7 @@ define void @test_v8i8_pre_store(<8 x i8> %in, <8 x i8>* %addr) {
 define void @test_v8i8_post_store(<8 x i8> %in, <8 x i8>* %addr) {
 ; CHECK-LABEL: test_v8i8_post_store:
 ; CHECK: str d0, [x0], #40
-  %newaddr = getelementptr <8 x i8>* %addr, i32 5
+  %newaddr = getelementptr <8 x i8>, <8 x i8>* %addr, i32 5
   store <8 x i8> %in, <8 x i8>* %addr, align 8
   store <8 x i8>* %newaddr, <8 x i8>** bitcast(i8** @ptr to <8 x i8>**)
   ret void
@@ -41,8 +41,8 @@ define void @test_v8i8_post_store(<8 x i8> %in, <8 x i8>* %addr) {
 define <4 x i16> @test_v4i16_pre_load(<4 x i16>* %addr) {
 ; CHECK-LABEL: test_v4i16_pre_load:
 ; CHECK: ldr d0, [x0, #40]!
-  %newaddr = getelementptr <4 x i16>* %addr, i32 5
-  %val = load <4 x i16>* %newaddr, align 8
+  %newaddr = getelementptr <4 x i16>, <4 x i16>* %addr, i32 5
+  %val = load <4 x i16>, <4 x i16>* %newaddr, align 8
   store <4 x i16>* %newaddr, <4 x i16>** bitcast(i8** @ptr to <4 x i16>**)
   ret <4 x i16> %val
 }
@@ -50,8 +50,8 @@ define <4 x i16> @test_v4i16_pre_load(<4 x i16>* %addr) {
 define <4 x i16> @test_v4i16_post_load(<4 x i16>* %addr) {
 ; CHECK-LABEL: test_v4i16_post_load:
 ; CHECK: ldr d0, [x0], #40
-  %newaddr = getelementptr <4 x i16>* %addr, i32 5
-  %val = load <4 x i16>* %addr, align 8
+  %newaddr = getelementptr <4 x i16>, <4 x i16>* %addr, i32 5
+  %val = load <4 x i16>, <4 x i16>* %addr, align 8
   store <4 x i16>* %newaddr, <4 x i16>** bitcast(i8** @ptr to <4 x i16>**)
   ret <4 x i16> %val
 }
@@ -59,7 +59,7 @@ define <4 x i16> @test_v4i16_post_load(<4 x i16>* %addr) {
 define void @test_v4i16_pre_store(<4 x i16> %in, <4 x i16>* %addr) {
 ; CHECK-LABEL: test_v4i16_pre_store:
 ; CHECK: str d0, [x0, #40]!
-  %newaddr = getelementptr <4 x i16>* %addr, i32 5
+  %newaddr = getelementptr <4 x i16>, <4 x i16>* %addr, i32 5
   store <4 x i16> %in, <4 x i16>* %newaddr, align 8
   store <4 x i16>* %newaddr, <4 x i16>** bitcast(i8** @ptr to <4 x i16>**)
   ret void
@@ -68,7 +68,7 @@ define void @test_v4i16_pre_store(<4 x i16> %in, <4 x i16>* %addr) {
 define void @test_v4i16_post_store(<4 x i16> %in, <4 x i16>* %addr) {
 ; CHECK-LABEL: test_v4i16_post_store:
 ; CHECK: str d0, [x0], #40
-  %newaddr = getelementptr <4 x i16>* %addr, i32 5
+  %newaddr = getelementptr <4 x i16>, <4 x i16>* %addr, i32 5
   store <4 x i16> %in, <4 x i16>* %addr, align 8
   store <4 x i16>* %newaddr, <4 x i16>** bitcast(i8** @ptr to <4 x i16>**)
   ret void
@@ -77,8 +77,8 @@ define void @test_v4i16_post_store(<4 x i16> %in, <4 x i16>* %addr) {
 define <2 x i32> @test_v2i32_pre_load(<2 x i32>* %addr) {
 ; CHECK-LABEL: test_v2i32_pre_load:
 ; CHECK: ldr d0, [x0, #40]!
-  %newaddr = getelementptr <2 x i32>* %addr, i32 5
-  %val = load <2 x i32>* %newaddr, align 8
+  %newaddr = getelementptr <2 x i32>, <2 x i32>* %addr, i32 5
+  %val = load <2 x i32>, <2 x i32>* %newaddr, align 8
   store <2 x i32>* %newaddr, <2 x i32>** bitcast(i8** @ptr to <2 x i32>**)
   ret <2 x i32> %val
 }
@@ -86,8 +86,8 @@ define <2 x i32> @test_v2i32_pre_load(<2 x i32>* %addr) {
 define <2 x i32> @test_v2i32_post_load(<2 x i32>* %addr) {
 ; CHECK-LABEL: test_v2i32_post_load:
 ; CHECK: ldr d0, [x0], #40
-  %newaddr = getelementptr <2 x i32>* %addr, i32 5
-  %val = load <2 x i32>* %addr, align 8
+  %newaddr = getelementptr <2 x i32>, <2 x i32>* %addr, i32 5
+  %val = load <2 x i32>, <2 x i32>* %addr, align 8
   store <2 x i32>* %newaddr, <2 x i32>** bitcast(i8** @ptr to <2 x i32>**)
   ret <2 x i32> %val
 }
@@ -95,7 +95,7 @@ define <2 x i32> @test_v2i32_post_load(<2 x i32>* %addr) {
 define void @test_v2i32_pre_store(<2 x i32> %in, <2 x i32>* %addr) {
 ; CHECK-LABEL: test_v2i32_pre_store:
 ; CHECK: str d0, [x0, #40]!
-  %newaddr = getelementptr <2 x i32>* %addr, i32 5
+  %newaddr = getelementptr <2 x i32>, <2 x i32>* %addr, i32 5
   store <2 x i32> %in, <2 x i32>* %newaddr, align 8
   store <2 x i32>* %newaddr, <2 x i32>** bitcast(i8** @ptr to <2 x i32>**)
   ret void
@@ -104,7 +104,7 @@ define void @test_v2i32_pre_store(<2 x i32> %in, <2 x i32>* %addr) {
 define void @test_v2i32_post_store(<2 x i32> %in, <2 x i32>* %addr) {
 ; CHECK-LABEL: test_v2i32_post_store:
 ; CHECK: str d0, [x0], #40
-  %newaddr = getelementptr <2 x i32>* %addr, i32 5
+  %newaddr = getelementptr <2 x i32>, <2 x i32>* %addr, i32 5
   store <2 x i32> %in, <2 x i32>* %addr, align 8
   store <2 x i32>* %newaddr, <2 x i32>** bitcast(i8** @ptr to <2 x i32>**)
   ret void
@@ -113,8 +113,8 @@ define void @test_v2i32_post_store(<2 x i32> %in, <2 x i32>* %addr) {
 define <2 x float> @test_v2f32_pre_load(<2 x float>* %addr) {
 ; CHECK-LABEL: test_v2f32_pre_load:
 ; CHECK: ldr d0, [x0, #40]!
-  %newaddr = getelementptr <2 x float>* %addr, i32 5
-  %val = load <2 x float>* %newaddr, align 8
+  %newaddr = getelementptr <2 x float>, <2 x float>* %addr, i32 5
+  %val = load <2 x float>, <2 x float>* %newaddr, align 8
   store <2 x float>* %newaddr, <2 x float>** bitcast(i8** @ptr to <2 x float>**)
   ret <2 x float> %val
 }
@@ -122,8 +122,8 @@ define <2 x float> @test_v2f32_pre_load(<2 x float>* %addr) {
 define <2 x float> @test_v2f32_post_load(<2 x float>* %addr) {
 ; CHECK-LABEL: test_v2f32_post_load:
 ; CHECK: ldr d0, [x0], #40
-  %newaddr = getelementptr <2 x float>* %addr, i32 5
-  %val = load <2 x float>* %addr, align 8
+  %newaddr = getelementptr <2 x float>, <2 x float>* %addr, i32 5
+  %val = load <2 x float>, <2 x float>* %addr, align 8
   store <2 x float>* %newaddr, <2 x float>** bitcast(i8** @ptr to <2 x float>**)
   ret <2 x float> %val
 }
@@ -131,7 +131,7 @@ define <2 x float> @test_v2f32_post_load(<2 x float>* %addr) {
 define void @test_v2f32_pre_store(<2 x float> %in, <2 x float>* %addr) {
 ; CHECK-LABEL: test_v2f32_pre_store:
 ; CHECK: str d0, [x0, #40]!
-  %newaddr = getelementptr <2 x float>* %addr, i32 5
+  %newaddr = getelementptr <2 x float>, <2 x float>* %addr, i32 5
   store <2 x float> %in, <2 x float>* %newaddr, align 8
   store <2 x float>* %newaddr, <2 x float>** bitcast(i8** @ptr to <2 x float>**)
   ret void
@@ -140,7 +140,7 @@ define void @test_v2f32_pre_store(<2 x float> %in, <2 x float>* %addr) {
 define void @test_v2f32_post_store(<2 x float> %in, <2 x float>* %addr) {
 ; CHECK-LABEL: test_v2f32_post_store:
 ; CHECK: str d0, [x0], #40
-  %newaddr = getelementptr <2 x float>* %addr, i32 5
+  %newaddr = getelementptr <2 x float>, <2 x float>* %addr, i32 5
   store <2 x float> %in, <2 x float>* %addr, align 8
   store <2 x float>* %newaddr, <2 x float>** bitcast(i8** @ptr to <2 x float>**)
   ret void
@@ -149,8 +149,8 @@ define void @test_v2f32_post_store(<2 x float> %in, <2 x float>* %addr) {
 define <1 x i64> @test_v1i64_pre_load(<1 x i64>* %addr) {
 ; CHECK-LABEL: test_v1i64_pre_load:
 ; CHECK: ldr d0, [x0, #40]!
-  %newaddr = getelementptr <1 x i64>* %addr, i32 5
-  %val = load <1 x i64>* %newaddr, align 8
+  %newaddr = getelementptr <1 x i64>, <1 x i64>* %addr, i32 5
+  %val = load <1 x i64>, <1 x i64>* %newaddr, align 8
   store <1 x i64>* %newaddr, <1 x i64>** bitcast(i8** @ptr to <1 x i64>**)
   ret <1 x i64> %val
 }
@@ -158,8 +158,8 @@ define <1 x i64> @test_v1i64_pre_load(<1 x i64>* %addr) {
 define <1 x i64> @test_v1i64_post_load(<1 x i64>* %addr) {
 ; CHECK-LABEL: test_v1i64_post_load:
 ; CHECK: ldr d0, [x0], #40
-  %newaddr = getelementptr <1 x i64>* %addr, i32 5
-  %val = load <1 x i64>* %addr, align 8
+  %newaddr = getelementptr <1 x i64>, <1 x i64>* %addr, i32 5
+  %val = load <1 x i64>, <1 x i64>* %addr, align 8
   store <1 x i64>* %newaddr, <1 x i64>** bitcast(i8** @ptr to <1 x i64>**)
   ret <1 x i64> %val
 }
@@ -167,7 +167,7 @@ define <1 x i64> @test_v1i64_post_load(<1 x i64>* %addr) {
 define void @test_v1i64_pre_store(<1 x i64> %in, <1 x i64>* %addr) {
 ; CHECK-LABEL: test_v1i64_pre_store:
 ; CHECK: str d0, [x0, #40]!
-  %newaddr = getelementptr <1 x i64>* %addr, i32 5
+  %newaddr = getelementptr <1 x i64>, <1 x i64>* %addr, i32 5
   store <1 x i64> %in, <1 x i64>* %newaddr, align 8
   store <1 x i64>* %newaddr, <1 x i64>** bitcast(i8** @ptr to <1 x i64>**)
   ret void
@@ -176,7 +176,7 @@ define void @test_v1i64_pre_store(<1 x i64> %in, <1 x i64>* %addr) {
 define void @test_v1i64_post_store(<1 x i64> %in, <1 x i64>* %addr) {
 ; CHECK-LABEL: test_v1i64_post_store:
 ; CHECK: str d0, [x0], #40
-  %newaddr = getelementptr <1 x i64>* %addr, i32 5
+  %newaddr = getelementptr <1 x i64>, <1 x i64>* %addr, i32 5
   store <1 x i64> %in, <1 x i64>* %addr, align 8
   store <1 x i64>* %newaddr, <1 x i64>** bitcast(i8** @ptr to <1 x i64>**)
   ret void
@@ -185,8 +185,8 @@ define void @test_v1i64_post_store(<1 x i64> %in, <1 x i64>* %addr) {
 define <16 x i8> @test_v16i8_pre_load(<16 x i8>* %addr) {
 ; CHECK-LABEL: test_v16i8_pre_load:
 ; CHECK: ldr q0, [x0, #80]!
-  %newaddr = getelementptr <16 x i8>* %addr, i32 5
-  %val = load <16 x i8>* %newaddr, align 8
+  %newaddr = getelementptr <16 x i8>, <16 x i8>* %addr, i32 5
+  %val = load <16 x i8>, <16 x i8>* %newaddr, align 8
   store <16 x i8>* %newaddr, <16 x i8>** bitcast(i8** @ptr to <16 x i8>**)
   ret <16 x i8> %val
 }
@@ -194,8 +194,8 @@ define <16 x i8> @test_v16i8_pre_load(<16 x i8>* %addr) {
 define <16 x i8> @test_v16i8_post_load(<16 x i8>* %addr) {
 ; CHECK-LABEL: test_v16i8_post_load:
 ; CHECK: ldr q0, [x0], #80
-  %newaddr = getelementptr <16 x i8>* %addr, i32 5
-  %val = load <16 x i8>* %addr, align 8
+  %newaddr = getelementptr <16 x i8>, <16 x i8>* %addr, i32 5
+  %val = load <16 x i8>, <16 x i8>* %addr, align 8
   store <16 x i8>* %newaddr, <16 x i8>** bitcast(i8** @ptr to <16 x i8>**)
   ret <16 x i8> %val
 }
@@ -203,7 +203,7 @@ define <16 x i8> @test_v16i8_post_load(<16 x i8>* %addr) {
 define void @test_v16i8_pre_store(<16 x i8> %in, <16 x i8>* %addr) {
 ; CHECK-LABEL: test_v16i8_pre_store:
 ; CHECK: str q0, [x0, #80]!
-  %newaddr = getelementptr <16 x i8>* %addr, i32 5
+  %newaddr = getelementptr <16 x i8>, <16 x i8>* %addr, i32 5
   store <16 x i8> %in, <16 x i8>* %newaddr, align 8
   store <16 x i8>* %newaddr, <16 x i8>** bitcast(i8** @ptr to <16 x i8>**)
   ret void
@@ -212,7 +212,7 @@ define void @test_v16i8_pre_store(<16 x i8> %in, <16 x i8>* %addr) {
 define void @test_v16i8_post_store(<16 x i8> %in, <16 x i8>* %addr) {
 ; CHECK-LABEL: test_v16i8_post_store:
 ; CHECK: str q0, [x0], #80
-  %newaddr = getelementptr <16 x i8>* %addr, i32 5
+  %newaddr = getelementptr <16 x i8>, <16 x i8>* %addr, i32 5
   store <16 x i8> %in, <16 x i8>* %addr, align 8
   store <16 x i8>* %newaddr, <16 x i8>** bitcast(i8** @ptr to <16 x i8>**)
   ret void
@@ -221,8 +221,8 @@ define void @test_v16i8_post_store(<16 x i8> %in, <16 x i8>* %addr) {
 define <8 x i16> @test_v8i16_pre_load(<8 x i16>* %addr) {
 ; CHECK-LABEL: test_v8i16_pre_load:
 ; CHECK: ldr q0, [x0, #80]!
-  %newaddr = getelementptr <8 x i16>* %addr, i32 5
-  %val = load <8 x i16>* %newaddr, align 8
+  %newaddr = getelementptr <8 x i16>, <8 x i16>* %addr, i32 5
+  %val = load <8 x i16>, <8 x i16>* %newaddr, align 8
   store <8 x i16>* %newaddr, <8 x i16>** bitcast(i8** @ptr to <8 x i16>**)
   ret <8 x i16> %val
 }
@@ -230,8 +230,8 @@ define <8 x i16> @test_v8i16_pre_load(<8 x i16>* %addr) {
 define <8 x i16> @test_v8i16_post_load(<8 x i16>* %addr) {
 ; CHECK-LABEL: test_v8i16_post_load:
 ; CHECK: ldr q0, [x0], #80
-  %newaddr = getelementptr <8 x i16>* %addr, i32 5
-  %val = load <8 x i16>* %addr, align 8
+  %newaddr = getelementptr <8 x i16>, <8 x i16>* %addr, i32 5
+  %val = load <8 x i16>, <8 x i16>* %addr, align 8
   store <8 x i16>* %newaddr, <8 x i16>** bitcast(i8** @ptr to <8 x i16>**)
   ret <8 x i16> %val
 }
@@ -239,7 +239,7 @@ define <8 x i16> @test_v8i16_post_load(<8 x i16>* %addr) {
 define void @test_v8i16_pre_store(<8 x i16> %in, <8 x i16>* %addr) {
 ; CHECK-LABEL: test_v8i16_pre_store:
 ; CHECK: str q0, [x0, #80]!
-  %newaddr = getelementptr <8 x i16>* %addr, i32 5
+  %newaddr = getelementptr <8 x i16>, <8 x i16>* %addr, i32 5
   store <8 x i16> %in, <8 x i16>* %newaddr, align 8
   store <8 x i16>* %newaddr, <8 x i16>** bitcast(i8** @ptr to <8 x i16>**)
   ret void
@@ -248,7 +248,7 @@ define void @test_v8i16_pre_store(<8 x i16> %in, <8 x i16>* %addr) {
 define void @test_v8i16_post_store(<8 x i16> %in, <8 x i16>* %addr) {
 ; CHECK-LABEL: test_v8i16_post_store:
 ; CHECK: str q0, [x0], #80
-  %newaddr = getelementptr <8 x i16>* %addr, i32 5
+  %newaddr = getelementptr <8 x i16>, <8 x i16>* %addr, i32 5
   store <8 x i16> %in, <8 x i16>* %addr, align 8
   store <8 x i16>* %newaddr, <8 x i16>** bitcast(i8** @ptr to <8 x i16>**)
   ret void
@@ -257,8 +257,8 @@ define void @test_v8i16_post_store(<8 x i16> %in, <8 x i16>* %addr) {
 define <4 x i32> @test_v4i32_pre_load(<4 x i32>* %addr) {
 ; CHECK-LABEL: test_v4i32_pre_load:
 ; CHECK: ldr q0, [x0, #80]!
-  %newaddr = getelementptr <4 x i32>* %addr, i32 5
-  %val = load <4 x i32>* %newaddr, align 8
+  %newaddr = getelementptr <4 x i32>, <4 x i32>* %addr, i32 5
+  %val = load <4 x i32>, <4 x i32>* %newaddr, align 8
   store <4 x i32>* %newaddr, <4 x i32>** bitcast(i8** @ptr to <4 x i32>**)
   ret <4 x i32> %val
 }
@@ -266,8 +266,8 @@ define <4 x i32> @test_v4i32_pre_load(<4 x i32>* %addr) {
 define <4 x i32> @test_v4i32_post_load(<4 x i32>* %addr) {
 ; CHECK-LABEL: test_v4i32_post_load:
 ; CHECK: ldr q0, [x0], #80
-  %newaddr = getelementptr <4 x i32>* %addr, i32 5
-  %val = load <4 x i32>* %addr, align 8
+  %newaddr = getelementptr <4 x i32>, <4 x i32>* %addr, i32 5
+  %val = load <4 x i32>, <4 x i32>* %addr, align 8
   store <4 x i32>* %newaddr, <4 x i32>** bitcast(i8** @ptr to <4 x i32>**)
   ret <4 x i32> %val
 }
@@ -275,7 +275,7 @@ define <4 x i32> @test_v4i32_post_load(<4 x i32>* %addr) {
 define void @test_v4i32_pre_store(<4 x i32> %in, <4 x i32>* %addr) {
 ; CHECK-LABEL: test_v4i32_pre_store:
 ; CHECK: str q0, [x0, #80]!
-  %newaddr = getelementptr <4 x i32>* %addr, i32 5
+  %newaddr = getelementptr <4 x i32>, <4 x i32>* %addr, i32 5
   store <4 x i32> %in, <4 x i32>* %newaddr, align 8
   store <4 x i32>* %newaddr, <4 x i32>** bitcast(i8** @ptr to <4 x i32>**)
   ret void
@@ -284,7 +284,7 @@ define void @test_v4i32_pre_store(<4 x i32> %in, <4 x i32>* %addr) {
 define void @test_v4i32_post_store(<4 x i32> %in, <4 x i32>* %addr) {
 ; CHECK-LABEL: test_v4i32_post_store:
 ; CHECK: str q0, [x0], #80
-  %newaddr = getelementptr <4 x i32>* %addr, i32 5
+  %newaddr = getelementptr <4 x i32>, <4 x i32>* %addr, i32 5
   store <4 x i32> %in, <4 x i32>* %addr, align 8
   store <4 x i32>* %newaddr, <4 x i32>** bitcast(i8** @ptr to <4 x i32>**)
   ret void
@@ -294,8 +294,8 @@ define void @test_v4i32_post_store(<4 x i32> %in, <4 x i32>* %addr) {
 define <4 x float> @test_v4f32_pre_load(<4 x float>* %addr) {
 ; CHECK-LABEL: test_v4f32_pre_load:
 ; CHECK: ldr q0, [x0, #80]!
-  %newaddr = getelementptr <4 x float>* %addr, i32 5
-  %val = load <4 x float>* %newaddr, align 8
+  %newaddr = getelementptr <4 x float>, <4 x float>* %addr, i32 5
+  %val = load <4 x float>, <4 x float>* %newaddr, align 8
   store <4 x float>* %newaddr, <4 x float>** bitcast(i8** @ptr to <4 x float>**)
   ret <4 x float> %val
 }
@@ -303,8 +303,8 @@ define <4 x float> @test_v4f32_pre_load(<4 x float>* %addr) {
 define <4 x float> @test_v4f32_post_load(<4 x float>* %addr) {
 ; CHECK-LABEL: test_v4f32_post_load:
 ; CHECK: ldr q0, [x0], #80
-  %newaddr = getelementptr <4 x float>* %addr, i32 5
-  %val = load <4 x float>* %addr, align 8
+  %newaddr = getelementptr <4 x float>, <4 x float>* %addr, i32 5
+  %val = load <4 x float>, <4 x float>* %addr, align 8
   store <4 x float>* %newaddr, <4 x float>** bitcast(i8** @ptr to <4 x float>**)
   ret <4 x float> %val
 }
@@ -312,7 +312,7 @@ define <4 x float> @test_v4f32_post_load(<4 x float>* %addr) {
 define void @test_v4f32_pre_store(<4 x float> %in, <4 x float>* %addr) {
 ; CHECK-LABEL: test_v4f32_pre_store:
 ; CHECK: str q0, [x0, #80]!
-  %newaddr = getelementptr <4 x float>* %addr, i32 5
+  %newaddr = getelementptr <4 x float>, <4 x float>* %addr, i32 5
   store <4 x float> %in, <4 x float>* %newaddr, align 8
   store <4 x float>* %newaddr, <4 x float>** bitcast(i8** @ptr to <4 x float>**)
   ret void
@@ -321,7 +321,7 @@ define void @test_v4f32_pre_store(<4 x float> %in, <4 x float>* %addr) {
 define void @test_v4f32_post_store(<4 x float> %in, <4 x float>* %addr) {
 ; CHECK-LABEL: test_v4f32_post_store:
 ; CHECK: str q0, [x0], #80
-  %newaddr = getelementptr <4 x float>* %addr, i32 5
+  %newaddr = getelementptr <4 x float>, <4 x float>* %addr, i32 5
   store <4 x float> %in, <4 x float>* %addr, align 8
   store <4 x float>* %newaddr, <4 x float>** bitcast(i8** @ptr to <4 x float>**)
   ret void
@@ -331,8 +331,8 @@ define void @test_v4f32_post_store(<4 x float> %in, <4 x float>* %addr) {
 define <2 x i64> @test_v2i64_pre_load(<2 x i64>* %addr) {
 ; CHECK-LABEL: test_v2i64_pre_load:
 ; CHECK: ldr q0, [x0, #80]!
-  %newaddr = getelementptr <2 x i64>* %addr, i32 5
-  %val = load <2 x i64>* %newaddr, align 8
+  %newaddr = getelementptr <2 x i64>, <2 x i64>* %addr, i32 5
+  %val = load <2 x i64>, <2 x i64>* %newaddr, align 8
   store <2 x i64>* %newaddr, <2 x i64>** bitcast(i8** @ptr to <2 x i64>**)
   ret <2 x i64> %val
 }
@@ -340,8 +340,8 @@ define <2 x i64> @test_v2i64_pre_load(<2 x i64>* %addr) {
 define <2 x i64> @test_v2i64_post_load(<2 x i64>* %addr) {
 ; CHECK-LABEL: test_v2i64_post_load:
 ; CHECK: ldr q0, [x0], #80
-  %newaddr = getelementptr <2 x i64>* %addr, i32 5
-  %val = load <2 x i64>* %addr, align 8
+  %newaddr = getelementptr <2 x i64>, <2 x i64>* %addr, i32 5
+  %val = load <2 x i64>, <2 x i64>* %addr, align 8
   store <2 x i64>* %newaddr, <2 x i64>** bitcast(i8** @ptr to <2 x i64>**)
   ret <2 x i64> %val
 }
@@ -349,7 +349,7 @@ define <2 x i64> @test_v2i64_post_load(<2 x i64>* %addr) {
 define void @test_v2i64_pre_store(<2 x i64> %in, <2 x i64>* %addr) {
 ; CHECK-LABEL: test_v2i64_pre_store:
 ; CHECK: str q0, [x0, #80]!
-  %newaddr = getelementptr <2 x i64>* %addr, i32 5
+  %newaddr = getelementptr <2 x i64>, <2 x i64>* %addr, i32 5
   store <2 x i64> %in, <2 x i64>* %newaddr, align 8
   store <2 x i64>* %newaddr, <2 x i64>** bitcast(i8** @ptr to <2 x i64>**)
   ret void
@@ -358,7 +358,7 @@ define void @test_v2i64_pre_store(<2 x i64> %in, <2 x i64>* %addr) {
 define void @test_v2i64_post_store(<2 x i64> %in, <2 x i64>* %addr) {
 ; CHECK-LABEL: test_v2i64_post_store:
 ; CHECK: str q0, [x0], #80
-  %newaddr = getelementptr <2 x i64>* %addr, i32 5
+  %newaddr = getelementptr <2 x i64>, <2 x i64>* %addr, i32 5
   store <2 x i64> %in, <2 x i64>* %addr, align 8
   store <2 x i64>* %newaddr, <2 x i64>** bitcast(i8** @ptr to <2 x i64>**)
   ret void
@@ -368,8 +368,8 @@ define void @test_v2i64_post_store(<2 x i64> %in, <2 x i64>* %addr) {
 define <2 x double> @test_v2f64_pre_load(<2 x double>* %addr) {
 ; CHECK-LABEL: test_v2f64_pre_load:
 ; CHECK: ldr q0, [x0, #80]!
-  %newaddr = getelementptr <2 x double>* %addr, i32 5
-  %val = load <2 x double>* %newaddr, align 8
+  %newaddr = getelementptr <2 x double>, <2 x double>* %addr, i32 5
+  %val = load <2 x double>, <2 x double>* %newaddr, align 8
   store <2 x double>* %newaddr, <2 x double>** bitcast(i8** @ptr to <2 x double>**)
   ret <2 x double> %val
 }
@@ -377,8 +377,8 @@ define <2 x double> @test_v2f64_pre_load(<2 x double>* %addr) {
 define <2 x double> @test_v2f64_post_load(<2 x double>* %addr) {
 ; CHECK-LABEL: test_v2f64_post_load:
 ; CHECK: ldr q0, [x0], #80
-  %newaddr = getelementptr <2 x double>* %addr, i32 5
-  %val = load <2 x double>* %addr, align 8
+  %newaddr = getelementptr <2 x double>, <2 x double>* %addr, i32 5
+  %val = load <2 x double>, <2 x double>* %addr, align 8
   store <2 x double>* %newaddr, <2 x double>** bitcast(i8** @ptr to <2 x double>**)
   ret <2 x double> %val
 }
@@ -386,7 +386,7 @@ define <2 x double> @test_v2f64_post_load(<2 x double>* %addr) {
 define void @test_v2f64_pre_store(<2 x double> %in, <2 x double>* %addr) {
 ; CHECK-LABEL: test_v2f64_pre_store:
 ; CHECK: str q0, [x0, #80]!
-  %newaddr = getelementptr <2 x double>* %addr, i32 5
+  %newaddr = getelementptr <2 x double>, <2 x double>* %addr, i32 5
   store <2 x double> %in, <2 x double>* %newaddr, align 8
   store <2 x double>* %newaddr, <2 x double>** bitcast(i8** @ptr to <2 x double>**)
   ret void
@@ -395,7 +395,7 @@ define void @test_v2f64_pre_store(<2 x double> %in, <2 x double>* %addr) {
 define void @test_v2f64_post_store(<2 x double> %in, <2 x double>* %addr) {
 ; CHECK-LABEL: test_v2f64_post_store:
 ; CHECK: str q0, [x0], #80
-  %newaddr = getelementptr <2 x double>* %addr, i32 5
+  %newaddr = getelementptr <2 x double>, <2 x double>* %addr, i32 5
   store <2 x double> %in, <2 x double>* %addr, align 8
   store <2 x double>* %newaddr, <2 x double>** bitcast(i8** @ptr to <2 x double>**)
   ret void
@@ -407,7 +407,7 @@ define i8* @test_v16i8_post_imm_st1_lane(<16 x i8> %in, i8* %addr) {
   %elt = extractelement <16 x i8> %in, i32 3
   store i8 %elt, i8* %addr
 
-  %newaddr = getelementptr i8* %addr, i32 1
+  %newaddr = getelementptr i8, i8* %addr, i32 1
   ret i8* %newaddr
 }
 
@@ -418,7 +418,7 @@ define i8* @test_v16i8_post_reg_st1_lane(<16 x i8> %in, i8* %addr) {
   %elt = extractelement <16 x i8> %in, i32 3
   store i8 %elt, i8* %addr
 
-  %newaddr = getelementptr i8* %addr, i32 2
+  %newaddr = getelementptr i8, i8* %addr, i32 2
   ret i8* %newaddr
 }
 
@@ -429,7 +429,7 @@ define i16* @test_v8i16_post_imm_st1_lane(<8 x i16> %in, i16* %addr) {
   %elt = extractelement <8 x i16> %in, i32 3
   store i16 %elt, i16* %addr
 
-  %newaddr = getelementptr i16* %addr, i32 1
+  %newaddr = getelementptr i16, i16* %addr, i32 1
   ret i16* %newaddr
 }
 
@@ -440,7 +440,7 @@ define i16* @test_v8i16_post_reg_st1_lane(<8 x i16> %in, i16* %addr) {
   %elt = extractelement <8 x i16> %in, i32 3
   store i16 %elt, i16* %addr
 
-  %newaddr = getelementptr i16* %addr, i32 2
+  %newaddr = getelementptr i16, i16* %addr, i32 2
   ret i16* %newaddr
 }
 
@@ -450,7 +450,7 @@ define i32* @test_v4i32_post_imm_st1_lane(<4 x i32> %in, i32* %addr) {
   %elt = extractelement <4 x i32> %in, i32 3
   store i32 %elt, i32* %addr
 
-  %newaddr = getelementptr i32* %addr, i32 1
+  %newaddr = getelementptr i32, i32* %addr, i32 1
   ret i32* %newaddr
 }
 
@@ -461,7 +461,7 @@ define i32* @test_v4i32_post_reg_st1_lane(<4 x i32> %in, i32* %addr) {
   %elt = extractelement <4 x i32> %in, i32 3
   store i32 %elt, i32* %addr
 
-  %newaddr = getelementptr i32* %addr, i32 2
+  %newaddr = getelementptr i32, i32* %addr, i32 2
   ret i32* %newaddr
 }
 
@@ -471,7 +471,7 @@ define float* @test_v4f32_post_imm_st1_lane(<4 x float> %in, float* %addr) {
   %elt = extractelement <4 x float> %in, i32 3
   store float %elt, float* %addr
 
-  %newaddr = getelementptr float* %addr, i32 1
+  %newaddr = getelementptr float, float* %addr, i32 1
   ret float* %newaddr
 }
 
@@ -482,7 +482,7 @@ define float* @test_v4f32_post_reg_st1_lane(<4 x float> %in, float* %addr) {
   %elt = extractelement <4 x float> %in, i32 3
   store float %elt, float* %addr
 
-  %newaddr = getelementptr float* %addr, i32 2
+  %newaddr = getelementptr float, float* %addr, i32 2
   ret float* %newaddr
 }
 
@@ -492,7 +492,7 @@ define i64* @test_v2i64_post_imm_st1_lane(<2 x i64> %in, i64* %addr) {
   %elt = extractelement <2 x i64> %in, i64 1
   store i64 %elt, i64* %addr
 
-  %newaddr = getelementptr i64* %addr, i64 1
+  %newaddr = getelementptr i64, i64* %addr, i64 1
   ret i64* %newaddr
 }
 
@@ -503,7 +503,7 @@ define i64* @test_v2i64_post_reg_st1_lane(<2 x i64> %in, i64* %addr) {
   %elt = extractelement <2 x i64> %in, i64 1
   store i64 %elt, i64* %addr
 
-  %newaddr = getelementptr i64* %addr, i64 2
+  %newaddr = getelementptr i64, i64* %addr, i64 2
   ret i64* %newaddr
 }
 
@@ -513,7 +513,7 @@ define double* @test_v2f64_post_imm_st1_lane(<2 x double> %in, double* %addr) {
   %elt = extractelement <2 x double> %in, i32 1
   store double %elt, double* %addr
 
-  %newaddr = getelementptr double* %addr, i32 1
+  %newaddr = getelementptr double, double* %addr, i32 1
   ret double* %newaddr
 }
 
@@ -524,7 +524,7 @@ define double* @test_v2f64_post_reg_st1_lane(<2 x double> %in, double* %addr) {
   %elt = extractelement <2 x double> %in, i32 1
   store double %elt, double* %addr
 
-  %newaddr = getelementptr double* %addr, i32 2
+  %newaddr = getelementptr double, double* %addr, i32 2
   ret double* %newaddr
 }
 
@@ -534,7 +534,7 @@ define i8* @test_v8i8_post_imm_st1_lane(<8 x i8> %in, i8* %addr) {
   %elt = extractelement <8 x i8> %in, i32 3
   store i8 %elt, i8* %addr
 
-  %newaddr = getelementptr i8* %addr, i32 1
+  %newaddr = getelementptr i8, i8* %addr, i32 1
   ret i8* %newaddr
 }
 
@@ -545,7 +545,7 @@ define i8* @test_v8i8_post_reg_st1_lane(<8 x i8> %in, i8* %addr) {
   %elt = extractelement <8 x i8> %in, i32 3
   store i8 %elt, i8* %addr
 
-  %newaddr = getelementptr i8* %addr, i32 2
+  %newaddr = getelementptr i8, i8* %addr, i32 2
   ret i8* %newaddr
 }
 
@@ -555,7 +555,7 @@ define i16* @test_v4i16_post_imm_st1_lane(<4 x i16> %in, i16* %addr) {
   %elt = extractelement <4 x i16> %in, i32 3
   store i16 %elt, i16* %addr
 
-  %newaddr = getelementptr i16* %addr, i32 1
+  %newaddr = getelementptr i16, i16* %addr, i32 1
   ret i16* %newaddr
 }
 
@@ -566,7 +566,7 @@ define i16* @test_v4i16_post_reg_st1_lane(<4 x i16> %in, i16* %addr) {
   %elt = extractelement <4 x i16> %in, i32 3
   store i16 %elt, i16* %addr
 
-  %newaddr = getelementptr i16* %addr, i32 2
+  %newaddr = getelementptr i16, i16* %addr, i32 2
   ret i16* %newaddr
 }
 
@@ -576,7 +576,7 @@ define i32* @test_v2i32_post_imm_st1_lane(<2 x i32> %in, i32* %addr) {
   %elt = extractelement <2 x i32> %in, i32 1
   store i32 %elt, i32* %addr
 
-  %newaddr = getelementptr i32* %addr, i32 1
+  %newaddr = getelementptr i32, i32* %addr, i32 1
   ret i32* %newaddr
 }
 
@@ -587,7 +587,7 @@ define i32* @test_v2i32_post_reg_st1_lane(<2 x i32> %in, i32* %addr) {
   %elt = extractelement <2 x i32> %in, i32 1
   store i32 %elt, i32* %addr
 
-  %newaddr = getelementptr i32* %addr, i32 2
+  %newaddr = getelementptr i32, i32* %addr, i32 2
   ret i32* %newaddr
 }
 
@@ -597,7 +597,7 @@ define float* @test_v2f32_post_imm_st1_lane(<2 x float> %in, float* %addr) {
   %elt = extractelement <2 x float> %in, i32 1
   store float %elt, float* %addr
 
-  %newaddr = getelementptr float* %addr, i32 1
+  %newaddr = getelementptr float, float* %addr, i32 1
   ret float* %newaddr
 }
 
@@ -608,7 +608,7 @@ define float* @test_v2f32_post_reg_st1_lane(<2 x float> %in, float* %addr) {
   %elt = extractelement <2 x float> %in, i32 1
   store float %elt, float* %addr
 
-  %newaddr = getelementptr float* %addr, i32 2
+  %newaddr = getelementptr float, float* %addr, i32 2
   ret float* %newaddr
 }
 
@@ -616,7 +616,7 @@ define { <16 x i8>, <16 x i8> } @test_v16i8_post_imm_ld2(i8* %A, i8** %ptr) {
 ;CHECK-LABEL: test_v16i8_post_imm_ld2:
 ;CHECK: ld2.16b { v0, v1 }, [x0], #32
   %ld2 = tail call { <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld2.v16i8.p0i8(i8* %A)
-  %tmp = getelementptr i8* %A, i32 32
+  %tmp = getelementptr i8, i8* %A, i32 32
   store i8* %tmp, i8** %ptr
   ret { <16 x i8>, <16 x i8> } %ld2
 }
@@ -625,7 +625,7 @@ define { <16 x i8>, <16 x i8> } @test_v16i8_post_reg_ld2(i8* %A, i8** %ptr, i64
 ;CHECK-LABEL: test_v16i8_post_reg_ld2:
 ;CHECK: ld2.16b { v0, v1 }, [x0], x{{[0-9]+}}
   %ld2 = tail call { <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld2.v16i8.p0i8(i8* %A)
-  %tmp = getelementptr i8* %A, i64 %inc
+  %tmp = getelementptr i8, i8* %A, i64 %inc
   store i8* %tmp, i8** %ptr
   ret { <16 x i8>, <16 x i8> } %ld2
 }
@@ -637,7 +637,7 @@ define { <8 x i8>, <8 x i8> } @test_v8i8_post_imm_ld2(i8* %A, i8** %ptr) {
 ;CHECK-LABEL: test_v8i8_post_imm_ld2:
 ;CHECK: ld2.8b { v0, v1 }, [x0], #16
   %ld2 = tail call { <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld2.v8i8.p0i8(i8* %A)
-  %tmp = getelementptr i8* %A, i32 16
+  %tmp = getelementptr i8, i8* %A, i32 16
   store i8* %tmp, i8** %ptr
   ret { <8 x i8>, <8 x i8> } %ld2
 }
@@ -646,7 +646,7 @@ define { <8 x i8>, <8 x i8> } @test_v8i8_post_reg_ld2(i8* %A, i8** %ptr, i64 %in
 ;CHECK-LABEL: test_v8i8_post_reg_ld2:
 ;CHECK: ld2.8b { v0, v1 }, [x0], x{{[0-9]+}}
   %ld2 = tail call { <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld2.v8i8.p0i8(i8* %A)
-  %tmp = getelementptr i8* %A, i64 %inc
+  %tmp = getelementptr i8, i8* %A, i64 %inc
   store i8* %tmp, i8** %ptr
   ret { <8 x i8>, <8 x i8> } %ld2
 }
@@ -658,7 +658,7 @@ define { <8 x i16>, <8 x i16> } @test_v8i16_post_imm_ld2(i16* %A, i16** %ptr) {
 ;CHECK-LABEL: test_v8i16_post_imm_ld2:
 ;CHECK: ld2.8h { v0, v1 }, [x0], #32
   %ld2 = tail call { <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld2.v8i16.p0i16(i16* %A)
-  %tmp = getelementptr i16* %A, i32 16
+  %tmp = getelementptr i16, i16* %A, i32 16
   store i16* %tmp, i16** %ptr
   ret { <8 x i16>, <8 x i16> } %ld2
 }
@@ -667,7 +667,7 @@ define { <8 x i16>, <8 x i16> } @test_v8i16_post_reg_ld2(i16* %A, i16** %ptr, i6
 ;CHECK-LABEL: test_v8i16_post_reg_ld2:
 ;CHECK: ld2.8h { v0, v1 }, [x0], x{{[0-9]+}}
   %ld2 = tail call { <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld2.v8i16.p0i16(i16* %A)
-  %tmp = getelementptr i16* %A, i64 %inc
+  %tmp = getelementptr i16, i16* %A, i64 %inc
   store i16* %tmp, i16** %ptr
   ret { <8 x i16>, <8 x i16> } %ld2
 }
@@ -679,7 +679,7 @@ define { <4 x i16>, <4 x i16> } @test_v4i16_post_imm_ld2(i16* %A, i16** %ptr) {
 ;CHECK-LABEL: test_v4i16_post_imm_ld2:
 ;CHECK: ld2.4h { v0, v1 }, [x0], #16
   %ld2 = tail call { <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld2.v4i16.p0i16(i16* %A)
-  %tmp = getelementptr i16* %A, i32 8
+  %tmp = getelementptr i16, i16* %A, i32 8
   store i16* %tmp, i16** %ptr
   ret { <4 x i16>, <4 x i16> } %ld2
 }
@@ -688,7 +688,7 @@ define { <4 x i16>, <4 x i16> } @test_v4i16_post_reg_ld2(i16* %A, i16** %ptr, i6
 ;CHECK-LABEL: test_v4i16_post_reg_ld2:
 ;CHECK: ld2.4h { v0, v1 }, [x0], x{{[0-9]+}}
   %ld2 = tail call { <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld2.v4i16.p0i16(i16* %A)
-  %tmp = getelementptr i16* %A, i64 %inc
+  %tmp = getelementptr i16, i16* %A, i64 %inc
   store i16* %tmp, i16** %ptr
   ret { <4 x i16>, <4 x i16> } %ld2
 }
@@ -700,7 +700,7 @@ define { <4 x i32>, <4 x i32> } @test_v4i32_post_imm_ld2(i32* %A, i32** %ptr) {
 ;CHECK-LABEL: test_v4i32_post_imm_ld2:
 ;CHECK: ld2.4s { v0, v1 }, [x0], #32
   %ld2 = tail call { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2.v4i32.p0i32(i32* %A)
-  %tmp = getelementptr i32* %A, i32 8
+  %tmp = getelementptr i32, i32* %A, i32 8
   store i32* %tmp, i32** %ptr
   ret { <4 x i32>, <4 x i32> } %ld2
 }
@@ -709,7 +709,7 @@ define { <4 x i32>, <4 x i32> } @test_v4i32_post_reg_ld2(i32* %A, i32** %ptr, i6
 ;CHECK-LABEL: test_v4i32_post_reg_ld2:
 ;CHECK: ld2.4s { v0, v1 }, [x0], x{{[0-9]+}}
   %ld2 = tail call { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2.v4i32.p0i32(i32* %A)
-  %tmp = getelementptr i32* %A, i64 %inc
+  %tmp = getelementptr i32, i32* %A, i64 %inc
   store i32* %tmp, i32** %ptr
   ret { <4 x i32>, <4 x i32> } %ld2
 }
@@ -721,7 +721,7 @@ define { <2 x i32>, <2 x i32> } @test_v2i32_post_imm_ld2(i32* %A, i32** %ptr) {
 ;CHECK-LABEL: test_v2i32_post_imm_ld2:
 ;CHECK: ld2.2s { v0, v1 }, [x0], #16
   %ld2 = tail call { <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld2.v2i32.p0i32(i32* %A)
-  %tmp = getelementptr i32* %A, i32 4
+  %tmp = getelementptr i32, i32* %A, i32 4
   store i32* %tmp, i32** %ptr
   ret { <2 x i32>, <2 x i32> } %ld2
 }
@@ -730,7 +730,7 @@ define { <2 x i32>, <2 x i32> } @test_v2i32_post_reg_ld2(i32* %A, i32** %ptr, i6
 ;CHECK-LABEL: test_v2i32_post_reg_ld2:
 ;CHECK: ld2.2s { v0, v1 }, [x0], x{{[0-9]+}}
   %ld2 = tail call { <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld2.v2i32.p0i32(i32* %A)
-  %tmp = getelementptr i32* %A, i64 %inc
+  %tmp = getelementptr i32, i32* %A, i64 %inc
   store i32* %tmp, i32** %ptr
   ret { <2 x i32>, <2 x i32> } %ld2
 }
@@ -742,7 +742,7 @@ define { <2 x i64>, <2 x i64> } @test_v2i64_post_imm_ld2(i64* %A, i64** %ptr) {
 ;CHECK-LABEL: test_v2i64_post_imm_ld2:
 ;CHECK: ld2.2d { v0, v1 }, [x0], #32
   %ld2 = tail call { <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld2.v2i64.p0i64(i64* %A)
-  %tmp = getelementptr i64* %A, i32 4
+  %tmp = getelementptr i64, i64* %A, i32 4
   store i64* %tmp, i64** %ptr
   ret { <2 x i64>, <2 x i64> } %ld2
 }
@@ -751,7 +751,7 @@ define { <2 x i64>, <2 x i64> } @test_v2i64_post_reg_ld2(i64* %A, i64** %ptr, i6
 ;CHECK-LABEL: test_v2i64_post_reg_ld2:
 ;CHECK: ld2.2d { v0, v1 }, [x0], x{{[0-9]+}}
   %ld2 = tail call { <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld2.v2i64.p0i64(i64* %A)
-  %tmp = getelementptr i64* %A, i64 %inc
+  %tmp = getelementptr i64, i64* %A, i64 %inc
   store i64* %tmp, i64** %ptr
   ret { <2 x i64>, <2 x i64> } %ld2
 }
@@ -763,7 +763,7 @@ define { <1 x i64>, <1 x i64> } @test_v1i64_post_imm_ld2(i64* %A, i64** %ptr) {
 ;CHECK-LABEL: test_v1i64_post_imm_ld2:
 ;CHECK: ld1.1d { v0, v1 }, [x0], #16
   %ld2 = tail call { <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld2.v1i64.p0i64(i64* %A)
-  %tmp = getelementptr i64* %A, i32 2
+  %tmp = getelementptr i64, i64* %A, i32 2
   store i64* %tmp, i64** %ptr
   ret { <1 x i64>, <1 x i64> } %ld2
 }
@@ -772,7 +772,7 @@ define { <1 x i64>, <1 x i64> } @test_v1i64_post_reg_ld2(i64* %A, i64** %ptr, i6
 ;CHECK-LABEL: test_v1i64_post_reg_ld2:
 ;CHECK: ld1.1d { v0, v1 }, [x0], x{{[0-9]+}}
   %ld2 = tail call { <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld2.v1i64.p0i64(i64* %A)
-  %tmp = getelementptr i64* %A, i64 %inc
+  %tmp = getelementptr i64, i64* %A, i64 %inc
   store i64* %tmp, i64** %ptr
   ret { <1 x i64>, <1 x i64> } %ld2
 }
@@ -784,7 +784,7 @@ define { <4 x float>, <4 x float> } @test_v4f32_post_imm_ld2(float* %A, float**
 ;CHECK-LABEL: test_v4f32_post_imm_ld2:
 ;CHECK: ld2.4s { v0, v1 }, [x0], #32
   %ld2 = tail call { <4 x float>, <4 x float> } @llvm.aarch64.neon.ld2.v4f32.p0f32(float* %A)
-  %tmp = getelementptr float* %A, i32 8
+  %tmp = getelementptr float, float* %A, i32 8
   store float* %tmp, float** %ptr
   ret { <4 x float>, <4 x float> } %ld2
 }
@@ -793,7 +793,7 @@ define { <4 x float>, <4 x float> } @test_v4f32_post_reg_ld2(float* %A, float**
 ;CHECK-LABEL: test_v4f32_post_reg_ld2:
 ;CHECK: ld2.4s { v0, v1 }, [x0], x{{[0-9]+}}
   %ld2 = tail call { <4 x float>, <4 x float> } @llvm.aarch64.neon.ld2.v4f32.p0f32(float* %A)
-  %tmp = getelementptr float* %A, i64 %inc
+  %tmp = getelementptr float, float* %A, i64 %inc
   store float* %tmp, float** %ptr
   ret { <4 x float>, <4 x float> } %ld2
 }
@@ -805,7 +805,7 @@ define { <2 x float>, <2 x float> } @test_v2f32_post_imm_ld2(float* %A, float**
 ;CHECK-LABEL: test_v2f32_post_imm_ld2:
 ;CHECK: ld2.2s { v0, v1 }, [x0], #16
   %ld2 = tail call { <2 x float>, <2 x float> } @llvm.aarch64.neon.ld2.v2f32.p0f32(float* %A)
-  %tmp = getelementptr float* %A, i32 4
+  %tmp = getelementptr float, float* %A, i32 4
   store float* %tmp, float** %ptr
   ret { <2 x float>, <2 x float> } %ld2
 }
@@ -814,7 +814,7 @@ define { <2 x float>, <2 x float> } @test_v2f32_post_reg_ld2(float* %A, float**
 ;CHECK-LABEL: test_v2f32_post_reg_ld2:
 ;CHECK: ld2.2s { v0, v1 }, [x0], x{{[0-9]+}}
   %ld2 = tail call { <2 x float>, <2 x float> } @llvm.aarch64.neon.ld2.v2f32.p0f32(float* %A)
-  %tmp = getelementptr float* %A, i64 %inc
+  %tmp = getelementptr float, float* %A, i64 %inc
   store float* %tmp, float** %ptr
   ret { <2 x float>, <2 x float> } %ld2
 }
@@ -826,7 +826,7 @@ define { <2 x double>, <2 x double> } @test_v2f64_post_imm_ld2(double* %A, doubl
 ;CHECK-LABEL: test_v2f64_post_imm_ld2:
 ;CHECK: ld2.2d { v0, v1 }, [x0], #32
   %ld2 = tail call { <2 x double>, <2 x double> } @llvm.aarch64.neon.ld2.v2f64.p0f64(double* %A)
-  %tmp = getelementptr double* %A, i32 4
+  %tmp = getelementptr double, double* %A, i32 4
   store double* %tmp, double** %ptr
   ret { <2 x double>, <2 x double> } %ld2
 }
@@ -835,7 +835,7 @@ define { <2 x double>, <2 x double> } @test_v2f64_post_reg_ld2(double* %A, doubl
 ;CHECK-LABEL: test_v2f64_post_reg_ld2:
 ;CHECK: ld2.2d { v0, v1 }, [x0], x{{[0-9]+}}
   %ld2 = tail call { <2 x double>, <2 x double> } @llvm.aarch64.neon.ld2.v2f64.p0f64(double* %A)
-  %tmp = getelementptr double* %A, i64 %inc
+  %tmp = getelementptr double, double* %A, i64 %inc
   store double* %tmp, double** %ptr
   ret { <2 x double>, <2 x double> } %ld2
 }
@@ -847,7 +847,7 @@ define { <1 x double>, <1 x double> } @test_v1f64_post_imm_ld2(double* %A, doubl
 ;CHECK-LABEL: test_v1f64_post_imm_ld2:
 ;CHECK: ld1.1d { v0, v1 }, [x0], #16
   %ld2 = tail call { <1 x double>, <1 x double> } @llvm.aarch64.neon.ld2.v1f64.p0f64(double* %A)
-  %tmp = getelementptr double* %A, i32 2
+  %tmp = getelementptr double, double* %A, i32 2
   store double* %tmp, double** %ptr
   ret { <1 x double>, <1 x double> } %ld2
 }
@@ -856,7 +856,7 @@ define { <1 x double>, <1 x double> } @test_v1f64_post_reg_ld2(double* %A, doubl
 ;CHECK-LABEL: test_v1f64_post_reg_ld2:
 ;CHECK: ld1.1d { v0, v1 }, [x0], x{{[0-9]+}}
   %ld2 = tail call { <1 x double>, <1 x double> } @llvm.aarch64.neon.ld2.v1f64.p0f64(double* %A)
-  %tmp = getelementptr double* %A, i64 %inc
+  %tmp = getelementptr double, double* %A, i64 %inc
   store double* %tmp, double** %ptr
   ret { <1 x double>, <1 x double> } %ld2
 }
@@ -868,7 +868,7 @@ define { <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_imm_ld3(i8* %A, i8**
 ;CHECK-LABEL: test_v16i8_post_imm_ld3:
 ;CHECK: ld3.16b { v0, v1, v2 }, [x0], #48
   %ld3 = tail call { <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld3.v16i8.p0i8(i8* %A)
-  %tmp = getelementptr i8* %A, i32 48
+  %tmp = getelementptr i8, i8* %A, i32 48
   store i8* %tmp, i8** %ptr
   ret { <16 x i8>, <16 x i8>, <16 x i8> } %ld3
 }
@@ -877,7 +877,7 @@ define { <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_reg_ld3(i8* %A, i8**
 ;CHECK-LABEL: test_v16i8_post_reg_ld3:
 ;CHECK: ld3.16b { v0, v1, v2 }, [x0], x{{[0-9]+}}
   %ld3 = tail call { <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld3.v16i8.p0i8(i8* %A)
-  %tmp = getelementptr i8* %A, i64 %inc
+  %tmp = getelementptr i8, i8* %A, i64 %inc
   store i8* %tmp, i8** %ptr
   ret { <16 x i8>, <16 x i8>, <16 x i8> } %ld3
 }
@@ -889,7 +889,7 @@ define { <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_imm_ld3(i8* %A, i8** %pt
 ;CHECK-LABEL: test_v8i8_post_imm_ld3:
 ;CHECK: ld3.8b { v0, v1, v2 }, [x0], #24
   %ld3 = tail call { <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld3.v8i8.p0i8(i8* %A)
-  %tmp = getelementptr i8* %A, i32 24
+  %tmp = getelementptr i8, i8* %A, i32 24
   store i8* %tmp, i8** %ptr
   ret { <8 x i8>, <8 x i8>, <8 x i8> } %ld3
 }
@@ -898,7 +898,7 @@ define { <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_reg_ld3(i8* %A, i8** %pt
 ;CHECK-LABEL: test_v8i8_post_reg_ld3:
 ;CHECK: ld3.8b { v0, v1, v2 }, [x0], x{{[0-9]+}}
   %ld3 = tail call { <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld3.v8i8.p0i8(i8* %A)
-  %tmp = getelementptr i8* %A, i64 %inc
+  %tmp = getelementptr i8, i8* %A, i64 %inc
   store i8* %tmp, i8** %ptr
   ret { <8 x i8>, <8 x i8>, <8 x i8> } %ld3
 }
@@ -910,7 +910,7 @@ define { <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_imm_ld3(i16* %A, i16
 ;CHECK-LABEL: test_v8i16_post_imm_ld3:
 ;CHECK: ld3.8h { v0, v1, v2 }, [x0], #48
   %ld3 = tail call { <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld3.v8i16.p0i16(i16* %A)
-  %tmp = getelementptr i16* %A, i32 24
+  %tmp = getelementptr i16, i16* %A, i32 24
   store i16* %tmp, i16** %ptr
   ret { <8 x i16>, <8 x i16>, <8 x i16> } %ld3
 }
@@ -919,7 +919,7 @@ define { <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_reg_ld3(i16* %A, i16
 ;CHECK-LABEL: test_v8i16_post_reg_ld3:
 ;CHECK: ld3.8h { v0, v1, v2 }, [x0], x{{[0-9]+}}
   %ld3 = tail call { <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld3.v8i16.p0i16(i16* %A)
-  %tmp = getelementptr i16* %A, i64 %inc
+  %tmp = getelementptr i16, i16* %A, i64 %inc
   store i16* %tmp, i16** %ptr
   ret { <8 x i16>, <8 x i16>, <8 x i16> } %ld3
 }
@@ -931,7 +931,7 @@ define { <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_imm_ld3(i16* %A, i16
 ;CHECK-LABEL: test_v4i16_post_imm_ld3:
 ;CHECK: ld3.4h { v0, v1, v2 }, [x0], #24
   %ld3 = tail call { <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld3.v4i16.p0i16(i16* %A)
-  %tmp = getelementptr i16* %A, i32 12
+  %tmp = getelementptr i16, i16* %A, i32 12
   store i16* %tmp, i16** %ptr
   ret { <4 x i16>, <4 x i16>, <4 x i16> } %ld3
 }
@@ -940,7 +940,7 @@ define { <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_reg_ld3(i16* %A, i16
 ;CHECK-LABEL: test_v4i16_post_reg_ld3:
 ;CHECK: ld3.4h { v0, v1, v2 }, [x0], x{{[0-9]+}}
   %ld3 = tail call { <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld3.v4i16.p0i16(i16* %A)
-  %tmp = getelementptr i16* %A, i64 %inc
+  %tmp = getelementptr i16, i16* %A, i64 %inc
   store i16* %tmp, i16** %ptr
   ret { <4 x i16>, <4 x i16>, <4 x i16> } %ld3
 }
@@ -952,7 +952,7 @@ define { <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_imm_ld3(i32* %A, i32
 ;CHECK-LABEL: test_v4i32_post_imm_ld3:
 ;CHECK: ld3.4s { v0, v1, v2 }, [x0], #48
   %ld3 = tail call { <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld3.v4i32.p0i32(i32* %A)
-  %tmp = getelementptr i32* %A, i32 12
+  %tmp = getelementptr i32, i32* %A, i32 12
   store i32* %tmp, i32** %ptr
   ret { <4 x i32>, <4 x i32>, <4 x i32> } %ld3
 }
@@ -961,7 +961,7 @@ define { <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_reg_ld3(i32* %A, i32
 ;CHECK-LABEL: test_v4i32_post_reg_ld3:
 ;CHECK: ld3.4s { v0, v1, v2 }, [x0], x{{[0-9]+}}
   %ld3 = tail call { <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld3.v4i32.p0i32(i32* %A)
-  %tmp = getelementptr i32* %A, i64 %inc
+  %tmp = getelementptr i32, i32* %A, i64 %inc
   store i32* %tmp, i32** %ptr
   ret { <4 x i32>, <4 x i32>, <4 x i32> } %ld3
 }
@@ -973,7 +973,7 @@ define { <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_imm_ld3(i32* %A, i32
 ;CHECK-LABEL: test_v2i32_post_imm_ld3:
 ;CHECK: ld3.2s { v0, v1, v2 }, [x0], #24
   %ld3 = tail call { <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld3.v2i32.p0i32(i32* %A)
-  %tmp = getelementptr i32* %A, i32 6
+  %tmp = getelementptr i32, i32* %A, i32 6
   store i32* %tmp, i32** %ptr
   ret { <2 x i32>, <2 x i32>, <2 x i32> } %ld3
 }
@@ -982,7 +982,7 @@ define { <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_reg_ld3(i32* %A, i32
 ;CHECK-LABEL: test_v2i32_post_reg_ld3:
 ;CHECK: ld3.2s { v0, v1, v2 }, [x0], x{{[0-9]+}}
   %ld3 = tail call { <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld3.v2i32.p0i32(i32* %A)
-  %tmp = getelementptr i32* %A, i64 %inc
+  %tmp = getelementptr i32, i32* %A, i64 %inc
   store i32* %tmp, i32** %ptr
   ret { <2 x i32>, <2 x i32>, <2 x i32> } %ld3
 }
@@ -994,7 +994,7 @@ define { <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_imm_ld3(i64* %A, i64
 ;CHECK-LABEL: test_v2i64_post_imm_ld3:
 ;CHECK: ld3.2d { v0, v1, v2 }, [x0], #48
   %ld3 = tail call { <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld3.v2i64.p0i64(i64* %A)
-  %tmp = getelementptr i64* %A, i32 6
+  %tmp = getelementptr i64, i64* %A, i32 6
   store i64* %tmp, i64** %ptr
   ret { <2 x i64>, <2 x i64>, <2 x i64> } %ld3
 }
@@ -1003,7 +1003,7 @@ define { <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_reg_ld3(i64* %A, i64
 ;CHECK-LABEL: test_v2i64_post_reg_ld3:
 ;CHECK: ld3.2d { v0, v1, v2 }, [x0], x{{[0-9]+}}
   %ld3 = tail call { <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld3.v2i64.p0i64(i64* %A)
-  %tmp = getelementptr i64* %A, i64 %inc
+  %tmp = getelementptr i64, i64* %A, i64 %inc
   store i64* %tmp, i64** %ptr
   ret { <2 x i64>, <2 x i64>, <2 x i64> } %ld3
 }
@@ -1015,7 +1015,7 @@ define { <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_imm_ld3(i64* %A, i64
 ;CHECK-LABEL: test_v1i64_post_imm_ld3:
 ;CHECK: ld1.1d { v0, v1, v2 }, [x0], #24
   %ld3 = tail call { <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld3.v1i64.p0i64(i64* %A)
-  %tmp = getelementptr i64* %A, i32 3
+  %tmp = getelementptr i64, i64* %A, i32 3
   store i64* %tmp, i64** %ptr
   ret { <1 x i64>, <1 x i64>, <1 x i64> } %ld3
 }
@@ -1024,7 +1024,7 @@ define { <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_reg_ld3(i64* %A, i64
 ;CHECK-LABEL: test_v1i64_post_reg_ld3:
 ;CHECK: ld1.1d { v0, v1, v2 }, [x0], x{{[0-9]+}}
   %ld3 = tail call { <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld3.v1i64.p0i64(i64* %A)
-  %tmp = getelementptr i64* %A, i64 %inc
+  %tmp = getelementptr i64, i64* %A, i64 %inc
   store i64* %tmp, i64** %ptr
   ret { <1 x i64>, <1 x i64>, <1 x i64> } %ld3
 }
@@ -1036,7 +1036,7 @@ define { <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_imm_ld3(float*
 ;CHECK-LABEL: test_v4f32_post_imm_ld3:
 ;CHECK: ld3.4s { v0, v1, v2 }, [x0], #48
   %ld3 = tail call { <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld3.v4f32.p0f32(float* %A)
-  %tmp = getelementptr float* %A, i32 12
+  %tmp = getelementptr float, float* %A, i32 12
   store float* %tmp, float** %ptr
   ret { <4 x float>, <4 x float>, <4 x float> } %ld3
 }
@@ -1045,7 +1045,7 @@ define { <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_reg_ld3(float*
 ;CHECK-LABEL: test_v4f32_post_reg_ld3:
 ;CHECK: ld3.4s { v0, v1, v2 }, [x0], x{{[0-9]+}}
   %ld3 = tail call { <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld3.v4f32.p0f32(float* %A)
-  %tmp = getelementptr float* %A, i64 %inc
+  %tmp = getelementptr float, float* %A, i64 %inc
   store float* %tmp, float** %ptr
   ret { <4 x float>, <4 x float>, <4 x float> } %ld3
 }
@@ -1057,7 +1057,7 @@ define { <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_imm_ld3(float*
 ;CHECK-LABEL: test_v2f32_post_imm_ld3:
 ;CHECK: ld3.2s { v0, v1, v2 }, [x0], #24
   %ld3 = tail call { <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld3.v2f32.p0f32(float* %A)
-  %tmp = getelementptr float* %A, i32 6
+  %tmp = getelementptr float, float* %A, i32 6
   store float* %tmp, float** %ptr
   ret { <2 x float>, <2 x float>, <2 x float> } %ld3
 }
@@ -1066,7 +1066,7 @@ define { <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_reg_ld3(float*
 ;CHECK-LABEL: test_v2f32_post_reg_ld3:
 ;CHECK: ld3.2s { v0, v1, v2 }, [x0], x{{[0-9]+}}
   %ld3 = tail call { <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld3.v2f32.p0f32(float* %A)
-  %tmp = getelementptr float* %A, i64 %inc
+  %tmp = getelementptr float, float* %A, i64 %inc
   store float* %tmp, float** %ptr
   ret { <2 x float>, <2 x float>, <2 x float> } %ld3
 }
@@ -1078,7 +1078,7 @@ define { <2 x double>, <2 x double>, <2 x double> } @test_v2f64_post_imm_ld3(dou
 ;CHECK-LABEL: test_v2f64_post_imm_ld3:
 ;CHECK: ld3.2d { v0, v1, v2 }, [x0], #48
   %ld3 = tail call { <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld3.v2f64.p0f64(double* %A)
-  %tmp = getelementptr double* %A, i32 6
+  %tmp = getelementptr double, double* %A, i32 6
   store double* %tmp, double** %ptr
   ret { <2 x double>, <2 x double>, <2 x double> } %ld3
 }
@@ -1087,7 +1087,7 @@ define { <2 x double>, <2 x double>, <2 x double> } @test_v2f64_post_reg_ld3(dou
 ;CHECK-LABEL: test_v2f64_post_reg_ld3:
 ;CHECK: ld3.2d { v0, v1, v2 }, [x0], x{{[0-9]+}}
   %ld3 = tail call { <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld3.v2f64.p0f64(double* %A)
-  %tmp = getelementptr double* %A, i64 %inc
+  %tmp = getelementptr double, double* %A, i64 %inc
   store double* %tmp, double** %ptr
   ret { <2 x double>, <2 x double>, <2 x double> } %ld3
 }
@@ -1099,7 +1099,7 @@ define { <1 x double>, <1 x double>, <1 x double> } @test_v1f64_post_imm_ld3(dou
 ;CHECK-LABEL: test_v1f64_post_imm_ld3:
 ;CHECK: ld1.1d { v0, v1, v2 }, [x0], #24
   %ld3 = tail call { <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld3.v1f64.p0f64(double* %A)
-  %tmp = getelementptr double* %A, i32 3
+  %tmp = getelementptr double, double* %A, i32 3
   store double* %tmp, double** %ptr
   ret { <1 x double>, <1 x double>, <1 x double> } %ld3
 }
@@ -1108,7 +1108,7 @@ define { <1 x double>, <1 x double>, <1 x double> } @test_v1f64_post_reg_ld3(dou
 ;CHECK-LABEL: test_v1f64_post_reg_ld3:
 ;CHECK: ld1.1d { v0, v1, v2 }, [x0], x{{[0-9]+}}
   %ld3 = tail call { <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld3.v1f64.p0f64(double* %A)
-  %tmp = getelementptr double* %A, i64 %inc
+  %tmp = getelementptr double, double* %A, i64 %inc
   store double* %tmp, double** %ptr
   ret { <1 x double>, <1 x double>, <1 x double> } %ld3
 }
@@ -1120,7 +1120,7 @@ define { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_imm_ld4(i
 ;CHECK-LABEL: test_v16i8_post_imm_ld4:
 ;CHECK: ld4.16b { v0, v1, v2, v3 }, [x0], #64
   %ld4 = tail call { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld4.v16i8.p0i8(i8* %A)
-  %tmp = getelementptr i8* %A, i32 64
+  %tmp = getelementptr i8, i8* %A, i32 64
   store i8* %tmp, i8** %ptr
   ret { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } %ld4
 }
@@ -1129,7 +1129,7 @@ define { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_reg_ld4(i
 ;CHECK-LABEL: test_v16i8_post_reg_ld4:
 ;CHECK: ld4.16b { v0, v1, v2, v3 }, [x0], x{{[0-9]+}}
   %ld4 = tail call { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld4.v16i8.p0i8(i8* %A)
-  %tmp = getelementptr i8* %A, i64 %inc
+  %tmp = getelementptr i8, i8* %A, i64 %inc
   store i8* %tmp, i8** %ptr
   ret { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } %ld4
 }
@@ -1141,7 +1141,7 @@ define { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_imm_ld4(i8* %A
 ;CHECK-LABEL: test_v8i8_post_imm_ld4:
 ;CHECK: ld4.8b { v0, v1, v2, v3 }, [x0], #32
   %ld4 = tail call { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld4.v8i8.p0i8(i8* %A)
-  %tmp = getelementptr i8* %A, i32 32
+  %tmp = getelementptr i8, i8* %A, i32 32
   store i8* %tmp, i8** %ptr
   ret { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } %ld4
 }
@@ -1150,7 +1150,7 @@ define { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_reg_ld4(i8* %A
 ;CHECK-LABEL: test_v8i8_post_reg_ld4:
 ;CHECK: ld4.8b { v0, v1, v2, v3 }, [x0], x{{[0-9]+}}
   %ld4 = tail call { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld4.v8i8.p0i8(i8* %A)
-  %tmp = getelementptr i8* %A, i64 %inc
+  %tmp = getelementptr i8, i8* %A, i64 %inc
   store i8* %tmp, i8** %ptr
   ret { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } %ld4
 }
@@ -1162,7 +1162,7 @@ define { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_imm_ld4(i
 ;CHECK-LABEL: test_v8i16_post_imm_ld4:
 ;CHECK: ld4.8h { v0, v1, v2, v3 }, [x0], #64
   %ld4 = tail call { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld4.v8i16.p0i16(i16* %A)
-  %tmp = getelementptr i16* %A, i32 32
+  %tmp = getelementptr i16, i16* %A, i32 32
   store i16* %tmp, i16** %ptr
   ret { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } %ld4
 }
@@ -1171,7 +1171,7 @@ define { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_reg_ld4(i
 ;CHECK-LABEL: test_v8i16_post_reg_ld4:
 ;CHECK: ld4.8h { v0, v1, v2, v3 }, [x0], x{{[0-9]+}}
   %ld4 = tail call { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld4.v8i16.p0i16(i16* %A)
-  %tmp = getelementptr i16* %A, i64 %inc
+  %tmp = getelementptr i16, i16* %A, i64 %inc
   store i16* %tmp, i16** %ptr
   ret { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } %ld4
 }
@@ -1183,7 +1183,7 @@ define { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_imm_ld4(i
 ;CHECK-LABEL: test_v4i16_post_imm_ld4:
 ;CHECK: ld4.4h { v0, v1, v2, v3 }, [x0], #32
   %ld4 = tail call { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld4.v4i16.p0i16(i16* %A)
-  %tmp = getelementptr i16* %A, i32 16
+  %tmp = getelementptr i16, i16* %A, i32 16
   store i16* %tmp, i16** %ptr
   ret { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } %ld4
 }
@@ -1192,7 +1192,7 @@ define { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_reg_ld4(i
 ;CHECK-LABEL: test_v4i16_post_reg_ld4:
 ;CHECK: ld4.4h { v0, v1, v2, v3 }, [x0], x{{[0-9]+}}
   %ld4 = tail call { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld4.v4i16.p0i16(i16* %A)
-  %tmp = getelementptr i16* %A, i64 %inc
+  %tmp = getelementptr i16, i16* %A, i64 %inc
   store i16* %tmp, i16** %ptr
   ret { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } %ld4
 }
@@ -1204,7 +1204,7 @@ define { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_imm_ld4(i
 ;CHECK-LABEL: test_v4i32_post_imm_ld4:
 ;CHECK: ld4.4s { v0, v1, v2, v3 }, [x0], #64
   %ld4 = tail call { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld4.v4i32.p0i32(i32* %A)
-  %tmp = getelementptr i32* %A, i32 16
+  %tmp = getelementptr i32, i32* %A, i32 16
   store i32* %tmp, i32** %ptr
   ret { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } %ld4
 }
@@ -1213,7 +1213,7 @@ define { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_reg_ld4(i
 ;CHECK-LABEL: test_v4i32_post_reg_ld4:
 ;CHECK: ld4.4s { v0, v1, v2, v3 }, [x0], x{{[0-9]+}}
   %ld4 = tail call { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld4.v4i32.p0i32(i32* %A)
-  %tmp = getelementptr i32* %A, i64 %inc
+  %tmp = getelementptr i32, i32* %A, i64 %inc
   store i32* %tmp, i32** %ptr
   ret { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } %ld4
 }
@@ -1225,7 +1225,7 @@ define { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_imm_ld4(i
 ;CHECK-LABEL: test_v2i32_post_imm_ld4:
 ;CHECK: ld4.2s { v0, v1, v2, v3 }, [x0], #32
   %ld4 = tail call { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld4.v2i32.p0i32(i32* %A)
-  %tmp = getelementptr i32* %A, i32 8
+  %tmp = getelementptr i32, i32* %A, i32 8
   store i32* %tmp, i32** %ptr
   ret { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } %ld4
 }
@@ -1234,7 +1234,7 @@ define { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_reg_ld4(i
 ;CHECK-LABEL: test_v2i32_post_reg_ld4:
 ;CHECK: ld4.2s { v0, v1, v2, v3 }, [x0], x{{[0-9]+}}
   %ld4 = tail call { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld4.v2i32.p0i32(i32* %A)
-  %tmp = getelementptr i32* %A, i64 %inc
+  %tmp = getelementptr i32, i32* %A, i64 %inc
   store i32* %tmp, i32** %ptr
   ret { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } %ld4
 }
@@ -1246,7 +1246,7 @@ define { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_imm_ld4(i
 ;CHECK-LABEL: test_v2i64_post_imm_ld4:
 ;CHECK: ld4.2d { v0, v1, v2, v3 }, [x0], #64
   %ld4 = tail call { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld4.v2i64.p0i64(i64* %A)
-  %tmp = getelementptr i64* %A, i32 8
+  %tmp = getelementptr i64, i64* %A, i32 8
   store i64* %tmp, i64** %ptr
   ret { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } %ld4
 }
@@ -1255,7 +1255,7 @@ define { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_reg_ld4(i
 ;CHECK-LABEL: test_v2i64_post_reg_ld4:
 ;CHECK: ld4.2d { v0, v1, v2, v3 }, [x0], x{{[0-9]+}}
   %ld4 = tail call { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld4.v2i64.p0i64(i64* %A)
-  %tmp = getelementptr i64* %A, i64 %inc
+  %tmp = getelementptr i64, i64* %A, i64 %inc
   store i64* %tmp, i64** %ptr
   ret { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } %ld4
 }
@@ -1267,7 +1267,7 @@ define { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_imm_ld4(i
 ;CHECK-LABEL: test_v1i64_post_imm_ld4:
 ;CHECK: ld1.1d { v0, v1, v2, v3 }, [x0], #32
   %ld4 = tail call { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld4.v1i64.p0i64(i64* %A)
-  %tmp = getelementptr i64* %A, i32 4
+  %tmp = getelementptr i64, i64* %A, i32 4
   store i64* %tmp, i64** %ptr
   ret { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } %ld4
 }
@@ -1276,7 +1276,7 @@ define { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_reg_ld4(i
 ;CHECK-LABEL: test_v1i64_post_reg_ld4:
 ;CHECK: ld1.1d { v0, v1, v2, v3 }, [x0], x{{[0-9]+}}
   %ld4 = tail call { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld4.v1i64.p0i64(i64* %A)
-  %tmp = getelementptr i64* %A, i64 %inc
+  %tmp = getelementptr i64, i64* %A, i64 %inc
   store i64* %tmp, i64** %ptr
   ret { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } %ld4
 }
@@ -1288,7 +1288,7 @@ define { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_i
 ;CHECK-LABEL: test_v4f32_post_imm_ld4:
 ;CHECK: ld4.4s { v0, v1, v2, v3 }, [x0], #64
   %ld4 = tail call { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld4.v4f32.p0f32(float* %A)
-  %tmp = getelementptr float* %A, i32 16
+  %tmp = getelementptr float, float* %A, i32 16
   store float* %tmp, float** %ptr
   ret { <4 x float>, <4 x float>, <4 x float>, <4 x float> } %ld4
 }
@@ -1297,7 +1297,7 @@ define { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_r
 ;CHECK-LABEL: test_v4f32_post_reg_ld4:
 ;CHECK: ld4.4s { v0, v1, v2, v3 }, [x0], x{{[0-9]+}}
   %ld4 = tail call { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld4.v4f32.p0f32(float* %A)
-  %tmp = getelementptr float* %A, i64 %inc
+  %tmp = getelementptr float, float* %A, i64 %inc
   store float* %tmp, float** %ptr
   ret { <4 x float>, <4 x float>, <4 x float>, <4 x float> } %ld4
 }
@@ -1309,7 +1309,7 @@ define { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_i
 ;CHECK-LABEL: test_v2f32_post_imm_ld4:
 ;CHECK: ld4.2s { v0, v1, v2, v3 }, [x0], #32
   %ld4 = tail call { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld4.v2f32.p0f32(float* %A)
-  %tmp = getelementptr float* %A, i32 8
+  %tmp = getelementptr float, float* %A, i32 8
   store float* %tmp, float** %ptr
   ret { <2 x float>, <2 x float>, <2 x float>, <2 x float> } %ld4
 }
@@ -1318,7 +1318,7 @@ define { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_r
 ;CHECK-LABEL: test_v2f32_post_reg_ld4:
 ;CHECK: ld4.2s { v0, v1, v2, v3 }, [x0], x{{[0-9]+}}
   %ld4 = tail call { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld4.v2f32.p0f32(float* %A)
-  %tmp = getelementptr float* %A, i64 %inc
+  %tmp = getelementptr float, float* %A, i64 %inc
   store float* %tmp, float** %ptr
   ret { <2 x float>, <2 x float>, <2 x float>, <2 x float> } %ld4
 }
@@ -1330,7 +1330,7 @@ define { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @test_v2f64_po
 ;CHECK-LABEL: test_v2f64_post_imm_ld4:
 ;CHECK: ld4.2d { v0, v1, v2, v3 }, [x0], #64
   %ld4 = tail call { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld4.v2f64.p0f64(double* %A)
-  %tmp = getelementptr double* %A, i32 8
+  %tmp = getelementptr double, double* %A, i32 8
   store double* %tmp, double** %ptr
   ret { <2 x double>, <2 x double>, <2 x double>, <2 x double> } %ld4
 }
@@ -1339,7 +1339,7 @@ define { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @test_v2f64_po
 ;CHECK-LABEL: test_v2f64_post_reg_ld4:
 ;CHECK: ld4.2d { v0, v1, v2, v3 }, [x0], x{{[0-9]+}}
   %ld4 = tail call { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld4.v2f64.p0f64(double* %A)
-  %tmp = getelementptr double* %A, i64 %inc
+  %tmp = getelementptr double, double* %A, i64 %inc
   store double* %tmp, double** %ptr
   ret { <2 x double>, <2 x double>, <2 x double>, <2 x double> } %ld4
 }
@@ -1351,7 +1351,7 @@ define { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @test_v1f64_po
 ;CHECK-LABEL: test_v1f64_post_imm_ld4:
 ;CHECK: ld1.1d { v0, v1, v2, v3 }, [x0], #32
   %ld4 = tail call { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld4.v1f64.p0f64(double* %A)
-  %tmp = getelementptr double* %A, i32 4
+  %tmp = getelementptr double, double* %A, i32 4
   store double* %tmp, double** %ptr
   ret { <1 x double>, <1 x double>, <1 x double>, <1 x double> } %ld4
 }
@@ -1360,7 +1360,7 @@ define { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @test_v1f64_po
 ;CHECK-LABEL: test_v1f64_post_reg_ld4:
 ;CHECK: ld1.1d { v0, v1, v2, v3 }, [x0], x{{[0-9]+}}
   %ld4 = tail call { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld4.v1f64.p0f64(double* %A)
-  %tmp = getelementptr double* %A, i64 %inc
+  %tmp = getelementptr double, double* %A, i64 %inc
   store double* %tmp, double** %ptr
   ret { <1 x double>, <1 x double>, <1 x double>, <1 x double> } %ld4
 }
@@ -1371,7 +1371,7 @@ define { <16 x i8>, <16 x i8> } @test_v16i8_post_imm_ld1x2(i8* %A, i8** %ptr) {
 ;CHECK-LABEL: test_v16i8_post_imm_ld1x2:
 ;CHECK: ld1.16b { v0, v1 }, [x0], #32
   %ld1x2 = tail call { <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld1x2.v16i8.p0i8(i8* %A)
-  %tmp = getelementptr i8* %A, i32 32
+  %tmp = getelementptr i8, i8* %A, i32 32
   store i8* %tmp, i8** %ptr
   ret { <16 x i8>, <16 x i8> } %ld1x2
 }
@@ -1380,7 +1380,7 @@ define { <16 x i8>, <16 x i8> } @test_v16i8_post_reg_ld1x2(i8* %A, i8** %ptr, i6
 ;CHECK-LABEL: test_v16i8_post_reg_ld1x2:
 ;CHECK: ld1.16b { v0, v1 }, [x0], x{{[0-9]+}}
   %ld1x2 = tail call { <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld1x2.v16i8.p0i8(i8* %A)
-  %tmp = getelementptr i8* %A, i64 %inc
+  %tmp = getelementptr i8, i8* %A, i64 %inc
   store i8* %tmp, i8** %ptr
   ret { <16 x i8>, <16 x i8> } %ld1x2
 }
@@ -1392,7 +1392,7 @@ define { <8 x i8>, <8 x i8> } @test_v8i8_post_imm_ld1x2(i8* %A, i8** %ptr) {
 ;CHECK-LABEL: test_v8i8_post_imm_ld1x2:
 ;CHECK: ld1.8b { v0, v1 }, [x0], #16
   %ld1x2 = tail call { <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld1x2.v8i8.p0i8(i8* %A)
-  %tmp = getelementptr i8* %A, i32 16
+  %tmp = getelementptr i8, i8* %A, i32 16
   store i8* %tmp, i8** %ptr
   ret { <8 x i8>, <8 x i8> } %ld1x2
 }
@@ -1401,7 +1401,7 @@ define { <8 x i8>, <8 x i8> } @test_v8i8_post_reg_ld1x2(i8* %A, i8** %ptr, i64 %
 ;CHECK-LABEL: test_v8i8_post_reg_ld1x2:
 ;CHECK: ld1.8b { v0, v1 }, [x0], x{{[0-9]+}}
   %ld1x2 = tail call { <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld1x2.v8i8.p0i8(i8* %A)
-  %tmp = getelementptr i8* %A, i64 %inc
+  %tmp = getelementptr i8, i8* %A, i64 %inc
   store i8* %tmp, i8** %ptr
   ret { <8 x i8>, <8 x i8> } %ld1x2
 }
@@ -1413,7 +1413,7 @@ define { <8 x i16>, <8 x i16> } @test_v8i16_post_imm_ld1x2(i16* %A, i16** %ptr)
 ;CHECK-LABEL: test_v8i16_post_imm_ld1x2:
 ;CHECK: ld1.8h { v0, v1 }, [x0], #32
   %ld1x2 = tail call { <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld1x2.v8i16.p0i16(i16* %A)
-  %tmp = getelementptr i16* %A, i32 16
+  %tmp = getelementptr i16, i16* %A, i32 16
   store i16* %tmp, i16** %ptr
   ret { <8 x i16>, <8 x i16> } %ld1x2
 }
@@ -1422,7 +1422,7 @@ define { <8 x i16>, <8 x i16> } @test_v8i16_post_reg_ld1x2(i16* %A, i16** %ptr,
 ;CHECK-LABEL: test_v8i16_post_reg_ld1x2:
 ;CHECK: ld1.8h { v0, v1 }, [x0], x{{[0-9]+}}
   %ld1x2 = tail call { <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld1x2.v8i16.p0i16(i16* %A)
-  %tmp = getelementptr i16* %A, i64 %inc
+  %tmp = getelementptr i16, i16* %A, i64 %inc
   store i16* %tmp, i16** %ptr
   ret { <8 x i16>, <8 x i16> } %ld1x2
 }
@@ -1434,7 +1434,7 @@ define { <4 x i16>, <4 x i16> } @test_v4i16_post_imm_ld1x2(i16* %A, i16** %ptr)
 ;CHECK-LABEL: test_v4i16_post_imm_ld1x2:
 ;CHECK: ld1.4h { v0, v1 }, [x0], #16
   %ld1x2 = tail call { <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld1x2.v4i16.p0i16(i16* %A)
-  %tmp = getelementptr i16* %A, i32 8
+  %tmp = getelementptr i16, i16* %A, i32 8
   store i16* %tmp, i16** %ptr
   ret { <4 x i16>, <4 x i16> } %ld1x2
 }
@@ -1443,7 +1443,7 @@ define { <4 x i16>, <4 x i16> } @test_v4i16_post_reg_ld1x2(i16* %A, i16** %ptr,
 ;CHECK-LABEL: test_v4i16_post_reg_ld1x2:
 ;CHECK: ld1.4h { v0, v1 }, [x0], x{{[0-9]+}}
   %ld1x2 = tail call { <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld1x2.v4i16.p0i16(i16* %A)
-  %tmp = getelementptr i16* %A, i64 %inc
+  %tmp = getelementptr i16, i16* %A, i64 %inc
   store i16* %tmp, i16** %ptr
   ret { <4 x i16>, <4 x i16> } %ld1x2
 }
@@ -1455,7 +1455,7 @@ define { <4 x i32>, <4 x i32> } @test_v4i32_post_imm_ld1x2(i32* %A, i32** %ptr)
 ;CHECK-LABEL: test_v4i32_post_imm_ld1x2:
 ;CHECK: ld1.4s { v0, v1 }, [x0], #32
   %ld1x2 = tail call { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld1x2.v4i32.p0i32(i32* %A)
-  %tmp = getelementptr i32* %A, i32 8
+  %tmp = getelementptr i32, i32* %A, i32 8
   store i32* %tmp, i32** %ptr
   ret { <4 x i32>, <4 x i32> } %ld1x2
 }
@@ -1464,7 +1464,7 @@ define { <4 x i32>, <4 x i32> } @test_v4i32_post_reg_ld1x2(i32* %A, i32** %ptr,
 ;CHECK-LABEL: test_v4i32_post_reg_ld1x2:
 ;CHECK: ld1.4s { v0, v1 }, [x0], x{{[0-9]+}}
   %ld1x2 = tail call { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld1x2.v4i32.p0i32(i32* %A)
-  %tmp = getelementptr i32* %A, i64 %inc
+  %tmp = getelementptr i32, i32* %A, i64 %inc
   store i32* %tmp, i32** %ptr
   ret { <4 x i32>, <4 x i32> } %ld1x2
 }
@@ -1476,7 +1476,7 @@ define { <2 x i32>, <2 x i32> } @test_v2i32_post_imm_ld1x2(i32* %A, i32** %ptr)
 ;CHECK-LABEL: test_v2i32_post_imm_ld1x2:
 ;CHECK: ld1.2s { v0, v1 }, [x0], #16
   %ld1x2 = tail call { <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld1x2.v2i32.p0i32(i32* %A)
-  %tmp = getelementptr i32* %A, i32 4
+  %tmp = getelementptr i32, i32* %A, i32 4
   store i32* %tmp, i32** %ptr
   ret { <2 x i32>, <2 x i32> } %ld1x2
 }
@@ -1485,7 +1485,7 @@ define { <2 x i32>, <2 x i32> } @test_v2i32_post_reg_ld1x2(i32* %A, i32** %ptr,
 ;CHECK-LABEL: test_v2i32_post_reg_ld1x2:
 ;CHECK: ld1.2s { v0, v1 }, [x0], x{{[0-9]+}}
   %ld1x2 = tail call { <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld1x2.v2i32.p0i32(i32* %A)
-  %tmp = getelementptr i32* %A, i64 %inc
+  %tmp = getelementptr i32, i32* %A, i64 %inc
   store i32* %tmp, i32** %ptr
   ret { <2 x i32>, <2 x i32> } %ld1x2
 }
@@ -1497,7 +1497,7 @@ define { <2 x i64>, <2 x i64> } @test_v2i64_post_imm_ld1x2(i64* %A, i64** %ptr)
 ;CHECK-LABEL: test_v2i64_post_imm_ld1x2:
 ;CHECK: ld1.2d { v0, v1 }, [x0], #32
   %ld1x2 = tail call { <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld1x2.v2i64.p0i64(i64* %A)
-  %tmp = getelementptr i64* %A, i32 4
+  %tmp = getelementptr i64, i64* %A, i32 4
   store i64* %tmp, i64** %ptr
   ret { <2 x i64>, <2 x i64> } %ld1x2
 }
@@ -1506,7 +1506,7 @@ define { <2 x i64>, <2 x i64> } @test_v2i64_post_reg_ld1x2(i64* %A, i64** %ptr,
 ;CHECK-LABEL: test_v2i64_post_reg_ld1x2:
 ;CHECK: ld1.2d { v0, v1 }, [x0], x{{[0-9]+}}
   %ld1x2 = tail call { <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld1x2.v2i64.p0i64(i64* %A)
-  %tmp = getelementptr i64* %A, i64 %inc
+  %tmp = getelementptr i64, i64* %A, i64 %inc
   store i64* %tmp, i64** %ptr
   ret { <2 x i64>, <2 x i64> } %ld1x2
 }
@@ -1518,7 +1518,7 @@ define { <1 x i64>, <1 x i64> } @test_v1i64_post_imm_ld1x2(i64* %A, i64** %ptr)
 ;CHECK-LABEL: test_v1i64_post_imm_ld1x2:
 ;CHECK: ld1.1d { v0, v1 }, [x0], #16
   %ld1x2 = tail call { <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld1x2.v1i64.p0i64(i64* %A)
-  %tmp = getelementptr i64* %A, i32 2
+  %tmp = getelementptr i64, i64* %A, i32 2
   store i64* %tmp, i64** %ptr
   ret { <1 x i64>, <1 x i64> } %ld1x2
 }
@@ -1527,7 +1527,7 @@ define { <1 x i64>, <1 x i64> } @test_v1i64_post_reg_ld1x2(i64* %A, i64** %ptr,
 ;CHECK-LABEL: test_v1i64_post_reg_ld1x2:
 ;CHECK: ld1.1d { v0, v1 }, [x0], x{{[0-9]+}}
   %ld1x2 = tail call { <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld1x2.v1i64.p0i64(i64* %A)
-  %tmp = getelementptr i64* %A, i64 %inc
+  %tmp = getelementptr i64, i64* %A, i64 %inc
   store i64* %tmp, i64** %ptr
   ret { <1 x i64>, <1 x i64> } %ld1x2
 }
@@ -1539,7 +1539,7 @@ define { <4 x float>, <4 x float> } @test_v4f32_post_imm_ld1x2(float* %A, float*
 ;CHECK-LABEL: test_v4f32_post_imm_ld1x2:
 ;CHECK: ld1.4s { v0, v1 }, [x0], #32
   %ld1x2 = tail call { <4 x float>, <4 x float> } @llvm.aarch64.neon.ld1x2.v4f32.p0f32(float* %A)
-  %tmp = getelementptr float* %A, i32 8
+  %tmp = getelementptr float, float* %A, i32 8
   store float* %tmp, float** %ptr
   ret { <4 x float>, <4 x float> } %ld1x2
 }
@@ -1548,7 +1548,7 @@ define { <4 x float>, <4 x float> } @test_v4f32_post_reg_ld1x2(float* %A, float*
 ;CHECK-LABEL: test_v4f32_post_reg_ld1x2:
 ;CHECK: ld1.4s { v0, v1 }, [x0], x{{[0-9]+}}
   %ld1x2 = tail call { <4 x float>, <4 x float> } @llvm.aarch64.neon.ld1x2.v4f32.p0f32(float* %A)
-  %tmp = getelementptr float* %A, i64 %inc
+  %tmp = getelementptr float, float* %A, i64 %inc
   store float* %tmp, float** %ptr
   ret { <4 x float>, <4 x float> } %ld1x2
 }
@@ -1560,7 +1560,7 @@ define { <2 x float>, <2 x float> } @test_v2f32_post_imm_ld1x2(float* %A, float*
 ;CHECK-LABEL: test_v2f32_post_imm_ld1x2:
 ;CHECK: ld1.2s { v0, v1 }, [x0], #16
   %ld1x2 = tail call { <2 x float>, <2 x float> } @llvm.aarch64.neon.ld1x2.v2f32.p0f32(float* %A)
-  %tmp = getelementptr float* %A, i32 4
+  %tmp = getelementptr float, float* %A, i32 4
   store float* %tmp, float** %ptr
   ret { <2 x float>, <2 x float> } %ld1x2
 }
@@ -1569,7 +1569,7 @@ define { <2 x float>, <2 x float> } @test_v2f32_post_reg_ld1x2(float* %A, float*
 ;CHECK-LABEL: test_v2f32_post_reg_ld1x2:
 ;CHECK: ld1.2s { v0, v1 }, [x0], x{{[0-9]+}}
   %ld1x2 = tail call { <2 x float>, <2 x float> } @llvm.aarch64.neon.ld1x2.v2f32.p0f32(float* %A)
-  %tmp = getelementptr float* %A, i64 %inc
+  %tmp = getelementptr float, float* %A, i64 %inc
   store float* %tmp, float** %ptr
   ret { <2 x float>, <2 x float> } %ld1x2
 }
@@ -1581,7 +1581,7 @@ define { <2 x double>, <2 x double> } @test_v2f64_post_imm_ld1x2(double* %A, dou
 ;CHECK-LABEL: test_v2f64_post_imm_ld1x2:
 ;CHECK: ld1.2d { v0, v1 }, [x0], #32
   %ld1x2 = tail call { <2 x double>, <2 x double> } @llvm.aarch64.neon.ld1x2.v2f64.p0f64(double* %A)
-  %tmp = getelementptr double* %A, i32 4
+  %tmp = getelementptr double, double* %A, i32 4
   store double* %tmp, double** %ptr
   ret { <2 x double>, <2 x double> } %ld1x2
 }
@@ -1590,7 +1590,7 @@ define { <2 x double>, <2 x double> } @test_v2f64_post_reg_ld1x2(double* %A, dou
 ;CHECK-LABEL: test_v2f64_post_reg_ld1x2:
 ;CHECK: ld1.2d { v0, v1 }, [x0], x{{[0-9]+}}
   %ld1x2 = tail call { <2 x double>, <2 x double> } @llvm.aarch64.neon.ld1x2.v2f64.p0f64(double* %A)
-  %tmp = getelementptr double* %A, i64 %inc
+  %tmp = getelementptr double, double* %A, i64 %inc
   store double* %tmp, double** %ptr
   ret { <2 x double>, <2 x double> } %ld1x2
 }
@@ -1602,7 +1602,7 @@ define { <1 x double>, <1 x double> } @test_v1f64_post_imm_ld1x2(double* %A, dou
 ;CHECK-LABEL: test_v1f64_post_imm_ld1x2:
 ;CHECK: ld1.1d { v0, v1 }, [x0], #16
   %ld1x2 = tail call { <1 x double>, <1 x double> } @llvm.aarch64.neon.ld1x2.v1f64.p0f64(double* %A)
-  %tmp = getelementptr double* %A, i32 2
+  %tmp = getelementptr double, double* %A, i32 2
   store double* %tmp, double** %ptr
   ret { <1 x double>, <1 x double> } %ld1x2
 }
@@ -1611,7 +1611,7 @@ define { <1 x double>, <1 x double> } @test_v1f64_post_reg_ld1x2(double* %A, dou
 ;CHECK-LABEL: test_v1f64_post_reg_ld1x2:
 ;CHECK: ld1.1d { v0, v1 }, [x0], x{{[0-9]+}}
   %ld1x2 = tail call { <1 x double>, <1 x double> } @llvm.aarch64.neon.ld1x2.v1f64.p0f64(double* %A)
-  %tmp = getelementptr double* %A, i64 %inc
+  %tmp = getelementptr double, double* %A, i64 %inc
   store double* %tmp, double** %ptr
   ret { <1 x double>, <1 x double> } %ld1x2
 }
@@ -1623,7 +1623,7 @@ define { <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_imm_ld1x3(i8* %A, i8
 ;CHECK-LABEL: test_v16i8_post_imm_ld1x3:
 ;CHECK: ld1.16b { v0, v1, v2 }, [x0], #48
   %ld1x3 = tail call { <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld1x3.v16i8.p0i8(i8* %A)
-  %tmp = getelementptr i8* %A, i32 48
+  %tmp = getelementptr i8, i8* %A, i32 48
   store i8* %tmp, i8** %ptr
   ret { <16 x i8>, <16 x i8>, <16 x i8> } %ld1x3
 }
@@ -1632,7 +1632,7 @@ define { <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_reg_ld1x3(i8* %A, i8
 ;CHECK-LABEL: test_v16i8_post_reg_ld1x3:
 ;CHECK: ld1.16b { v0, v1, v2 }, [x0], x{{[0-9]+}}
   %ld1x3 = tail call { <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld1x3.v16i8.p0i8(i8* %A)
-  %tmp = getelementptr i8* %A, i64 %inc
+  %tmp = getelementptr i8, i8* %A, i64 %inc
   store i8* %tmp, i8** %ptr
   ret { <16 x i8>, <16 x i8>, <16 x i8> } %ld1x3
 }
@@ -1644,7 +1644,7 @@ define { <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_imm_ld1x3(i8* %A, i8** %
 ;CHECK-LABEL: test_v8i8_post_imm_ld1x3:
 ;CHECK: ld1.8b { v0, v1, v2 }, [x0], #24
   %ld1x3 = tail call { <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld1x3.v8i8.p0i8(i8* %A)
-  %tmp = getelementptr i8* %A, i32 24
+  %tmp = getelementptr i8, i8* %A, i32 24
   store i8* %tmp, i8** %ptr
   ret { <8 x i8>, <8 x i8>, <8 x i8> } %ld1x3
 }
@@ -1653,7 +1653,7 @@ define { <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_reg_ld1x3(i8* %A, i8** %
 ;CHECK-LABEL: test_v8i8_post_reg_ld1x3:
 ;CHECK: ld1.8b { v0, v1, v2 }, [x0], x{{[0-9]+}}
   %ld1x3 = tail call { <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld1x3.v8i8.p0i8(i8* %A)
-  %tmp = getelementptr i8* %A, i64 %inc
+  %tmp = getelementptr i8, i8* %A, i64 %inc
   store i8* %tmp, i8** %ptr
   ret { <8 x i8>, <8 x i8>, <8 x i8> } %ld1x3
 }
@@ -1665,7 +1665,7 @@ define { <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_imm_ld1x3(i16* %A, i
 ;CHECK-LABEL: test_v8i16_post_imm_ld1x3:
 ;CHECK: ld1.8h { v0, v1, v2 }, [x0], #48
   %ld1x3 = tail call { <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld1x3.v8i16.p0i16(i16* %A)
-  %tmp = getelementptr i16* %A, i32 24
+  %tmp = getelementptr i16, i16* %A, i32 24
   store i16* %tmp, i16** %ptr
   ret { <8 x i16>, <8 x i16>, <8 x i16> } %ld1x3
 }
@@ -1674,7 +1674,7 @@ define { <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_reg_ld1x3(i16* %A, i
 ;CHECK-LABEL: test_v8i16_post_reg_ld1x3:
 ;CHECK: ld1.8h { v0, v1, v2 }, [x0], x{{[0-9]+}}
   %ld1x3 = tail call { <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld1x3.v8i16.p0i16(i16* %A)
-  %tmp = getelementptr i16* %A, i64 %inc
+  %tmp = getelementptr i16, i16* %A, i64 %inc
   store i16* %tmp, i16** %ptr
   ret { <8 x i16>, <8 x i16>, <8 x i16> } %ld1x3
 }
@@ -1686,7 +1686,7 @@ define { <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_imm_ld1x3(i16* %A, i
 ;CHECK-LABEL: test_v4i16_post_imm_ld1x3:
 ;CHECK: ld1.4h { v0, v1, v2 }, [x0], #24
   %ld1x3 = tail call { <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld1x3.v4i16.p0i16(i16* %A)
-  %tmp = getelementptr i16* %A, i32 12
+  %tmp = getelementptr i16, i16* %A, i32 12
   store i16* %tmp, i16** %ptr
   ret { <4 x i16>, <4 x i16>, <4 x i16> } %ld1x3
 }
@@ -1695,7 +1695,7 @@ define { <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_reg_ld1x3(i16* %A, i
 ;CHECK-LABEL: test_v4i16_post_reg_ld1x3:
 ;CHECK: ld1.4h { v0, v1, v2 }, [x0], x{{[0-9]+}}
   %ld1x3 = tail call { <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld1x3.v4i16.p0i16(i16* %A)
-  %tmp = getelementptr i16* %A, i64 %inc
+  %tmp = getelementptr i16, i16* %A, i64 %inc
   store i16* %tmp, i16** %ptr
   ret { <4 x i16>, <4 x i16>, <4 x i16> } %ld1x3
 }
@@ -1707,7 +1707,7 @@ define { <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_imm_ld1x3(i32* %A, i
 ;CHECK-LABEL: test_v4i32_post_imm_ld1x3:
 ;CHECK: ld1.4s { v0, v1, v2 }, [x0], #48
   %ld1x3 = tail call { <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld1x3.v4i32.p0i32(i32* %A)
-  %tmp = getelementptr i32* %A, i32 12
+  %tmp = getelementptr i32, i32* %A, i32 12
   store i32* %tmp, i32** %ptr
   ret { <4 x i32>, <4 x i32>, <4 x i32> } %ld1x3
 }
@@ -1716,7 +1716,7 @@ define { <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_reg_ld1x3(i32* %A, i
 ;CHECK-LABEL: test_v4i32_post_reg_ld1x3:
 ;CHECK: ld1.4s { v0, v1, v2 }, [x0], x{{[0-9]+}}
   %ld1x3 = tail call { <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld1x3.v4i32.p0i32(i32* %A)
-  %tmp = getelementptr i32* %A, i64 %inc
+  %tmp = getelementptr i32, i32* %A, i64 %inc
   store i32* %tmp, i32** %ptr
   ret { <4 x i32>, <4 x i32>, <4 x i32> } %ld1x3
 }
@@ -1728,7 +1728,7 @@ define { <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_imm_ld1x3(i32* %A, i
 ;CHECK-LABEL: test_v2i32_post_imm_ld1x3:
 ;CHECK: ld1.2s { v0, v1, v2 }, [x0], #24
   %ld1x3 = tail call { <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld1x3.v2i32.p0i32(i32* %A)
-  %tmp = getelementptr i32* %A, i32 6
+  %tmp = getelementptr i32, i32* %A, i32 6
   store i32* %tmp, i32** %ptr
   ret { <2 x i32>, <2 x i32>, <2 x i32> } %ld1x3
 }
@@ -1737,7 +1737,7 @@ define { <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_reg_ld1x3(i32* %A, i
 ;CHECK-LABEL: test_v2i32_post_reg_ld1x3:
 ;CHECK: ld1.2s { v0, v1, v2 }, [x0], x{{[0-9]+}}
   %ld1x3 = tail call { <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld1x3.v2i32.p0i32(i32* %A)
-  %tmp = getelementptr i32* %A, i64 %inc
+  %tmp = getelementptr i32, i32* %A, i64 %inc
   store i32* %tmp, i32** %ptr
   ret { <2 x i32>, <2 x i32>, <2 x i32> } %ld1x3
 }
@@ -1749,7 +1749,7 @@ define { <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_imm_ld1x3(i64* %A, i
 ;CHECK-LABEL: test_v2i64_post_imm_ld1x3:
 ;CHECK: ld1.2d { v0, v1, v2 }, [x0], #48
   %ld1x3 = tail call { <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld1x3.v2i64.p0i64(i64* %A)
-  %tmp = getelementptr i64* %A, i32 6
+  %tmp = getelementptr i64, i64* %A, i32 6
   store i64* %tmp, i64** %ptr
   ret { <2 x i64>, <2 x i64>, <2 x i64> } %ld1x3
 }
@@ -1758,7 +1758,7 @@ define { <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_reg_ld1x3(i64* %A, i
 ;CHECK-LABEL: test_v2i64_post_reg_ld1x3:
 ;CHECK: ld1.2d { v0, v1, v2 }, [x0], x{{[0-9]+}}
   %ld1x3 = tail call { <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld1x3.v2i64.p0i64(i64* %A)
-  %tmp = getelementptr i64* %A, i64 %inc
+  %tmp = getelementptr i64, i64* %A, i64 %inc
   store i64* %tmp, i64** %ptr
   ret { <2 x i64>, <2 x i64>, <2 x i64> } %ld1x3
 }
@@ -1770,7 +1770,7 @@ define { <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_imm_ld1x3(i64* %A, i
 ;CHECK-LABEL: test_v1i64_post_imm_ld1x3:
 ;CHECK: ld1.1d { v0, v1, v2 }, [x0], #24
   %ld1x3 = tail call { <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld1x3.v1i64.p0i64(i64* %A)
-  %tmp = getelementptr i64* %A, i32 3
+  %tmp = getelementptr i64, i64* %A, i32 3
   store i64* %tmp, i64** %ptr
   ret { <1 x i64>, <1 x i64>, <1 x i64> } %ld1x3
 }
@@ -1779,7 +1779,7 @@ define { <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_reg_ld1x3(i64* %A, i
 ;CHECK-LABEL: test_v1i64_post_reg_ld1x3:
 ;CHECK: ld1.1d { v0, v1, v2 }, [x0], x{{[0-9]+}}
   %ld1x3 = tail call { <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld1x3.v1i64.p0i64(i64* %A)
-  %tmp = getelementptr i64* %A, i64 %inc
+  %tmp = getelementptr i64, i64* %A, i64 %inc
   store i64* %tmp, i64** %ptr
   ret { <1 x i64>, <1 x i64>, <1 x i64> } %ld1x3
 }
@@ -1791,7 +1791,7 @@ define { <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_imm_ld1x3(floa
 ;CHECK-LABEL: test_v4f32_post_imm_ld1x3:
 ;CHECK: ld1.4s { v0, v1, v2 }, [x0], #48
   %ld1x3 = tail call { <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld1x3.v4f32.p0f32(float* %A)
-  %tmp = getelementptr float* %A, i32 12
+  %tmp = getelementptr float, float* %A, i32 12
   store float* %tmp, float** %ptr
   ret { <4 x float>, <4 x float>, <4 x float> } %ld1x3
 }
@@ -1800,7 +1800,7 @@ define { <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_reg_ld1x3(floa
 ;CHECK-LABEL: test_v4f32_post_reg_ld1x3:
 ;CHECK: ld1.4s { v0, v1, v2 }, [x0], x{{[0-9]+}}
   %ld1x3 = tail call { <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld1x3.v4f32.p0f32(float* %A)
-  %tmp = getelementptr float* %A, i64 %inc
+  %tmp = getelementptr float, float* %A, i64 %inc
   store float* %tmp, float** %ptr
   ret { <4 x float>, <4 x float>, <4 x float> } %ld1x3
 }
@@ -1812,7 +1812,7 @@ define { <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_imm_ld1x3(floa
 ;CHECK-LABEL: test_v2f32_post_imm_ld1x3:
 ;CHECK: ld1.2s { v0, v1, v2 }, [x0], #24
   %ld1x3 = tail call { <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld1x3.v2f32.p0f32(float* %A)
-  %tmp = getelementptr float* %A, i32 6
+  %tmp = getelementptr float, float* %A, i32 6
   store float* %tmp, float** %ptr
   ret { <2 x float>, <2 x float>, <2 x float> } %ld1x3
 }
@@ -1821,7 +1821,7 @@ define { <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_reg_ld1x3(floa
 ;CHECK-LABEL: test_v2f32_post_reg_ld1x3:
 ;CHECK: ld1.2s { v0, v1, v2 }, [x0], x{{[0-9]+}}
   %ld1x3 = tail call { <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld1x3.v2f32.p0f32(float* %A)
-  %tmp = getelementptr float* %A, i64 %inc
+  %tmp = getelementptr float, float* %A, i64 %inc
   store float* %tmp, float** %ptr
   ret { <2 x float>, <2 x float>, <2 x float> } %ld1x3
 }
@@ -1833,7 +1833,7 @@ define { <2 x double>, <2 x double>, <2 x double> } @test_v2f64_post_imm_ld1x3(d
 ;CHECK-LABEL: test_v2f64_post_imm_ld1x3:
 ;CHECK: ld1.2d { v0, v1, v2 }, [x0], #48
   %ld1x3 = tail call { <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld1x3.v2f64.p0f64(double* %A)
-  %tmp = getelementptr double* %A, i32 6
+  %tmp = getelementptr double, double* %A, i32 6
   store double* %tmp, double** %ptr
   ret { <2 x double>, <2 x double>, <2 x double> } %ld1x3
 }
@@ -1842,7 +1842,7 @@ define { <2 x double>, <2 x double>, <2 x double> } @test_v2f64_post_reg_ld1x3(d
 ;CHECK-LABEL: test_v2f64_post_reg_ld1x3:
 ;CHECK: ld1.2d { v0, v1, v2 }, [x0], x{{[0-9]+}}
   %ld1x3 = tail call { <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld1x3.v2f64.p0f64(double* %A)
-  %tmp = getelementptr double* %A, i64 %inc
+  %tmp = getelementptr double, double* %A, i64 %inc
   store double* %tmp, double** %ptr
   ret { <2 x double>, <2 x double>, <2 x double> } %ld1x3
 }
@@ -1854,7 +1854,7 @@ define { <1 x double>, <1 x double>, <1 x double> } @test_v1f64_post_imm_ld1x3(d
 ;CHECK-LABEL: test_v1f64_post_imm_ld1x3:
 ;CHECK: ld1.1d { v0, v1, v2 }, [x0], #24
   %ld1x3 = tail call { <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld1x3.v1f64.p0f64(double* %A)
-  %tmp = getelementptr double* %A, i32 3
+  %tmp = getelementptr double, double* %A, i32 3
   store double* %tmp, double** %ptr
   ret { <1 x double>, <1 x double>, <1 x double> } %ld1x3
 }
@@ -1863,7 +1863,7 @@ define { <1 x double>, <1 x double>, <1 x double> } @test_v1f64_post_reg_ld1x3(d
 ;CHECK-LABEL: test_v1f64_post_reg_ld1x3:
 ;CHECK: ld1.1d { v0, v1, v2 }, [x0], x{{[0-9]+}}
   %ld1x3 = tail call { <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld1x3.v1f64.p0f64(double* %A)
-  %tmp = getelementptr double* %A, i64 %inc
+  %tmp = getelementptr double, double* %A, i64 %inc
   store double* %tmp, double** %ptr
   ret { <1 x double>, <1 x double>, <1 x double> } %ld1x3
 }
@@ -1875,7 +1875,7 @@ define { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_imm_ld1x4
 ;CHECK-LABEL: test_v16i8_post_imm_ld1x4:
 ;CHECK: ld1.16b { v0, v1, v2, v3 }, [x0], #64
   %ld1x4 = tail call { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld1x4.v16i8.p0i8(i8* %A)
-  %tmp = getelementptr i8* %A, i32 64
+  %tmp = getelementptr i8, i8* %A, i32 64
   store i8* %tmp, i8** %ptr
   ret { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } %ld1x4
 }
@@ -1884,7 +1884,7 @@ define { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_reg_ld1x4
 ;CHECK-LABEL: test_v16i8_post_reg_ld1x4:
 ;CHECK: ld1.16b { v0, v1, v2, v3 }, [x0], x{{[0-9]+}}
   %ld1x4 = tail call { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld1x4.v16i8.p0i8(i8* %A)
-  %tmp = getelementptr i8* %A, i64 %inc
+  %tmp = getelementptr i8, i8* %A, i64 %inc
   store i8* %tmp, i8** %ptr
   ret { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } %ld1x4
 }
@@ -1896,7 +1896,7 @@ define { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_imm_ld1x4(i8*
 ;CHECK-LABEL: test_v8i8_post_imm_ld1x4:
 ;CHECK: ld1.8b { v0, v1, v2, v3 }, [x0], #32
   %ld1x4 = tail call { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld1x4.v8i8.p0i8(i8* %A)
-  %tmp = getelementptr i8* %A, i32 32
+  %tmp = getelementptr i8, i8* %A, i32 32
   store i8* %tmp, i8** %ptr
   ret { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } %ld1x4
 }
@@ -1905,7 +1905,7 @@ define { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_reg_ld1x4(i8*
 ;CHECK-LABEL: test_v8i8_post_reg_ld1x4:
 ;CHECK: ld1.8b { v0, v1, v2, v3 }, [x0], x{{[0-9]+}}
   %ld1x4 = tail call { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld1x4.v8i8.p0i8(i8* %A)
-  %tmp = getelementptr i8* %A, i64 %inc
+  %tmp = getelementptr i8, i8* %A, i64 %inc
   store i8* %tmp, i8** %ptr
   ret { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } %ld1x4
 }
@@ -1917,7 +1917,7 @@ define { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_imm_ld1x4
 ;CHECK-LABEL: test_v8i16_post_imm_ld1x4:
 ;CHECK: ld1.8h { v0, v1, v2, v3 }, [x0], #64
   %ld1x4 = tail call { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld1x4.v8i16.p0i16(i16* %A)
-  %tmp = getelementptr i16* %A, i32 32
+  %tmp = getelementptr i16, i16* %A, i32 32
   store i16* %tmp, i16** %ptr
   ret { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } %ld1x4
 }
@@ -1926,7 +1926,7 @@ define { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_reg_ld1x4
 ;CHECK-LABEL: test_v8i16_post_reg_ld1x4:
 ;CHECK: ld1.8h { v0, v1, v2, v3 }, [x0], x{{[0-9]+}}
   %ld1x4 = tail call { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld1x4.v8i16.p0i16(i16* %A)
-  %tmp = getelementptr i16* %A, i64 %inc
+  %tmp = getelementptr i16, i16* %A, i64 %inc
   store i16* %tmp, i16** %ptr
   ret { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } %ld1x4
 }
@@ -1938,7 +1938,7 @@ define { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_imm_ld1x4
 ;CHECK-LABEL: test_v4i16_post_imm_ld1x4:
 ;CHECK: ld1.4h { v0, v1, v2, v3 }, [x0], #32
   %ld1x4 = tail call { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld1x4.v4i16.p0i16(i16* %A)
-  %tmp = getelementptr i16* %A, i32 16
+  %tmp = getelementptr i16, i16* %A, i32 16
   store i16* %tmp, i16** %ptr
   ret { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } %ld1x4
 }
@@ -1947,7 +1947,7 @@ define { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_reg_ld1x4
 ;CHECK-LABEL: test_v4i16_post_reg_ld1x4:
 ;CHECK: ld1.4h { v0, v1, v2, v3 }, [x0], x{{[0-9]+}}
   %ld1x4 = tail call { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld1x4.v4i16.p0i16(i16* %A)
-  %tmp = getelementptr i16* %A, i64 %inc
+  %tmp = getelementptr i16, i16* %A, i64 %inc
   store i16* %tmp, i16** %ptr
   ret { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } %ld1x4
 }
@@ -1959,7 +1959,7 @@ define { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_imm_ld1x4
 ;CHECK-LABEL: test_v4i32_post_imm_ld1x4:
 ;CHECK: ld1.4s { v0, v1, v2, v3 }, [x0], #64
   %ld1x4 = tail call { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld1x4.v4i32.p0i32(i32* %A)
-  %tmp = getelementptr i32* %A, i32 16
+  %tmp = getelementptr i32, i32* %A, i32 16
   store i32* %tmp, i32** %ptr
   ret { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } %ld1x4
 }
@@ -1968,7 +1968,7 @@ define { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_reg_ld1x4
 ;CHECK-LABEL: test_v4i32_post_reg_ld1x4:
 ;CHECK: ld1.4s { v0, v1, v2, v3 }, [x0], x{{[0-9]+}}
   %ld1x4 = tail call { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld1x4.v4i32.p0i32(i32* %A)
-  %tmp = getelementptr i32* %A, i64 %inc
+  %tmp = getelementptr i32, i32* %A, i64 %inc
   store i32* %tmp, i32** %ptr
   ret { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } %ld1x4
 }
@@ -1980,7 +1980,7 @@ define { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_imm_ld1x4
 ;CHECK-LABEL: test_v2i32_post_imm_ld1x4:
 ;CHECK: ld1.2s { v0, v1, v2, v3 }, [x0], #32
   %ld1x4 = tail call { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld1x4.v2i32.p0i32(i32* %A)
-  %tmp = getelementptr i32* %A, i32 8
+  %tmp = getelementptr i32, i32* %A, i32 8
   store i32* %tmp, i32** %ptr
   ret { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } %ld1x4
 }
@@ -1989,7 +1989,7 @@ define { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_reg_ld1x4
 ;CHECK-LABEL: test_v2i32_post_reg_ld1x4:
 ;CHECK: ld1.2s { v0, v1, v2, v3 }, [x0], x{{[0-9]+}}
   %ld1x4 = tail call { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld1x4.v2i32.p0i32(i32* %A)
-  %tmp = getelementptr i32* %A, i64 %inc
+  %tmp = getelementptr i32, i32* %A, i64 %inc
   store i32* %tmp, i32** %ptr
   ret { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } %ld1x4
 }
@@ -2001,7 +2001,7 @@ define { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_imm_ld1x4
 ;CHECK-LABEL: test_v2i64_post_imm_ld1x4:
 ;CHECK: ld1.2d { v0, v1, v2, v3 }, [x0], #64
   %ld1x4 = tail call { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld1x4.v2i64.p0i64(i64* %A)
-  %tmp = getelementptr i64* %A, i32 8
+  %tmp = getelementptr i64, i64* %A, i32 8
   store i64* %tmp, i64** %ptr
   ret { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } %ld1x4
 }
@@ -2010,7 +2010,7 @@ define { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_reg_ld1x4
 ;CHECK-LABEL: test_v2i64_post_reg_ld1x4:
 ;CHECK: ld1.2d { v0, v1, v2, v3 }, [x0], x{{[0-9]+}}
   %ld1x4 = tail call { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld1x4.v2i64.p0i64(i64* %A)
-  %tmp = getelementptr i64* %A, i64 %inc
+  %tmp = getelementptr i64, i64* %A, i64 %inc
   store i64* %tmp, i64** %ptr
   ret { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } %ld1x4
 }
@@ -2022,7 +2022,7 @@ define { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_imm_ld1x4
 ;CHECK-LABEL: test_v1i64_post_imm_ld1x4:
 ;CHECK: ld1.1d { v0, v1, v2, v3 }, [x0], #32
   %ld1x4 = tail call { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld1x4.v1i64.p0i64(i64* %A)
-  %tmp = getelementptr i64* %A, i32 4
+  %tmp = getelementptr i64, i64* %A, i32 4
   store i64* %tmp, i64** %ptr
   ret { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } %ld1x4
 }
@@ -2031,7 +2031,7 @@ define { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_reg_ld1x4
 ;CHECK-LABEL: test_v1i64_post_reg_ld1x4:
 ;CHECK: ld1.1d { v0, v1, v2, v3 }, [x0], x{{[0-9]+}}
   %ld1x4 = tail call { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld1x4.v1i64.p0i64(i64* %A)
-  %tmp = getelementptr i64* %A, i64 %inc
+  %tmp = getelementptr i64, i64* %A, i64 %inc
   store i64* %tmp, i64** %ptr
   ret { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } %ld1x4
 }
@@ -2043,7 +2043,7 @@ define { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_i
 ;CHECK-LABEL: test_v4f32_post_imm_ld1x4:
 ;CHECK: ld1.4s { v0, v1, v2, v3 }, [x0], #64
   %ld1x4 = tail call { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld1x4.v4f32.p0f32(float* %A)
-  %tmp = getelementptr float* %A, i32 16
+  %tmp = getelementptr float, float* %A, i32 16
   store float* %tmp, float** %ptr
   ret { <4 x float>, <4 x float>, <4 x float>, <4 x float> } %ld1x4
 }
@@ -2052,7 +2052,7 @@ define { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_r
 ;CHECK-LABEL: test_v4f32_post_reg_ld1x4:
 ;CHECK: ld1.4s { v0, v1, v2, v3 }, [x0], x{{[0-9]+}}
   %ld1x4 = tail call { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld1x4.v4f32.p0f32(float* %A)
-  %tmp = getelementptr float* %A, i64 %inc
+  %tmp = getelementptr float, float* %A, i64 %inc
   store float* %tmp, float** %ptr
   ret { <4 x float>, <4 x float>, <4 x float>, <4 x float> } %ld1x4
 }
@@ -2064,7 +2064,7 @@ define { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_i
 ;CHECK-LABEL: test_v2f32_post_imm_ld1x4:
 ;CHECK: ld1.2s { v0, v1, v2, v3 }, [x0], #32
   %ld1x4 = tail call { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld1x4.v2f32.p0f32(float* %A)
-  %tmp = getelementptr float* %A, i32 8
+  %tmp = getelementptr float, float* %A, i32 8
   store float* %tmp, float** %ptr
   ret { <2 x float>, <2 x float>, <2 x float>, <2 x float> } %ld1x4
 }
@@ -2073,7 +2073,7 @@ define { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_r
 ;CHECK-LABEL: test_v2f32_post_reg_ld1x4:
 ;CHECK: ld1.2s { v0, v1, v2, v3 }, [x0], x{{[0-9]+}}
   %ld1x4 = tail call { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld1x4.v2f32.p0f32(float* %A)
-  %tmp = getelementptr float* %A, i64 %inc
+  %tmp = getelementptr float, float* %A, i64 %inc
   store float* %tmp, float** %ptr
   ret { <2 x float>, <2 x float>, <2 x float>, <2 x float> } %ld1x4
 }
@@ -2085,7 +2085,7 @@ define { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @test_v2f64_po
 ;CHECK-LABEL: test_v2f64_post_imm_ld1x4:
 ;CHECK: ld1.2d { v0, v1, v2, v3 }, [x0], #64
   %ld1x4 = tail call { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld1x4.v2f64.p0f64(double* %A)
-  %tmp = getelementptr double* %A, i32 8
+  %tmp = getelementptr double, double* %A, i32 8
   store double* %tmp, double** %ptr
   ret { <2 x double>, <2 x double>, <2 x double>, <2 x double> } %ld1x4
 }
@@ -2094,7 +2094,7 @@ define { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @test_v2f64_po
 ;CHECK-LABEL: test_v2f64_post_reg_ld1x4:
 ;CHECK: ld1.2d { v0, v1, v2, v3 }, [x0], x{{[0-9]+}}
   %ld1x4 = tail call { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld1x4.v2f64.p0f64(double* %A)
-  %tmp = getelementptr double* %A, i64 %inc
+  %tmp = getelementptr double, double* %A, i64 %inc
   store double* %tmp, double** %ptr
   ret { <2 x double>, <2 x double>, <2 x double>, <2 x double> } %ld1x4
 }
@@ -2106,7 +2106,7 @@ define { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @test_v1f64_po
 ;CHECK-LABEL: test_v1f64_post_imm_ld1x4:
 ;CHECK: ld1.1d { v0, v1, v2, v3 }, [x0], #32
   %ld1x4 = tail call { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld1x4.v1f64.p0f64(double* %A)
-  %tmp = getelementptr double* %A, i32 4
+  %tmp = getelementptr double, double* %A, i32 4
   store double* %tmp, double** %ptr
   ret { <1 x double>, <1 x double>, <1 x double>, <1 x double> } %ld1x4
 }
@@ -2115,7 +2115,7 @@ define { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @test_v1f64_po
 ;CHECK-LABEL: test_v1f64_post_reg_ld1x4:
 ;CHECK: ld1.1d { v0, v1, v2, v3 }, [x0], x{{[0-9]+}}
   %ld1x4 = tail call { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld1x4.v1f64.p0f64(double* %A)
-  %tmp = getelementptr double* %A, i64 %inc
+  %tmp = getelementptr double, double* %A, i64 %inc
   store double* %tmp, double** %ptr
   ret { <1 x double>, <1 x double>, <1 x double>, <1 x double> } %ld1x4
 }
@@ -2127,7 +2127,7 @@ define { <16 x i8>, <16 x i8> } @test_v16i8_post_imm_ld2r(i8* %A, i8** %ptr) nou
 ;CHECK-LABEL: test_v16i8_post_imm_ld2r:
 ;CHECK: ld2r.16b { v0, v1 }, [x0], #2
   %ld2 = call { <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld2r.v16i8.p0i8(i8* %A)
-  %tmp = getelementptr i8* %A, i32 2
+  %tmp = getelementptr i8, i8* %A, i32 2
   store i8* %tmp, i8** %ptr
   ret { <16 x i8>, <16 x i8> } %ld2
 }
@@ -2136,7 +2136,7 @@ define { <16 x i8>, <16 x i8> } @test_v16i8_post_reg_ld2r(i8* %A, i8** %ptr, i64
 ;CHECK-LABEL: test_v16i8_post_reg_ld2r:
 ;CHECK: ld2r.16b { v0, v1 }, [x0], x{{[0-9]+}}
   %ld2 = call { <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld2r.v16i8.p0i8(i8* %A)
-  %tmp = getelementptr i8* %A, i64 %inc
+  %tmp = getelementptr i8, i8* %A, i64 %inc
   store i8* %tmp, i8** %ptr
   ret { <16 x i8>, <16 x i8> } %ld2
 }
@@ -2148,7 +2148,7 @@ define { <8 x i8>, <8 x i8> } @test_v8i8_post_imm_ld2r(i8* %A, i8** %ptr) nounwi
 ;CHECK-LABEL: test_v8i8_post_imm_ld2r:
 ;CHECK: ld2r.8b { v0, v1 }, [x0], #2
   %ld2 = call { <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld2r.v8i8.p0i8(i8* %A)
-  %tmp = getelementptr i8* %A, i32 2
+  %tmp = getelementptr i8, i8* %A, i32 2
   store i8* %tmp, i8** %ptr
   ret { <8 x i8>, <8 x i8> } %ld2
 }
@@ -2157,7 +2157,7 @@ define { <8 x i8>, <8 x i8> } @test_v8i8_post_reg_ld2r(i8* %A, i8** %ptr, i64 %i
 ;CHECK-LABEL: test_v8i8_post_reg_ld2r:
 ;CHECK: ld2r.8b { v0, v1 }, [x0], x{{[0-9]+}}
   %ld2 = call { <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld2r.v8i8.p0i8(i8* %A)
-  %tmp = getelementptr i8* %A, i64 %inc
+  %tmp = getelementptr i8, i8* %A, i64 %inc
   store i8* %tmp, i8** %ptr
   ret { <8 x i8>, <8 x i8> } %ld2
 }
@@ -2169,7 +2169,7 @@ define { <8 x i16>, <8 x i16> } @test_v8i16_post_imm_ld2r(i16* %A, i16** %ptr) n
 ;CHECK-LABEL: test_v8i16_post_imm_ld2r:
 ;CHECK: ld2r.8h { v0, v1 }, [x0], #4
   %ld2 = call { <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld2r.v8i16.p0i16(i16* %A)
-  %tmp = getelementptr i16* %A, i32 2
+  %tmp = getelementptr i16, i16* %A, i32 2
   store i16* %tmp, i16** %ptr
   ret { <8 x i16>, <8 x i16> } %ld2
 }
@@ -2178,7 +2178,7 @@ define { <8 x i16>, <8 x i16> } @test_v8i16_post_reg_ld2r(i16* %A, i16** %ptr, i
 ;CHECK-LABEL: test_v8i16_post_reg_ld2r:
 ;CHECK: ld2r.8h { v0, v1 }, [x0], x{{[0-9]+}}
   %ld2 = call { <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld2r.v8i16.p0i16(i16* %A)
-  %tmp = getelementptr i16* %A, i64 %inc
+  %tmp = getelementptr i16, i16* %A, i64 %inc
   store i16* %tmp, i16** %ptr
   ret { <8 x i16>, <8 x i16> } %ld2
 }
@@ -2190,7 +2190,7 @@ define { <4 x i16>, <4 x i16> } @test_v4i16_post_imm_ld2r(i16* %A, i16** %ptr) n
 ;CHECK-LABEL: test_v4i16_post_imm_ld2r:
 ;CHECK: ld2r.4h { v0, v1 }, [x0], #4
   %ld2 = call { <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld2r.v4i16.p0i16(i16* %A)
-  %tmp = getelementptr i16* %A, i32 2
+  %tmp = getelementptr i16, i16* %A, i32 2
   store i16* %tmp, i16** %ptr
   ret { <4 x i16>, <4 x i16> } %ld2
 }
@@ -2199,7 +2199,7 @@ define { <4 x i16>, <4 x i16> } @test_v4i16_post_reg_ld2r(i16* %A, i16** %ptr, i
 ;CHECK-LABEL: test_v4i16_post_reg_ld2r:
 ;CHECK: ld2r.4h { v0, v1 }, [x0], x{{[0-9]+}}
   %ld2 = call { <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld2r.v4i16.p0i16(i16* %A)
-  %tmp = getelementptr i16* %A, i64 %inc
+  %tmp = getelementptr i16, i16* %A, i64 %inc
   store i16* %tmp, i16** %ptr
   ret { <4 x i16>, <4 x i16> } %ld2
 }
@@ -2211,7 +2211,7 @@ define { <4 x i32>, <4 x i32> } @test_v4i32_post_imm_ld2r(i32* %A, i32** %ptr) n
 ;CHECK-LABEL: test_v4i32_post_imm_ld2r:
 ;CHECK: ld2r.4s { v0, v1 }, [x0], #8
   %ld2 = call { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2r.v4i32.p0i32(i32* %A)
-  %tmp = getelementptr i32* %A, i32 2
+  %tmp = getelementptr i32, i32* %A, i32 2
   store i32* %tmp, i32** %ptr
   ret { <4 x i32>, <4 x i32> } %ld2
 }
@@ -2220,7 +2220,7 @@ define { <4 x i32>, <4 x i32> } @test_v4i32_post_reg_ld2r(i32* %A, i32** %ptr, i
 ;CHECK-LABEL: test_v4i32_post_reg_ld2r:
 ;CHECK: ld2r.4s { v0, v1 }, [x0], x{{[0-9]+}}
   %ld2 = call { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2r.v4i32.p0i32(i32* %A)
-  %tmp = getelementptr i32* %A, i64 %inc
+  %tmp = getelementptr i32, i32* %A, i64 %inc
   store i32* %tmp, i32** %ptr
   ret { <4 x i32>, <4 x i32> } %ld2
 }
@@ -2231,7 +2231,7 @@ define { <2 x i32>, <2 x i32> } @test_v2i32_post_imm_ld2r(i32* %A, i32** %ptr) n
 ;CHECK-LABEL: test_v2i32_post_imm_ld2r:
 ;CHECK: ld2r.2s { v0, v1 }, [x0], #8
   %ld2 = call { <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld2r.v2i32.p0i32(i32* %A)
-  %tmp = getelementptr i32* %A, i32 2
+  %tmp = getelementptr i32, i32* %A, i32 2
   store i32* %tmp, i32** %ptr
   ret { <2 x i32>, <2 x i32> } %ld2
 }
@@ -2240,7 +2240,7 @@ define { <2 x i32>, <2 x i32> } @test_v2i32_post_reg_ld2r(i32* %A, i32** %ptr, i
 ;CHECK-LABEL: test_v2i32_post_reg_ld2r:
 ;CHECK: ld2r.2s { v0, v1 }, [x0], x{{[0-9]+}}
   %ld2 = call { <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld2r.v2i32.p0i32(i32* %A)
-  %tmp = getelementptr i32* %A, i64 %inc
+  %tmp = getelementptr i32, i32* %A, i64 %inc
   store i32* %tmp, i32** %ptr
   ret { <2 x i32>, <2 x i32> } %ld2
 }
@@ -2252,7 +2252,7 @@ define { <2 x i64>, <2 x i64> } @test_v2i64_post_imm_ld2r(i64* %A, i64** %ptr) n
 ;CHECK-LABEL: test_v2i64_post_imm_ld2r:
 ;CHECK: ld2r.2d { v0, v1 }, [x0], #16
   %ld2 = call { <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld2r.v2i64.p0i64(i64* %A)
-  %tmp = getelementptr i64* %A, i32 2
+  %tmp = getelementptr i64, i64* %A, i32 2
   store i64* %tmp, i64** %ptr
   ret { <2 x i64>, <2 x i64> } %ld2
 }
@@ -2261,7 +2261,7 @@ define { <2 x i64>, <2 x i64> } @test_v2i64_post_reg_ld2r(i64* %A, i64** %ptr, i
 ;CHECK-LABEL: test_v2i64_post_reg_ld2r:
 ;CHECK: ld2r.2d { v0, v1 }, [x0], x{{[0-9]+}}
   %ld2 = call { <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld2r.v2i64.p0i64(i64* %A)
-  %tmp = getelementptr i64* %A, i64 %inc
+  %tmp = getelementptr i64, i64* %A, i64 %inc
   store i64* %tmp, i64** %ptr
   ret { <2 x i64>, <2 x i64> } %ld2
 }
@@ -2272,7 +2272,7 @@ define { <1 x i64>, <1 x i64> } @test_v1i64_post_imm_ld2r(i64* %A, i64** %ptr) n
 ;CHECK-LABEL: test_v1i64_post_imm_ld2r:
 ;CHECK: ld2r.1d { v0, v1 }, [x0], #16
   %ld2 = call { <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld2r.v1i64.p0i64(i64* %A)
-  %tmp = getelementptr i64* %A, i32 2
+  %tmp = getelementptr i64, i64* %A, i32 2
   store i64* %tmp, i64** %ptr
   ret { <1 x i64>, <1 x i64> } %ld2
 }
@@ -2281,7 +2281,7 @@ define { <1 x i64>, <1 x i64> } @test_v1i64_post_reg_ld2r(i64* %A, i64** %ptr, i
 ;CHECK-LABEL: test_v1i64_post_reg_ld2r:
 ;CHECK: ld2r.1d { v0, v1 }, [x0], x{{[0-9]+}}
   %ld2 = call { <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld2r.v1i64.p0i64(i64* %A)
-  %tmp = getelementptr i64* %A, i64 %inc
+  %tmp = getelementptr i64, i64* %A, i64 %inc
   store i64* %tmp, i64** %ptr
   ret { <1 x i64>, <1 x i64> } %ld2
 }
@@ -2293,7 +2293,7 @@ define { <4 x float>, <4 x float> } @test_v4f32_post_imm_ld2r(float* %A, float**
 ;CHECK-LABEL: test_v4f32_post_imm_ld2r:
 ;CHECK: ld2r.4s { v0, v1 }, [x0], #8
   %ld2 = call { <4 x float>, <4 x float> } @llvm.aarch64.neon.ld2r.v4f32.p0f32(float* %A)
-  %tmp = getelementptr float* %A, i32 2
+  %tmp = getelementptr float, float* %A, i32 2
   store float* %tmp, float** %ptr
   ret { <4 x float>, <4 x float> } %ld2
 }
@@ -2302,7 +2302,7 @@ define { <4 x float>, <4 x float> } @test_v4f32_post_reg_ld2r(float* %A, float**
 ;CHECK-LABEL: test_v4f32_post_reg_ld2r:
 ;CHECK: ld2r.4s { v0, v1 }, [x0], x{{[0-9]+}}
   %ld2 = call { <4 x float>, <4 x float> } @llvm.aarch64.neon.ld2r.v4f32.p0f32(float* %A)
-  %tmp = getelementptr float* %A, i64 %inc
+  %tmp = getelementptr float, float* %A, i64 %inc
   store float* %tmp, float** %ptr
   ret { <4 x float>, <4 x float> } %ld2
 }
@@ -2313,7 +2313,7 @@ define { <2 x float>, <2 x float> } @test_v2f32_post_imm_ld2r(float* %A, float**
 ;CHECK-LABEL: test_v2f32_post_imm_ld2r:
 ;CHECK: ld2r.2s { v0, v1 }, [x0], #8
   %ld2 = call { <2 x float>, <2 x float> } @llvm.aarch64.neon.ld2r.v2f32.p0f32(float* %A)
-  %tmp = getelementptr float* %A, i32 2
+  %tmp = getelementptr float, float* %A, i32 2
   store float* %tmp, float** %ptr
   ret { <2 x float>, <2 x float> } %ld2
 }
@@ -2322,7 +2322,7 @@ define { <2 x float>, <2 x float> } @test_v2f32_post_reg_ld2r(float* %A, float**
 ;CHECK-LABEL: test_v2f32_post_reg_ld2r:
 ;CHECK: ld2r.2s { v0, v1 }, [x0], x{{[0-9]+}}
   %ld2 = call { <2 x float>, <2 x float> } @llvm.aarch64.neon.ld2r.v2f32.p0f32(float* %A)
-  %tmp = getelementptr float* %A, i64 %inc
+  %tmp = getelementptr float, float* %A, i64 %inc
   store float* %tmp, float** %ptr
   ret { <2 x float>, <2 x float> } %ld2
 }
@@ -2334,7 +2334,7 @@ define { <2 x double>, <2 x double> } @test_v2f64_post_imm_ld2r(double* %A, doub
 ;CHECK-LABEL: test_v2f64_post_imm_ld2r:
 ;CHECK: ld2r.2d { v0, v1 }, [x0], #16
   %ld2 = call { <2 x double>, <2 x double> } @llvm.aarch64.neon.ld2r.v2f64.p0f64(double* %A)
-  %tmp = getelementptr double* %A, i32 2
+  %tmp = getelementptr double, double* %A, i32 2
   store double* %tmp, double** %ptr
   ret { <2 x double>, <2 x double> } %ld2
 }
@@ -2343,7 +2343,7 @@ define { <2 x double>, <2 x double> } @test_v2f64_post_reg_ld2r(double* %A, doub
 ;CHECK-LABEL: test_v2f64_post_reg_ld2r:
 ;CHECK: ld2r.2d { v0, v1 }, [x0], x{{[0-9]+}}
   %ld2 = call { <2 x double>, <2 x double> } @llvm.aarch64.neon.ld2r.v2f64.p0f64(double* %A)
-  %tmp = getelementptr double* %A, i64 %inc
+  %tmp = getelementptr double, double* %A, i64 %inc
   store double* %tmp, double** %ptr
   ret { <2 x double>, <2 x double> } %ld2
 }
@@ -2354,7 +2354,7 @@ define { <1 x double>, <1 x double> } @test_v1f64_post_imm_ld2r(double* %A, doub
 ;CHECK-LABEL: test_v1f64_post_imm_ld2r:
 ;CHECK: ld2r.1d { v0, v1 }, [x0], #16
   %ld2 = call { <1 x double>, <1 x double> } @llvm.aarch64.neon.ld2r.v1f64.p0f64(double* %A)
-  %tmp = getelementptr double* %A, i32 2
+  %tmp = getelementptr double, double* %A, i32 2
   store double* %tmp, double** %ptr
   ret { <1 x double>, <1 x double> } %ld2
 }
@@ -2363,7 +2363,7 @@ define { <1 x double>, <1 x double> } @test_v1f64_post_reg_ld2r(double* %A, doub
 ;CHECK-LABEL: test_v1f64_post_reg_ld2r:
 ;CHECK: ld2r.1d { v0, v1 }, [x0], x{{[0-9]+}}
   %ld2 = call { <1 x double>, <1 x double> } @llvm.aarch64.neon.ld2r.v1f64.p0f64(double* %A)
-  %tmp = getelementptr double* %A, i64 %inc
+  %tmp = getelementptr double, double* %A, i64 %inc
   store double* %tmp, double** %ptr
   ret { <1 x double>, <1 x double> } %ld2
 }
@@ -2375,7 +2375,7 @@ define { <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_imm_ld3r(i8* %A, i8*
 ;CHECK-LABEL: test_v16i8_post_imm_ld3r:
 ;CHECK: ld3r.16b { v0, v1, v2 }, [x0], #3
   %ld3 = call { <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld3r.v16i8.p0i8(i8* %A)
-  %tmp = getelementptr i8* %A, i32 3
+  %tmp = getelementptr i8, i8* %A, i32 3
   store i8* %tmp, i8** %ptr
   ret { <16 x i8>, <16 x i8>, <16 x i8> } %ld3
 }
@@ -2384,7 +2384,7 @@ define { <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_reg_ld3r(i8* %A, i8*
 ;CHECK-LABEL: test_v16i8_post_reg_ld3r:
 ;CHECK: ld3r.16b { v0, v1, v2 }, [x0], x{{[0-9]+}}
   %ld3 = call { <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld3r.v16i8.p0i8(i8* %A)
-  %tmp = getelementptr i8* %A, i64 %inc
+  %tmp = getelementptr i8, i8* %A, i64 %inc
   store i8* %tmp, i8** %ptr
   ret { <16 x i8>, <16 x i8>, <16 x i8> } %ld3
 }
@@ -2396,7 +2396,7 @@ define { <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_imm_ld3r(i8* %A, i8** %p
 ;CHECK-LABEL: test_v8i8_post_imm_ld3r:
 ;CHECK: ld3r.8b { v0, v1, v2 }, [x0], #3
   %ld3 = call { <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld3r.v8i8.p0i8(i8* %A)
-  %tmp = getelementptr i8* %A, i32 3
+  %tmp = getelementptr i8, i8* %A, i32 3
   store i8* %tmp, i8** %ptr
   ret { <8 x i8>, <8 x i8>, <8 x i8> } %ld3
 }
@@ -2405,7 +2405,7 @@ define { <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_reg_ld3r(i8* %A, i8** %p
 ;CHECK-LABEL: test_v8i8_post_reg_ld3r:
 ;CHECK: ld3r.8b { v0, v1, v2 }, [x0], x{{[0-9]+}}
   %ld3 = call { <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld3r.v8i8.p0i8(i8* %A)
-  %tmp = getelementptr i8* %A, i64 %inc
+  %tmp = getelementptr i8, i8* %A, i64 %inc
   store i8* %tmp, i8** %ptr
   ret { <8 x i8>, <8 x i8>, <8 x i8> } %ld3
 }
@@ -2417,7 +2417,7 @@ define { <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_imm_ld3r(i16* %A, i1
 ;CHECK-LABEL: test_v8i16_post_imm_ld3r:
 ;CHECK: ld3r.8h { v0, v1, v2 }, [x0], #6
   %ld3 = call { <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld3r.v8i16.p0i16(i16* %A)
-  %tmp = getelementptr i16* %A, i32 3
+  %tmp = getelementptr i16, i16* %A, i32 3
   store i16* %tmp, i16** %ptr
   ret { <8 x i16>, <8 x i16>, <8 x i16> } %ld3
 }
@@ -2426,7 +2426,7 @@ define { <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_reg_ld3r(i16* %A, i1
 ;CHECK-LABEL: test_v8i16_post_reg_ld3r:
 ;CHECK: ld3r.8h { v0, v1, v2 }, [x0], x{{[0-9]+}}
   %ld3 = call { <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld3r.v8i16.p0i16(i16* %A)
-  %tmp = getelementptr i16* %A, i64 %inc
+  %tmp = getelementptr i16, i16* %A, i64 %inc
   store i16* %tmp, i16** %ptr
   ret { <8 x i16>, <8 x i16>, <8 x i16> } %ld3
 }
@@ -2438,7 +2438,7 @@ define { <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_imm_ld3r(i16* %A, i1
 ;CHECK-LABEL: test_v4i16_post_imm_ld3r:
 ;CHECK: ld3r.4h { v0, v1, v2 }, [x0], #6
   %ld3 = call { <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld3r.v4i16.p0i16(i16* %A)
-  %tmp = getelementptr i16* %A, i32 3
+  %tmp = getelementptr i16, i16* %A, i32 3
   store i16* %tmp, i16** %ptr
   ret { <4 x i16>, <4 x i16>, <4 x i16> } %ld3
 }
@@ -2447,7 +2447,7 @@ define { <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_reg_ld3r(i16* %A, i1
 ;CHECK-LABEL: test_v4i16_post_reg_ld3r:
 ;CHECK: ld3r.4h { v0, v1, v2 }, [x0], x{{[0-9]+}}
   %ld3 = call { <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld3r.v4i16.p0i16(i16* %A)
-  %tmp = getelementptr i16* %A, i64 %inc
+  %tmp = getelementptr i16, i16* %A, i64 %inc
   store i16* %tmp, i16** %ptr
   ret { <4 x i16>, <4 x i16>, <4 x i16> } %ld3
 }
@@ -2459,7 +2459,7 @@ define { <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_imm_ld3r(i32* %A, i3
 ;CHECK-LABEL: test_v4i32_post_imm_ld3r:
 ;CHECK: ld3r.4s { v0, v1, v2 }, [x0], #12
   %ld3 = call { <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld3r.v4i32.p0i32(i32* %A)
-  %tmp = getelementptr i32* %A, i32 3
+  %tmp = getelementptr i32, i32* %A, i32 3
   store i32* %tmp, i32** %ptr
   ret { <4 x i32>, <4 x i32>, <4 x i32> } %ld3
 }
@@ -2468,7 +2468,7 @@ define { <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_reg_ld3r(i32* %A, i3
 ;CHECK-LABEL: test_v4i32_post_reg_ld3r:
 ;CHECK: ld3r.4s { v0, v1, v2 }, [x0], x{{[0-9]+}}
   %ld3 = call { <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld3r.v4i32.p0i32(i32* %A)
-  %tmp = getelementptr i32* %A, i64 %inc
+  %tmp = getelementptr i32, i32* %A, i64 %inc
   store i32* %tmp, i32** %ptr
   ret { <4 x i32>, <4 x i32>, <4 x i32> } %ld3
 }
@@ -2479,7 +2479,7 @@ define { <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_imm_ld3r(i32* %A, i3
 ;CHECK-LABEL: test_v2i32_post_imm_ld3r:
 ;CHECK: ld3r.2s { v0, v1, v2 }, [x0], #12
   %ld3 = call { <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld3r.v2i32.p0i32(i32* %A)
-  %tmp = getelementptr i32* %A, i32 3
+  %tmp = getelementptr i32, i32* %A, i32 3
   store i32* %tmp, i32** %ptr
   ret { <2 x i32>, <2 x i32>, <2 x i32> } %ld3
 }
@@ -2488,7 +2488,7 @@ define { <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_reg_ld3r(i32* %A, i3
 ;CHECK-LABEL: test_v2i32_post_reg_ld3r:
 ;CHECK: ld3r.2s { v0, v1, v2 }, [x0], x{{[0-9]+}}
   %ld3 = call { <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld3r.v2i32.p0i32(i32* %A)
-  %tmp = getelementptr i32* %A, i64 %inc
+  %tmp = getelementptr i32, i32* %A, i64 %inc
   store i32* %tmp, i32** %ptr
   ret { <2 x i32>, <2 x i32>, <2 x i32> } %ld3
 }
@@ -2500,7 +2500,7 @@ define { <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_imm_ld3r(i64* %A, i6
 ;CHECK-LABEL: test_v2i64_post_imm_ld3r:
 ;CHECK: ld3r.2d { v0, v1, v2 }, [x0], #24
   %ld3 = call { <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld3r.v2i64.p0i64(i64* %A)
-  %tmp = getelementptr i64* %A, i32 3
+  %tmp = getelementptr i64, i64* %A, i32 3
   store i64* %tmp, i64** %ptr
   ret { <2 x i64>, <2 x i64>, <2 x i64> } %ld3
 }
@@ -2509,7 +2509,7 @@ define { <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_reg_ld3r(i64* %A, i6
 ;CHECK-LABEL: test_v2i64_post_reg_ld3r:
 ;CHECK: ld3r.2d { v0, v1, v2 }, [x0], x{{[0-9]+}}
   %ld3 = call { <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld3r.v2i64.p0i64(i64* %A)
-  %tmp = getelementptr i64* %A, i64 %inc
+  %tmp = getelementptr i64, i64* %A, i64 %inc
   store i64* %tmp, i64** %ptr
   ret { <2 x i64>, <2 x i64>, <2 x i64> } %ld3
 }
@@ -2520,7 +2520,7 @@ define { <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_imm_ld3r(i64* %A, i6
 ;CHECK-LABEL: test_v1i64_post_imm_ld3r:
 ;CHECK: ld3r.1d { v0, v1, v2 }, [x0], #24
   %ld3 = call { <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld3r.v1i64.p0i64(i64* %A)
-  %tmp = getelementptr i64* %A, i32 3
+  %tmp = getelementptr i64, i64* %A, i32 3
   store i64* %tmp, i64** %ptr
   ret { <1 x i64>, <1 x i64>, <1 x i64> } %ld3
 }
@@ -2529,7 +2529,7 @@ define { <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_reg_ld3r(i64* %A, i6
 ;CHECK-LABEL: test_v1i64_post_reg_ld3r:
 ;CHECK: ld3r.1d { v0, v1, v2 }, [x0], x{{[0-9]+}}
   %ld3 = call { <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld3r.v1i64.p0i64(i64* %A)
-  %tmp = getelementptr i64* %A, i64 %inc
+  %tmp = getelementptr i64, i64* %A, i64 %inc
   store i64* %tmp, i64** %ptr
   ret { <1 x i64>, <1 x i64>, <1 x i64> } %ld3
 }
@@ -2541,7 +2541,7 @@ define { <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_imm_ld3r(float
 ;CHECK-LABEL: test_v4f32_post_imm_ld3r:
 ;CHECK: ld3r.4s { v0, v1, v2 }, [x0], #12
   %ld3 = call { <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld3r.v4f32.p0f32(float* %A)
-  %tmp = getelementptr float* %A, i32 3
+  %tmp = getelementptr float, float* %A, i32 3
   store float* %tmp, float** %ptr
   ret { <4 x float>, <4 x float>, <4 x float> } %ld3
 }
@@ -2550,7 +2550,7 @@ define { <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_reg_ld3r(float
 ;CHECK-LABEL: test_v4f32_post_reg_ld3r:
 ;CHECK: ld3r.4s { v0, v1, v2 }, [x0], x{{[0-9]+}}
   %ld3 = call { <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld3r.v4f32.p0f32(float* %A)
-  %tmp = getelementptr float* %A, i64 %inc
+  %tmp = getelementptr float, float* %A, i64 %inc
   store float* %tmp, float** %ptr
   ret { <4 x float>, <4 x float>, <4 x float> } %ld3
 }
@@ -2561,7 +2561,7 @@ define { <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_imm_ld3r(float
 ;CHECK-LABEL: test_v2f32_post_imm_ld3r:
 ;CHECK: ld3r.2s { v0, v1, v2 }, [x0], #12
   %ld3 = call { <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld3r.v2f32.p0f32(float* %A)
-  %tmp = getelementptr float* %A, i32 3
+  %tmp = getelementptr float, float* %A, i32 3
   store float* %tmp, float** %ptr
   ret { <2 x float>, <2 x float>, <2 x float> } %ld3
 }
@@ -2570,7 +2570,7 @@ define { <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_reg_ld3r(float
 ;CHECK-LABEL: test_v2f32_post_reg_ld3r:
 ;CHECK: ld3r.2s { v0, v1, v2 }, [x0], x{{[0-9]+}}
   %ld3 = call { <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld3r.v2f32.p0f32(float* %A)
-  %tmp = getelementptr float* %A, i64 %inc
+  %tmp = getelementptr float, float* %A, i64 %inc
   store float* %tmp, float** %ptr
   ret { <2 x float>, <2 x float>, <2 x float> } %ld3
 }
@@ -2582,7 +2582,7 @@ define { <2 x double>, <2 x double>, <2 x double> } @test_v2f64_post_imm_ld3r(do
 ;CHECK-LABEL: test_v2f64_post_imm_ld3r:
 ;CHECK: ld3r.2d { v0, v1, v2 }, [x0], #24
   %ld3 = call { <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld3r.v2f64.p0f64(double* %A)
-  %tmp = getelementptr double* %A, i32 3
+  %tmp = getelementptr double, double* %A, i32 3
   store double* %tmp, double** %ptr
   ret { <2 x double>, <2 x double>, <2 x double> } %ld3
 }
@@ -2591,7 +2591,7 @@ define { <2 x double>, <2 x double>, <2 x double> } @test_v2f64_post_reg_ld3r(do
 ;CHECK-LABEL: test_v2f64_post_reg_ld3r:
 ;CHECK: ld3r.2d { v0, v1, v2 }, [x0], x{{[0-9]+}}
   %ld3 = call { <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld3r.v2f64.p0f64(double* %A)
-  %tmp = getelementptr double* %A, i64 %inc
+  %tmp = getelementptr double, double* %A, i64 %inc
   store double* %tmp, double** %ptr
   ret { <2 x double>, <2 x double>, <2 x double> } %ld3
 }
@@ -2602,7 +2602,7 @@ define { <1 x double>, <1 x double>, <1 x double> } @test_v1f64_post_imm_ld3r(do
 ;CHECK-LABEL: test_v1f64_post_imm_ld3r:
 ;CHECK: ld3r.1d { v0, v1, v2 }, [x0], #24
   %ld3 = call { <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld3r.v1f64.p0f64(double* %A)
-  %tmp = getelementptr double* %A, i32 3
+  %tmp = getelementptr double, double* %A, i32 3
   store double* %tmp, double** %ptr
   ret { <1 x double>, <1 x double>, <1 x double> } %ld3
 }
@@ -2611,7 +2611,7 @@ define { <1 x double>, <1 x double>, <1 x double> } @test_v1f64_post_reg_ld3r(do
 ;CHECK-LABEL: test_v1f64_post_reg_ld3r:
 ;CHECK: ld3r.1d { v0, v1, v2 }, [x0], x{{[0-9]+}}
   %ld3 = call { <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld3r.v1f64.p0f64(double* %A)
-  %tmp = getelementptr double* %A, i64 %inc
+  %tmp = getelementptr double, double* %A, i64 %inc
   store double* %tmp, double** %ptr
   ret { <1 x double>, <1 x double>, <1 x double> } %ld3
 }
@@ -2623,7 +2623,7 @@ define { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_imm_ld4r(
 ;CHECK-LABEL: test_v16i8_post_imm_ld4r:
 ;CHECK: ld4r.16b { v0, v1, v2, v3 }, [x0], #4
   %ld4 = call { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld4r.v16i8.p0i8(i8* %A)
-  %tmp = getelementptr i8* %A, i32 4
+  %tmp = getelementptr i8, i8* %A, i32 4
   store i8* %tmp, i8** %ptr
   ret { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } %ld4
 }
@@ -2632,7 +2632,7 @@ define { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_reg_ld4r(
 ;CHECK-LABEL: test_v16i8_post_reg_ld4r:
 ;CHECK: ld4r.16b { v0, v1, v2, v3 }, [x0], x{{[0-9]+}}
   %ld4 = call { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld4r.v16i8.p0i8(i8* %A)
-  %tmp = getelementptr i8* %A, i64 %inc
+  %tmp = getelementptr i8, i8* %A, i64 %inc
   store i8* %tmp, i8** %ptr
   ret { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } %ld4
 }
@@ -2644,7 +2644,7 @@ define { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_imm_ld4r(i8* %
 ;CHECK-LABEL: test_v8i8_post_imm_ld4r:
 ;CHECK: ld4r.8b { v0, v1, v2, v3 }, [x0], #4
   %ld4 = call { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld4r.v8i8.p0i8(i8* %A)
-  %tmp = getelementptr i8* %A, i32 4
+  %tmp = getelementptr i8, i8* %A, i32 4
   store i8* %tmp, i8** %ptr
   ret { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } %ld4
 }
@@ -2653,7 +2653,7 @@ define { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_reg_ld4r(i8* %
 ;CHECK-LABEL: test_v8i8_post_reg_ld4r:
 ;CHECK: ld4r.8b { v0, v1, v2, v3 }, [x0], x{{[0-9]+}}
   %ld4 = call { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld4r.v8i8.p0i8(i8* %A)
-  %tmp = getelementptr i8* %A, i64 %inc
+  %tmp = getelementptr i8, i8* %A, i64 %inc
   store i8* %tmp, i8** %ptr
   ret { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } %ld4
 }
@@ -2665,7 +2665,7 @@ define { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_imm_ld4r(
 ;CHECK-LABEL: test_v8i16_post_imm_ld4r:
 ;CHECK: ld4r.8h { v0, v1, v2, v3 }, [x0], #8
   %ld4 = call { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld4r.v8i16.p0i16(i16* %A)
-  %tmp = getelementptr i16* %A, i32 4
+  %tmp = getelementptr i16, i16* %A, i32 4
   store i16* %tmp, i16** %ptr
   ret { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } %ld4
 }
@@ -2674,7 +2674,7 @@ define { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_reg_ld4r(
 ;CHECK-LABEL: test_v8i16_post_reg_ld4r:
 ;CHECK: ld4r.8h { v0, v1, v2, v3 }, [x0], x{{[0-9]+}}
   %ld4 = call { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld4r.v8i16.p0i16(i16* %A)
-  %tmp = getelementptr i16* %A, i64 %inc
+  %tmp = getelementptr i16, i16* %A, i64 %inc
   store i16* %tmp, i16** %ptr
   ret { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } %ld4
 }
@@ -2686,7 +2686,7 @@ define { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_imm_ld4r(
 ;CHECK-LABEL: test_v4i16_post_imm_ld4r:
 ;CHECK: ld4r.4h { v0, v1, v2, v3 }, [x0], #8
   %ld4 = call { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld4r.v4i16.p0i16(i16* %A)
-  %tmp = getelementptr i16* %A, i32 4
+  %tmp = getelementptr i16, i16* %A, i32 4
   store i16* %tmp, i16** %ptr
   ret { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } %ld4
 }
@@ -2695,7 +2695,7 @@ define { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_reg_ld4r(
 ;CHECK-LABEL: test_v4i16_post_reg_ld4r:
 ;CHECK: ld4r.4h { v0, v1, v2, v3 }, [x0], x{{[0-9]+}}
   %ld4 = call { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld4r.v4i16.p0i16(i16* %A)
-  %tmp = getelementptr i16* %A, i64 %inc
+  %tmp = getelementptr i16, i16* %A, i64 %inc
   store i16* %tmp, i16** %ptr
   ret { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } %ld4
 }
@@ -2707,7 +2707,7 @@ define { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_imm_ld4r(
 ;CHECK-LABEL: test_v4i32_post_imm_ld4r:
 ;CHECK: ld4r.4s { v0, v1, v2, v3 }, [x0], #16
   %ld4 = call { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld4r.v4i32.p0i32(i32* %A)
-  %tmp = getelementptr i32* %A, i32 4
+  %tmp = getelementptr i32, i32* %A, i32 4
   store i32* %tmp, i32** %ptr
   ret { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } %ld4
 }
@@ -2716,7 +2716,7 @@ define { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_reg_ld4r(
 ;CHECK-LABEL: test_v4i32_post_reg_ld4r:
 ;CHECK: ld4r.4s { v0, v1, v2, v3 }, [x0], x{{[0-9]+}}
   %ld4 = call { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld4r.v4i32.p0i32(i32* %A)
-  %tmp = getelementptr i32* %A, i64 %inc
+  %tmp = getelementptr i32, i32* %A, i64 %inc
   store i32* %tmp, i32** %ptr
   ret { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } %ld4
 }
@@ -2727,7 +2727,7 @@ define { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_imm_ld4r(
 ;CHECK-LABEL: test_v2i32_post_imm_ld4r:
 ;CHECK: ld4r.2s { v0, v1, v2, v3 }, [x0], #16
   %ld4 = call { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld4r.v2i32.p0i32(i32* %A)
-  %tmp = getelementptr i32* %A, i32 4
+  %tmp = getelementptr i32, i32* %A, i32 4
   store i32* %tmp, i32** %ptr
   ret { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } %ld4
 }
@@ -2736,7 +2736,7 @@ define { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_reg_ld4r(
 ;CHECK-LABEL: test_v2i32_post_reg_ld4r:
 ;CHECK: ld4r.2s { v0, v1, v2, v3 }, [x0], x{{[0-9]+}}
   %ld4 = call { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld4r.v2i32.p0i32(i32* %A)
-  %tmp = getelementptr i32* %A, i64 %inc
+  %tmp = getelementptr i32, i32* %A, i64 %inc
   store i32* %tmp, i32** %ptr
   ret { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } %ld4
 }
@@ -2748,7 +2748,7 @@ define { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_imm_ld4r(
 ;CHECK-LABEL: test_v2i64_post_imm_ld4r:
 ;CHECK: ld4r.2d { v0, v1, v2, v3 }, [x0], #32
   %ld4 = call { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld4r.v2i64.p0i64(i64* %A)
-  %tmp = getelementptr i64* %A, i32 4
+  %tmp = getelementptr i64, i64* %A, i32 4
   store i64* %tmp, i64** %ptr
   ret { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } %ld4
 }
@@ -2757,7 +2757,7 @@ define { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_reg_ld4r(
 ;CHECK-LABEL: test_v2i64_post_reg_ld4r:
 ;CHECK: ld4r.2d { v0, v1, v2, v3 }, [x0], x{{[0-9]+}}
   %ld4 = call { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld4r.v2i64.p0i64(i64* %A)
-  %tmp = getelementptr i64* %A, i64 %inc
+  %tmp = getelementptr i64, i64* %A, i64 %inc
   store i64* %tmp, i64** %ptr
   ret { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } %ld4
 }
@@ -2768,7 +2768,7 @@ define { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_imm_ld4r(
 ;CHECK-LABEL: test_v1i64_post_imm_ld4r:
 ;CHECK: ld4r.1d { v0, v1, v2, v3 }, [x0], #32
   %ld4 = call { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld4r.v1i64.p0i64(i64* %A)
-  %tmp = getelementptr i64* %A, i32 4
+  %tmp = getelementptr i64, i64* %A, i32 4
   store i64* %tmp, i64** %ptr
   ret { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } %ld4
 }
@@ -2777,7 +2777,7 @@ define { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_reg_ld4r(
 ;CHECK-LABEL: test_v1i64_post_reg_ld4r:
 ;CHECK: ld4r.1d { v0, v1, v2, v3 }, [x0], x{{[0-9]+}}
   %ld4 = call { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld4r.v1i64.p0i64(i64* %A)
-  %tmp = getelementptr i64* %A, i64 %inc
+  %tmp = getelementptr i64, i64* %A, i64 %inc
   store i64* %tmp, i64** %ptr
   ret { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } %ld4
 }
@@ -2789,7 +2789,7 @@ define { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_i
 ;CHECK-LABEL: test_v4f32_post_imm_ld4r:
 ;CHECK: ld4r.4s { v0, v1, v2, v3 }, [x0], #16
   %ld4 = call { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld4r.v4f32.p0f32(float* %A)
-  %tmp = getelementptr float* %A, i32 4
+  %tmp = getelementptr float, float* %A, i32 4
   store float* %tmp, float** %ptr
   ret { <4 x float>, <4 x float>, <4 x float>, <4 x float> } %ld4
 }
@@ -2798,7 +2798,7 @@ define { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_r
 ;CHECK-LABEL: test_v4f32_post_reg_ld4r:
 ;CHECK: ld4r.4s { v0, v1, v2, v3 }, [x0], x{{[0-9]+}}
   %ld4 = call { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld4r.v4f32.p0f32(float* %A)
-  %tmp = getelementptr float* %A, i64 %inc
+  %tmp = getelementptr float, float* %A, i64 %inc
   store float* %tmp, float** %ptr
   ret { <4 x float>, <4 x float>, <4 x float>, <4 x float> } %ld4
 }
@@ -2809,7 +2809,7 @@ define { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_i
 ;CHECK-LABEL: test_v2f32_post_imm_ld4r:
 ;CHECK: ld4r.2s { v0, v1, v2, v3 }, [x0], #16
   %ld4 = call { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld4r.v2f32.p0f32(float* %A)
-  %tmp = getelementptr float* %A, i32 4
+  %tmp = getelementptr float, float* %A, i32 4
   store float* %tmp, float** %ptr
   ret { <2 x float>, <2 x float>, <2 x float>, <2 x float> } %ld4
 }
@@ -2818,7 +2818,7 @@ define { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_r
 ;CHECK-LABEL: test_v2f32_post_reg_ld4r:
 ;CHECK: ld4r.2s { v0, v1, v2, v3 }, [x0], x{{[0-9]+}}
   %ld4 = call { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld4r.v2f32.p0f32(float* %A)
-  %tmp = getelementptr float* %A, i64 %inc
+  %tmp = getelementptr float, float* %A, i64 %inc
   store float* %tmp, float** %ptr
   ret { <2 x float>, <2 x float>, <2 x float>, <2 x float> } %ld4
 }
@@ -2830,7 +2830,7 @@ define { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @test_v2f64_po
 ;CHECK-LABEL: test_v2f64_post_imm_ld4r:
 ;CHECK: ld4r.2d { v0, v1, v2, v3 }, [x0], #32
   %ld4 = call { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld4r.v2f64.p0f64(double* %A)
-  %tmp = getelementptr double* %A, i32 4
+  %tmp = getelementptr double, double* %A, i32 4
   store double* %tmp, double** %ptr
   ret { <2 x double>, <2 x double>, <2 x double>, <2 x double> } %ld4
 }
@@ -2839,7 +2839,7 @@ define { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @test_v2f64_po
 ;CHECK-LABEL: test_v2f64_post_reg_ld4r:
 ;CHECK: ld4r.2d { v0, v1, v2, v3 }, [x0], x{{[0-9]+}}
   %ld4 = call { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld4r.v2f64.p0f64(double* %A)
-  %tmp = getelementptr double* %A, i64 %inc
+  %tmp = getelementptr double, double* %A, i64 %inc
   store double* %tmp, double** %ptr
   ret { <2 x double>, <2 x double>, <2 x double>, <2 x double> } %ld4
 }
@@ -2850,7 +2850,7 @@ define { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @test_v1f64_po
 ;CHECK-LABEL: test_v1f64_post_imm_ld4r:
 ;CHECK: ld4r.1d { v0, v1, v2, v3 }, [x0], #32
   %ld4 = call { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld4r.v1f64.p0f64(double* %A)
-  %tmp = getelementptr double* %A, i32 4
+  %tmp = getelementptr double, double* %A, i32 4
   store double* %tmp, double** %ptr
   ret { <1 x double>, <1 x double>, <1 x double>, <1 x double> } %ld4
 }
@@ -2859,7 +2859,7 @@ define { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @test_v1f64_po
 ;CHECK-LABEL: test_v1f64_post_reg_ld4r:
 ;CHECK: ld4r.1d { v0, v1, v2, v3 }, [x0], x{{[0-9]+}}
   %ld4 = call { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld4r.v1f64.p0f64(double* %A)
-  %tmp = getelementptr double* %A, i64 %inc
+  %tmp = getelementptr double, double* %A, i64 %inc
   store double* %tmp, double** %ptr
   ret { <1 x double>, <1 x double>, <1 x double>, <1 x double> } %ld4
 }
@@ -2871,7 +2871,7 @@ define { <16 x i8>, <16 x i8> } @test_v16i8_post_imm_ld2lane(i8* %A, i8** %ptr,
 ;CHECK-LABEL: test_v16i8_post_imm_ld2lane:
 ;CHECK: ld2.b { v0, v1 }[0], [x0], #2
   %ld2 = call { <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld2lane.v16i8.p0i8(<16 x i8> %B, <16 x i8> %C, i64 0, i8* %A)
-  %tmp = getelementptr i8* %A, i32 2
+  %tmp = getelementptr i8, i8* %A, i32 2
   store i8* %tmp, i8** %ptr
   ret { <16 x i8>, <16 x i8> } %ld2
 }
@@ -2880,7 +2880,7 @@ define { <16 x i8>, <16 x i8> } @test_v16i8_post_reg_ld2lane(i8* %A, i8** %ptr,
 ;CHECK-LABEL: test_v16i8_post_reg_ld2lane:
 ;CHECK: ld2.b { v0, v1 }[0], [x0], x{{[0-9]+}}
   %ld2 = call { <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld2lane.v16i8.p0i8(<16 x i8> %B, <16 x i8> %C, i64 0, i8* %A)
-  %tmp = getelementptr i8* %A, i64 %inc
+  %tmp = getelementptr i8, i8* %A, i64 %inc
   store i8* %tmp, i8** %ptr
   ret { <16 x i8>, <16 x i8> } %ld2
 }
@@ -2892,7 +2892,7 @@ define { <8 x i8>, <8 x i8> } @test_v8i8_post_imm_ld2lane(i8* %A, i8** %ptr, <8
 ;CHECK-LABEL: test_v8i8_post_imm_ld2lane:
 ;CHECK: ld2.b { v0, v1 }[0], [x0], #2
   %ld2 = call { <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld2lane.v8i8.p0i8(<8 x i8> %B, <8 x i8> %C, i64 0, i8* %A)
-  %tmp = getelementptr i8* %A, i32 2
+  %tmp = getelementptr i8, i8* %A, i32 2
   store i8* %tmp, i8** %ptr
   ret { <8 x i8>, <8 x i8> } %ld2
 }
@@ -2901,7 +2901,7 @@ define { <8 x i8>, <8 x i8> } @test_v8i8_post_reg_ld2lane(i8* %A, i8** %ptr, i64
 ;CHECK-LABEL: test_v8i8_post_reg_ld2lane:
 ;CHECK: ld2.b { v0, v1 }[0], [x0], x{{[0-9]+}}
   %ld2 = call { <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld2lane.v8i8.p0i8(<8 x i8> %B, <8 x i8> %C, i64 0, i8* %A)
-  %tmp = getelementptr i8* %A, i64 %inc
+  %tmp = getelementptr i8, i8* %A, i64 %inc
   store i8* %tmp, i8** %ptr
   ret { <8 x i8>, <8 x i8> } %ld2
 }
@@ -2913,7 +2913,7 @@ define { <8 x i16>, <8 x i16> } @test_v8i16_post_imm_ld2lane(i16* %A, i16** %ptr
 ;CHECK-LABEL: test_v8i16_post_imm_ld2lane:
 ;CHECK: ld2.h { v0, v1 }[0], [x0], #4
   %ld2 = call { <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld2lane.v8i16.p0i16(<8 x i16> %B, <8 x i16> %C, i64 0, i16* %A)
-  %tmp = getelementptr i16* %A, i32 2
+  %tmp = getelementptr i16, i16* %A, i32 2
   store i16* %tmp, i16** %ptr
   ret { <8 x i16>, <8 x i16> } %ld2
 }
@@ -2922,7 +2922,7 @@ define { <8 x i16>, <8 x i16> } @test_v8i16_post_reg_ld2lane(i16* %A, i16** %ptr
 ;CHECK-LABEL: test_v8i16_post_reg_ld2lane:
 ;CHECK: ld2.h { v0, v1 }[0], [x0], x{{[0-9]+}}
   %ld2 = call { <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld2lane.v8i16.p0i16(<8 x i16> %B, <8 x i16> %C, i64 0, i16* %A)
-  %tmp = getelementptr i16* %A, i64 %inc
+  %tmp = getelementptr i16, i16* %A, i64 %inc
   store i16* %tmp, i16** %ptr
   ret { <8 x i16>, <8 x i16> } %ld2
 }
@@ -2934,7 +2934,7 @@ define { <4 x i16>, <4 x i16> } @test_v4i16_post_imm_ld2lane(i16* %A, i16** %ptr
 ;CHECK-LABEL: test_v4i16_post_imm_ld2lane:
 ;CHECK: ld2.h { v0, v1 }[0], [x0], #4
   %ld2 = call { <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld2lane.v4i16.p0i16(<4 x i16> %B, <4 x i16> %C, i64 0, i16* %A)
-  %tmp = getelementptr i16* %A, i32 2
+  %tmp = getelementptr i16, i16* %A, i32 2
   store i16* %tmp, i16** %ptr
   ret { <4 x i16>, <4 x i16> } %ld2
 }
@@ -2943,7 +2943,7 @@ define { <4 x i16>, <4 x i16> } @test_v4i16_post_reg_ld2lane(i16* %A, i16** %ptr
 ;CHECK-LABEL: test_v4i16_post_reg_ld2lane:
 ;CHECK: ld2.h { v0, v1 }[0], [x0], x{{[0-9]+}}
   %ld2 = call { <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld2lane.v4i16.p0i16(<4 x i16> %B, <4 x i16> %C, i64 0, i16* %A)
-  %tmp = getelementptr i16* %A, i64 %inc
+  %tmp = getelementptr i16, i16* %A, i64 %inc
   store i16* %tmp, i16** %ptr
   ret { <4 x i16>, <4 x i16> } %ld2
 }
@@ -2955,7 +2955,7 @@ define { <4 x i32>, <4 x i32> } @test_v4i32_post_imm_ld2lane(i32* %A, i32** %ptr
 ;CHECK-LABEL: test_v4i32_post_imm_ld2lane:
 ;CHECK: ld2.s { v0, v1 }[0], [x0], #8
   %ld2 = call { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2lane.v4i32.p0i32(<4 x i32> %B, <4 x i32> %C, i64 0, i32* %A)
-  %tmp = getelementptr i32* %A, i32 2
+  %tmp = getelementptr i32, i32* %A, i32 2
   store i32* %tmp, i32** %ptr
   ret { <4 x i32>, <4 x i32> } %ld2
 }
@@ -2964,7 +2964,7 @@ define { <4 x i32>, <4 x i32> } @test_v4i32_post_reg_ld2lane(i32* %A, i32** %ptr
 ;CHECK-LABEL: test_v4i32_post_reg_ld2lane:
 ;CHECK: ld2.s { v0, v1 }[0], [x0], x{{[0-9]+}}
   %ld2 = call { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2lane.v4i32.p0i32(<4 x i32> %B, <4 x i32> %C, i64 0, i32* %A)
-  %tmp = getelementptr i32* %A, i64 %inc
+  %tmp = getelementptr i32, i32* %A, i64 %inc
   store i32* %tmp, i32** %ptr
   ret { <4 x i32>, <4 x i32> } %ld2
 }
@@ -2976,7 +2976,7 @@ define { <2 x i32>, <2 x i32> } @test_v2i32_post_imm_ld2lane(i32* %A, i32** %ptr
 ;CHECK-LABEL: test_v2i32_post_imm_ld2lane:
 ;CHECK: ld2.s { v0, v1 }[0], [x0], #8
   %ld2 = call { <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld2lane.v2i32.p0i32(<2 x i32> %B, <2 x i32> %C, i64 0, i32* %A)
-  %tmp = getelementptr i32* %A, i32 2
+  %tmp = getelementptr i32, i32* %A, i32 2
   store i32* %tmp, i32** %ptr
   ret { <2 x i32>, <2 x i32> } %ld2
 }
@@ -2985,7 +2985,7 @@ define { <2 x i32>, <2 x i32> } @test_v2i32_post_reg_ld2lane(i32* %A, i32** %ptr
 ;CHECK-LABEL: test_v2i32_post_reg_ld2lane:
 ;CHECK: ld2.s { v0, v1 }[0], [x0], x{{[0-9]+}}
   %ld2 = call { <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld2lane.v2i32.p0i32(<2 x i32> %B, <2 x i32> %C, i64 0, i32* %A)
-  %tmp = getelementptr i32* %A, i64 %inc
+  %tmp = getelementptr i32, i32* %A, i64 %inc
   store i32* %tmp, i32** %ptr
   ret { <2 x i32>, <2 x i32> } %ld2
 }
@@ -2997,7 +2997,7 @@ define { <2 x i64>, <2 x i64> } @test_v2i64_post_imm_ld2lane(i64* %A, i64** %ptr
 ;CHECK-LABEL: test_v2i64_post_imm_ld2lane:
 ;CHECK: ld2.d { v0, v1 }[0], [x0], #16
   %ld2 = call { <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld2lane.v2i64.p0i64(<2 x i64> %B, <2 x i64> %C, i64 0, i64* %A)
-  %tmp = getelementptr i64* %A, i32 2
+  %tmp = getelementptr i64, i64* %A, i32 2
   store i64* %tmp, i64** %ptr
   ret { <2 x i64>, <2 x i64> } %ld2
 }
@@ -3006,7 +3006,7 @@ define { <2 x i64>, <2 x i64> } @test_v2i64_post_reg_ld2lane(i64* %A, i64** %ptr
 ;CHECK-LABEL: test_v2i64_post_reg_ld2lane:
 ;CHECK: ld2.d { v0, v1 }[0], [x0], x{{[0-9]+}}
   %ld2 = call { <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld2lane.v2i64.p0i64(<2 x i64> %B, <2 x i64> %C, i64 0, i64* %A)
-  %tmp = getelementptr i64* %A, i64 %inc
+  %tmp = getelementptr i64, i64* %A, i64 %inc
   store i64* %tmp, i64** %ptr
   ret { <2 x i64>, <2 x i64> } %ld2
 }
@@ -3018,7 +3018,7 @@ define { <1 x i64>, <1 x i64> } @test_v1i64_post_imm_ld2lane(i64* %A, i64** %ptr
 ;CHECK-LABEL: test_v1i64_post_imm_ld2lane:
 ;CHECK: ld2.d { v0, v1 }[0], [x0], #16
   %ld2 = call { <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld2lane.v1i64.p0i64(<1 x i64> %B, <1 x i64> %C, i64 0, i64* %A)
-  %tmp = getelementptr i64* %A, i32 2
+  %tmp = getelementptr i64, i64* %A, i32 2
   store i64* %tmp, i64** %ptr
   ret { <1 x i64>, <1 x i64> } %ld2
 }
@@ -3027,7 +3027,7 @@ define { <1 x i64>, <1 x i64> } @test_v1i64_post_reg_ld2lane(i64* %A, i64** %ptr
 ;CHECK-LABEL: test_v1i64_post_reg_ld2lane:
 ;CHECK: ld2.d { v0, v1 }[0], [x0], x{{[0-9]+}}
   %ld2 = call { <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld2lane.v1i64.p0i64(<1 x i64> %B, <1 x i64> %C, i64 0, i64* %A)
-  %tmp = getelementptr i64* %A, i64 %inc
+  %tmp = getelementptr i64, i64* %A, i64 %inc
   store i64* %tmp, i64** %ptr
   ret { <1 x i64>, <1 x i64> } %ld2
 }
@@ -3039,7 +3039,7 @@ define { <4 x float>, <4 x float> } @test_v4f32_post_imm_ld2lane(float* %A, floa
 ;CHECK-LABEL: test_v4f32_post_imm_ld2lane:
 ;CHECK: ld2.s { v0, v1 }[0], [x0], #8
   %ld2 = call { <4 x float>, <4 x float> } @llvm.aarch64.neon.ld2lane.v4f32.p0f32(<4 x float> %B, <4 x float> %C, i64 0, float* %A)
-  %tmp = getelementptr float* %A, i32 2
+  %tmp = getelementptr float, float* %A, i32 2
   store float* %tmp, float** %ptr
   ret { <4 x float>, <4 x float> } %ld2
 }
@@ -3048,7 +3048,7 @@ define { <4 x float>, <4 x float> } @test_v4f32_post_reg_ld2lane(float* %A, floa
 ;CHECK-LABEL: test_v4f32_post_reg_ld2lane:
 ;CHECK: ld2.s { v0, v1 }[0], [x0], x{{[0-9]+}}
   %ld2 = call { <4 x float>, <4 x float> } @llvm.aarch64.neon.ld2lane.v4f32.p0f32(<4 x float> %B, <4 x float> %C, i64 0, float* %A)
-  %tmp = getelementptr float* %A, i64 %inc
+  %tmp = getelementptr float, float* %A, i64 %inc
   store float* %tmp, float** %ptr
   ret { <4 x float>, <4 x float> } %ld2
 }
@@ -3060,7 +3060,7 @@ define { <2 x float>, <2 x float> } @test_v2f32_post_imm_ld2lane(float* %A, floa
 ;CHECK-LABEL: test_v2f32_post_imm_ld2lane:
 ;CHECK: ld2.s { v0, v1 }[0], [x0], #8
   %ld2 = call { <2 x float>, <2 x float> } @llvm.aarch64.neon.ld2lane.v2f32.p0f32(<2 x float> %B, <2 x float> %C, i64 0, float* %A)
-  %tmp = getelementptr float* %A, i32 2
+  %tmp = getelementptr float, float* %A, i32 2
   store float* %tmp, float** %ptr
   ret { <2 x float>, <2 x float> } %ld2
 }
@@ -3069,7 +3069,7 @@ define { <2 x float>, <2 x float> } @test_v2f32_post_reg_ld2lane(float* %A, floa
 ;CHECK-LABEL: test_v2f32_post_reg_ld2lane:
 ;CHECK: ld2.s { v0, v1 }[0], [x0], x{{[0-9]+}}
   %ld2 = call { <2 x float>, <2 x float> } @llvm.aarch64.neon.ld2lane.v2f32.p0f32(<2 x float> %B, <2 x float> %C, i64 0, float* %A)
-  %tmp = getelementptr float* %A, i64 %inc
+  %tmp = getelementptr float, float* %A, i64 %inc
   store float* %tmp, float** %ptr
   ret { <2 x float>, <2 x float> } %ld2
 }
@@ -3081,7 +3081,7 @@ define { <2 x double>, <2 x double> } @test_v2f64_post_imm_ld2lane(double* %A, d
 ;CHECK-LABEL: test_v2f64_post_imm_ld2lane:
 ;CHECK: ld2.d { v0, v1 }[0], [x0], #16
   %ld2 = call { <2 x double>, <2 x double> } @llvm.aarch64.neon.ld2lane.v2f64.p0f64(<2 x double> %B, <2 x double> %C, i64 0, double* %A)
-  %tmp = getelementptr double* %A, i32 2
+  %tmp = getelementptr double, double* %A, i32 2
   store double* %tmp, double** %ptr
   ret { <2 x double>, <2 x double> } %ld2
 }
@@ -3090,7 +3090,7 @@ define { <2 x double>, <2 x double> } @test_v2f64_post_reg_ld2lane(double* %A, d
 ;CHECK-LABEL: test_v2f64_post_reg_ld2lane:
 ;CHECK: ld2.d { v0, v1 }[0], [x0], x{{[0-9]+}}
   %ld2 = call { <2 x double>, <2 x double> } @llvm.aarch64.neon.ld2lane.v2f64.p0f64(<2 x double> %B, <2 x double> %C, i64 0, double* %A)
-  %tmp = getelementptr double* %A, i64 %inc
+  %tmp = getelementptr double, double* %A, i64 %inc
   store double* %tmp, double** %ptr
   ret { <2 x double>, <2 x double> } %ld2
 }
@@ -3102,7 +3102,7 @@ define { <1 x double>, <1 x double> } @test_v1f64_post_imm_ld2lane(double* %A, d
 ;CHECK-LABEL: test_v1f64_post_imm_ld2lane:
 ;CHECK: ld2.d { v0, v1 }[0], [x0], #16
   %ld2 = call { <1 x double>, <1 x double> } @llvm.aarch64.neon.ld2lane.v1f64.p0f64(<1 x double> %B, <1 x double> %C, i64 0, double* %A)
-  %tmp = getelementptr double* %A, i32 2
+  %tmp = getelementptr double, double* %A, i32 2
   store double* %tmp, double** %ptr
   ret { <1 x double>, <1 x double> } %ld2
 }
@@ -3111,7 +3111,7 @@ define { <1 x double>, <1 x double> } @test_v1f64_post_reg_ld2lane(double* %A, d
 ;CHECK-LABEL: test_v1f64_post_reg_ld2lane:
 ;CHECK: ld2.d { v0, v1 }[0], [x0], x{{[0-9]+}}
   %ld2 = call { <1 x double>, <1 x double> } @llvm.aarch64.neon.ld2lane.v1f64.p0f64(<1 x double> %B, <1 x double> %C, i64 0, double* %A)
-  %tmp = getelementptr double* %A, i64 %inc
+  %tmp = getelementptr double, double* %A, i64 %inc
   store double* %tmp, double** %ptr
   ret { <1 x double>, <1 x double> } %ld2
 }
@@ -3123,7 +3123,7 @@ define { <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_imm_ld3lane(i8* %A,
 ;CHECK-LABEL: test_v16i8_post_imm_ld3lane:
 ;CHECK: ld3.b { v0, v1, v2 }[0], [x0], #3
   %ld3 = call { <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld3lane.v16i8.p0i8(<16 x i8> %B, <16 x i8> %C, <16 x i8> %D, i64 0, i8* %A)
-  %tmp = getelementptr i8* %A, i32 3
+  %tmp = getelementptr i8, i8* %A, i32 3
   store i8* %tmp, i8** %ptr
   ret { <16 x i8>, <16 x i8>, <16 x i8> } %ld3
 }
@@ -3132,7 +3132,7 @@ define { <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_reg_ld3lane(i8* %A,
 ;CHECK-LABEL: test_v16i8_post_reg_ld3lane:
 ;CHECK: ld3.b { v0, v1, v2 }[0], [x0], x{{[0-9]+}}
   %ld3 = call { <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld3lane.v16i8.p0i8(<16 x i8> %B, <16 x i8> %C, <16 x i8> %D, i64 0, i8* %A)
-  %tmp = getelementptr i8* %A, i64 %inc
+  %tmp = getelementptr i8, i8* %A, i64 %inc
   store i8* %tmp, i8** %ptr
   ret { <16 x i8>, <16 x i8>, <16 x i8> } %ld3
 }
@@ -3144,7 +3144,7 @@ define { <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_imm_ld3lane(i8* %A, i8**
 ;CHECK-LABEL: test_v8i8_post_imm_ld3lane:
 ;CHECK: ld3.b { v0, v1, v2 }[0], [x0], #3
   %ld3 = call { <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld3lane.v8i8.p0i8(<8 x i8> %B, <8 x i8> %C, <8 x i8> %D, i64 0, i8* %A)
-  %tmp = getelementptr i8* %A, i32 3
+  %tmp = getelementptr i8, i8* %A, i32 3
   store i8* %tmp, i8** %ptr
   ret { <8 x i8>, <8 x i8>, <8 x i8> } %ld3
 }
@@ -3153,7 +3153,7 @@ define { <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_reg_ld3lane(i8* %A, i8**
 ;CHECK-LABEL: test_v8i8_post_reg_ld3lane:
 ;CHECK: ld3.b { v0, v1, v2 }[0], [x0], x{{[0-9]+}}
   %ld3 = call { <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld3lane.v8i8.p0i8(<8 x i8> %B, <8 x i8> %C, <8 x i8> %D, i64 0, i8* %A)
-  %tmp = getelementptr i8* %A, i64 %inc
+  %tmp = getelementptr i8, i8* %A, i64 %inc
   store i8* %tmp, i8** %ptr
   ret { <8 x i8>, <8 x i8>, <8 x i8> } %ld3
 }
@@ -3165,7 +3165,7 @@ define { <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_imm_ld3lane(i16* %A,
 ;CHECK-LABEL: test_v8i16_post_imm_ld3lane:
 ;CHECK: ld3.h { v0, v1, v2 }[0], [x0], #6
   %ld3 = call { <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld3lane.v8i16.p0i16(<8 x i16> %B, <8 x i16> %C, <8 x i16> %D, i64 0, i16* %A)
-  %tmp = getelementptr i16* %A, i32 3
+  %tmp = getelementptr i16, i16* %A, i32 3
   store i16* %tmp, i16** %ptr
   ret { <8 x i16>, <8 x i16>, <8 x i16> } %ld3
 }
@@ -3174,7 +3174,7 @@ define { <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_reg_ld3lane(i16* %A,
 ;CHECK-LABEL: test_v8i16_post_reg_ld3lane:
 ;CHECK: ld3.h { v0, v1, v2 }[0], [x0], x{{[0-9]+}}
   %ld3 = call { <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld3lane.v8i16.p0i16(<8 x i16> %B, <8 x i16> %C, <8 x i16> %D, i64 0, i16* %A)
-  %tmp = getelementptr i16* %A, i64 %inc
+  %tmp = getelementptr i16, i16* %A, i64 %inc
   store i16* %tmp, i16** %ptr
   ret { <8 x i16>, <8 x i16>, <8 x i16> } %ld3
 }
@@ -3186,7 +3186,7 @@ define { <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_imm_ld3lane(i16* %A,
 ;CHECK-LABEL: test_v4i16_post_imm_ld3lane:
 ;CHECK: ld3.h { v0, v1, v2 }[0], [x0], #6
   %ld3 = call { <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld3lane.v4i16.p0i16(<4 x i16> %B, <4 x i16> %C, <4 x i16> %D, i64 0, i16* %A)
-  %tmp = getelementptr i16* %A, i32 3
+  %tmp = getelementptr i16, i16* %A, i32 3
   store i16* %tmp, i16** %ptr
   ret { <4 x i16>, <4 x i16>, <4 x i16> } %ld3
 }
@@ -3195,7 +3195,7 @@ define { <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_reg_ld3lane(i16* %A,
 ;CHECK-LABEL: test_v4i16_post_reg_ld3lane:
 ;CHECK: ld3.h { v0, v1, v2 }[0], [x0], x{{[0-9]+}}
   %ld3 = call { <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld3lane.v4i16.p0i16(<4 x i16> %B, <4 x i16> %C, <4 x i16> %D, i64 0, i16* %A)
-  %tmp = getelementptr i16* %A, i64 %inc
+  %tmp = getelementptr i16, i16* %A, i64 %inc
   store i16* %tmp, i16** %ptr
   ret { <4 x i16>, <4 x i16>, <4 x i16> } %ld3
 }
@@ -3207,7 +3207,7 @@ define { <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_imm_ld3lane(i32* %A,
 ;CHECK-LABEL: test_v4i32_post_imm_ld3lane:
 ;CHECK: ld3.s { v0, v1, v2 }[0], [x0], #12
   %ld3 = call { <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld3lane.v4i32.p0i32(<4 x i32> %B, <4 x i32> %C, <4 x i32> %D, i64 0, i32* %A)
-  %tmp = getelementptr i32* %A, i32 3
+  %tmp = getelementptr i32, i32* %A, i32 3
   store i32* %tmp, i32** %ptr
   ret { <4 x i32>, <4 x i32>, <4 x i32> } %ld3
 }
@@ -3216,7 +3216,7 @@ define { <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_reg_ld3lane(i32* %A,
 ;CHECK-LABEL: test_v4i32_post_reg_ld3lane:
 ;CHECK: ld3.s { v0, v1, v2 }[0], [x0], x{{[0-9]+}}
   %ld3 = call { <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld3lane.v4i32.p0i32(<4 x i32> %B, <4 x i32> %C, <4 x i32> %D, i64 0, i32* %A)
-  %tmp = getelementptr i32* %A, i64 %inc
+  %tmp = getelementptr i32, i32* %A, i64 %inc
   store i32* %tmp, i32** %ptr
   ret { <4 x i32>, <4 x i32>, <4 x i32> } %ld3
 }
@@ -3228,7 +3228,7 @@ define { <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_imm_ld3lane(i32* %A,
 ;CHECK-LABEL: test_v2i32_post_imm_ld3lane:
 ;CHECK: ld3.s { v0, v1, v2 }[0], [x0], #12
   %ld3 = call { <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld3lane.v2i32.p0i32(<2 x i32> %B, <2 x i32> %C, <2 x i32> %D, i64 0, i32* %A)
-  %tmp = getelementptr i32* %A, i32 3
+  %tmp = getelementptr i32, i32* %A, i32 3
   store i32* %tmp, i32** %ptr
   ret { <2 x i32>, <2 x i32>, <2 x i32> } %ld3
 }
@@ -3237,7 +3237,7 @@ define { <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_reg_ld3lane(i32* %A,
 ;CHECK-LABEL: test_v2i32_post_reg_ld3lane:
 ;CHECK: ld3.s { v0, v1, v2 }[0], [x0], x{{[0-9]+}}
   %ld3 = call { <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld3lane.v2i32.p0i32(<2 x i32> %B, <2 x i32> %C, <2 x i32> %D, i64 0, i32* %A)
-  %tmp = getelementptr i32* %A, i64 %inc
+  %tmp = getelementptr i32, i32* %A, i64 %inc
   store i32* %tmp, i32** %ptr
   ret { <2 x i32>, <2 x i32>, <2 x i32> } %ld3
 }
@@ -3249,7 +3249,7 @@ define { <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_imm_ld3lane(i64* %A,
 ;CHECK-LABEL: test_v2i64_post_imm_ld3lane:
 ;CHECK: ld3.d { v0, v1, v2 }[0], [x0], #24
   %ld3 = call { <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld3lane.v2i64.p0i64(<2 x i64> %B, <2 x i64> %C, <2 x i64> %D, i64 0, i64* %A)
-  %tmp = getelementptr i64* %A, i32 3
+  %tmp = getelementptr i64, i64* %A, i32 3
   store i64* %tmp, i64** %ptr
   ret { <2 x i64>, <2 x i64>, <2 x i64> } %ld3
 }
@@ -3258,7 +3258,7 @@ define { <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_reg_ld3lane(i64* %A,
 ;CHECK-LABEL: test_v2i64_post_reg_ld3lane:
 ;CHECK: ld3.d { v0, v1, v2 }[0], [x0], x{{[0-9]+}}
   %ld3 = call { <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld3lane.v2i64.p0i64(<2 x i64> %B, <2 x i64> %C, <2 x i64> %D, i64 0, i64* %A)
-  %tmp = getelementptr i64* %A, i64 %inc
+  %tmp = getelementptr i64, i64* %A, i64 %inc
   store i64* %tmp, i64** %ptr
   ret { <2 x i64>, <2 x i64>, <2 x i64> } %ld3
 }
@@ -3270,7 +3270,7 @@ define { <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_imm_ld3lane(i64* %A,
 ;CHECK-LABEL: test_v1i64_post_imm_ld3lane:
 ;CHECK: ld3.d { v0, v1, v2 }[0], [x0], #24
   %ld3 = call { <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld3lane.v1i64.p0i64(<1 x i64> %B, <1 x i64> %C, <1 x i64> %D, i64 0, i64* %A)
-  %tmp = getelementptr i64* %A, i32 3
+  %tmp = getelementptr i64, i64* %A, i32 3
   store i64* %tmp, i64** %ptr
   ret { <1 x i64>, <1 x i64>, <1 x i64> } %ld3
 }
@@ -3279,7 +3279,7 @@ define { <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_reg_ld3lane(i64* %A,
 ;CHECK-LABEL: test_v1i64_post_reg_ld3lane:
 ;CHECK: ld3.d { v0, v1, v2 }[0], [x0], x{{[0-9]+}}
   %ld3 = call { <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld3lane.v1i64.p0i64(<1 x i64> %B, <1 x i64> %C, <1 x i64> %D, i64 0, i64* %A)
-  %tmp = getelementptr i64* %A, i64 %inc
+  %tmp = getelementptr i64, i64* %A, i64 %inc
   store i64* %tmp, i64** %ptr
   ret { <1 x i64>, <1 x i64>, <1 x i64> } %ld3
 }
@@ -3291,7 +3291,7 @@ define { <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_imm_ld3lane(fl
 ;CHECK-LABEL: test_v4f32_post_imm_ld3lane:
 ;CHECK: ld3.s { v0, v1, v2 }[0], [x0], #12
   %ld3 = call { <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld3lane.v4f32.p0f32(<4 x float> %B, <4 x float> %C, <4 x float> %D, i64 0, float* %A)
-  %tmp = getelementptr float* %A, i32 3
+  %tmp = getelementptr float, float* %A, i32 3
   store float* %tmp, float** %ptr
   ret { <4 x float>, <4 x float>, <4 x float> } %ld3
 }
@@ -3300,7 +3300,7 @@ define { <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_reg_ld3lane(fl
 ;CHECK-LABEL: test_v4f32_post_reg_ld3lane:
 ;CHECK: ld3.s { v0, v1, v2 }[0], [x0], x{{[0-9]+}}
   %ld3 = call { <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld3lane.v4f32.p0f32(<4 x float> %B, <4 x float> %C, <4 x float> %D, i64 0, float* %A)
-  %tmp = getelementptr float* %A, i64 %inc
+  %tmp = getelementptr float, float* %A, i64 %inc
   store float* %tmp, float** %ptr
   ret { <4 x float>, <4 x float>, <4 x float> } %ld3
 }
@@ -3312,7 +3312,7 @@ define { <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_imm_ld3lane(fl
 ;CHECK-LABEL: test_v2f32_post_imm_ld3lane:
 ;CHECK: ld3.s { v0, v1, v2 }[0], [x0], #12
   %ld3 = call { <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld3lane.v2f32.p0f32(<2 x float> %B, <2 x float> %C, <2 x float> %D, i64 0, float* %A)
-  %tmp = getelementptr float* %A, i32 3
+  %tmp = getelementptr float, float* %A, i32 3
   store float* %tmp, float** %ptr
   ret { <2 x float>, <2 x float>, <2 x float> } %ld3
 }
@@ -3321,7 +3321,7 @@ define { <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_reg_ld3lane(fl
 ;CHECK-LABEL: test_v2f32_post_reg_ld3lane:
 ;CHECK: ld3.s { v0, v1, v2 }[0], [x0], x{{[0-9]+}}
   %ld3 = call { <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld3lane.v2f32.p0f32(<2 x float> %B, <2 x float> %C, <2 x float> %D, i64 0, float* %A)
-  %tmp = getelementptr float* %A, i64 %inc
+  %tmp = getelementptr float, float* %A, i64 %inc
   store float* %tmp, float** %ptr
   ret { <2 x float>, <2 x float>, <2 x float> } %ld3
 }
@@ -3333,7 +3333,7 @@ define { <2 x double>, <2 x double>, <2 x double> } @test_v2f64_post_imm_ld3lane
 ;CHECK-LABEL: test_v2f64_post_imm_ld3lane:
 ;CHECK: ld3.d { v0, v1, v2 }[0], [x0], #24
   %ld3 = call { <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld3lane.v2f64.p0f64(<2 x double> %B, <2 x double> %C, <2 x double> %D, i64 0, double* %A)
-  %tmp = getelementptr double* %A, i32 3
+  %tmp = getelementptr double, double* %A, i32 3
   store double* %tmp, double** %ptr
   ret { <2 x double>, <2 x double>, <2 x double> } %ld3
 }
@@ -3342,7 +3342,7 @@ define { <2 x double>, <2 x double>, <2 x double> } @test_v2f64_post_reg_ld3lane
 ;CHECK-LABEL: test_v2f64_post_reg_ld3lane:
 ;CHECK: ld3.d { v0, v1, v2 }[0], [x0], x{{[0-9]+}}
   %ld3 = call { <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld3lane.v2f64.p0f64(<2 x double> %B, <2 x double> %C, <2 x double> %D, i64 0, double* %A)
-  %tmp = getelementptr double* %A, i64 %inc
+  %tmp = getelementptr double, double* %A, i64 %inc
   store double* %tmp, double** %ptr
   ret { <2 x double>, <2 x double>, <2 x double> } %ld3
 }
@@ -3354,7 +3354,7 @@ define { <1 x double>, <1 x double>, <1 x double> } @test_v1f64_post_imm_ld3lane
 ;CHECK-LABEL: test_v1f64_post_imm_ld3lane:
 ;CHECK: ld3.d { v0, v1, v2 }[0], [x0], #24
   %ld3 = call { <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld3lane.v1f64.p0f64(<1 x double> %B, <1 x double> %C, <1 x double> %D, i64 0, double* %A)
-  %tmp = getelementptr double* %A, i32 3
+  %tmp = getelementptr double, double* %A, i32 3
   store double* %tmp, double** %ptr
   ret { <1 x double>, <1 x double>, <1 x double> } %ld3
 }
@@ -3363,7 +3363,7 @@ define { <1 x double>, <1 x double>, <1 x double> } @test_v1f64_post_reg_ld3lane
 ;CHECK-LABEL: test_v1f64_post_reg_ld3lane:
 ;CHECK: ld3.d { v0, v1, v2 }[0], [x0], x{{[0-9]+}}
   %ld3 = call { <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld3lane.v1f64.p0f64(<1 x double> %B, <1 x double> %C, <1 x double> %D, i64 0, double* %A)
-  %tmp = getelementptr double* %A, i64 %inc
+  %tmp = getelementptr double, double* %A, i64 %inc
   store double* %tmp, double** %ptr
   ret { <1 x double>, <1 x double>, <1 x double> } %ld3
 }
@@ -3375,7 +3375,7 @@ define { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_imm_ld4la
 ;CHECK-LABEL: test_v16i8_post_imm_ld4lane:
 ;CHECK: ld4.b { v0, v1, v2, v3 }[0], [x0], #4
   %ld4 = call { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld4lane.v16i8.p0i8(<16 x i8> %B, <16 x i8> %C, <16 x i8> %D, <16 x i8> %E, i64 0, i8* %A)
-  %tmp = getelementptr i8* %A, i32 4
+  %tmp = getelementptr i8, i8* %A, i32 4
   store i8* %tmp, i8** %ptr
   ret { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } %ld4
 }
@@ -3384,7 +3384,7 @@ define { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_reg_ld4la
 ;CHECK-LABEL: test_v16i8_post_reg_ld4lane:
 ;CHECK: ld4.b { v0, v1, v2, v3 }[0], [x0], x{{[0-9]+}}
   %ld4 = call { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld4lane.v16i8.p0i8(<16 x i8> %B, <16 x i8> %C, <16 x i8> %D, <16 x i8> %E, i64 0, i8* %A)
-  %tmp = getelementptr i8* %A, i64 %inc
+  %tmp = getelementptr i8, i8* %A, i64 %inc
   store i8* %tmp, i8** %ptr
   ret { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } %ld4
 }
@@ -3396,7 +3396,7 @@ define { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_imm_ld4lane(i8
 ;CHECK-LABEL: test_v8i8_post_imm_ld4lane:
 ;CHECK: ld4.b { v0, v1, v2, v3 }[0], [x0], #4
   %ld4 = call { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld4lane.v8i8.p0i8(<8 x i8> %B, <8 x i8> %C, <8 x i8> %D, <8 x i8> %E, i64 0, i8* %A)
-  %tmp = getelementptr i8* %A, i32 4
+  %tmp = getelementptr i8, i8* %A, i32 4
   store i8* %tmp, i8** %ptr
   ret { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } %ld4
 }
@@ -3405,7 +3405,7 @@ define { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_reg_ld4lane(i8
 ;CHECK-LABEL: test_v8i8_post_reg_ld4lane:
 ;CHECK: ld4.b { v0, v1, v2, v3 }[0], [x0], x{{[0-9]+}}
   %ld4 = call { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld4lane.v8i8.p0i8(<8 x i8> %B, <8 x i8> %C, <8 x i8> %D, <8 x i8> %E, i64 0, i8* %A)
-  %tmp = getelementptr i8* %A, i64 %inc
+  %tmp = getelementptr i8, i8* %A, i64 %inc
   store i8* %tmp, i8** %ptr
   ret { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } %ld4
 }
@@ -3417,7 +3417,7 @@ define { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_imm_ld4la
 ;CHECK-LABEL: test_v8i16_post_imm_ld4lane:
 ;CHECK: ld4.h { v0, v1, v2, v3 }[0], [x0], #8
   %ld4 = call { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld4lane.v8i16.p0i16(<8 x i16> %B, <8 x i16> %C, <8 x i16> %D, <8 x i16> %E, i64 0, i16* %A)
-  %tmp = getelementptr i16* %A, i32 4
+  %tmp = getelementptr i16, i16* %A, i32 4
   store i16* %tmp, i16** %ptr
   ret { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } %ld4
 }
@@ -3426,7 +3426,7 @@ define { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_reg_ld4la
 ;CHECK-LABEL: test_v8i16_post_reg_ld4lane:
 ;CHECK: ld4.h { v0, v1, v2, v3 }[0], [x0], x{{[0-9]+}}
   %ld4 = call { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld4lane.v8i16.p0i16(<8 x i16> %B, <8 x i16> %C, <8 x i16> %D, <8 x i16> %E, i64 0, i16* %A)
-  %tmp = getelementptr i16* %A, i64 %inc
+  %tmp = getelementptr i16, i16* %A, i64 %inc
   store i16* %tmp, i16** %ptr
   ret { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } %ld4
 }
@@ -3438,7 +3438,7 @@ define { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_imm_ld4la
 ;CHECK-LABEL: test_v4i16_post_imm_ld4lane:
 ;CHECK: ld4.h { v0, v1, v2, v3 }[0], [x0], #8
   %ld4 = call { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld4lane.v4i16.p0i16(<4 x i16> %B, <4 x i16> %C, <4 x i16> %D, <4 x i16> %E, i64 0, i16* %A)
-  %tmp = getelementptr i16* %A, i32 4
+  %tmp = getelementptr i16, i16* %A, i32 4
   store i16* %tmp, i16** %ptr
   ret { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } %ld4
 }
@@ -3447,7 +3447,7 @@ define { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_reg_ld4la
 ;CHECK-LABEL: test_v4i16_post_reg_ld4lane:
 ;CHECK: ld4.h { v0, v1, v2, v3 }[0], [x0], x{{[0-9]+}}
   %ld4 = call { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld4lane.v4i16.p0i16(<4 x i16> %B, <4 x i16> %C, <4 x i16> %D, <4 x i16> %E, i64 0, i16* %A)
-  %tmp = getelementptr i16* %A, i64 %inc
+  %tmp = getelementptr i16, i16* %A, i64 %inc
   store i16* %tmp, i16** %ptr
   ret { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } %ld4
 }
@@ -3459,7 +3459,7 @@ define { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_imm_ld4la
 ;CHECK-LABEL: test_v4i32_post_imm_ld4lane:
 ;CHECK: ld4.s { v0, v1, v2, v3 }[0], [x0], #16
   %ld4 = call { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld4lane.v4i32.p0i32(<4 x i32> %B, <4 x i32> %C, <4 x i32> %D, <4 x i32> %E, i64 0, i32* %A)
-  %tmp = getelementptr i32* %A, i32 4
+  %tmp = getelementptr i32, i32* %A, i32 4
   store i32* %tmp, i32** %ptr
   ret { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } %ld4
 }
@@ -3468,7 +3468,7 @@ define { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_reg_ld4la
 ;CHECK-LABEL: test_v4i32_post_reg_ld4lane:
 ;CHECK: ld4.s { v0, v1, v2, v3 }[0], [x0], x{{[0-9]+}}
   %ld4 = call { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld4lane.v4i32.p0i32(<4 x i32> %B, <4 x i32> %C, <4 x i32> %D, <4 x i32> %E, i64 0, i32* %A)
-  %tmp = getelementptr i32* %A, i64 %inc
+  %tmp = getelementptr i32, i32* %A, i64 %inc
   store i32* %tmp, i32** %ptr
   ret { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } %ld4
 }
@@ -3480,7 +3480,7 @@ define { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_imm_ld4la
 ;CHECK-LABEL: test_v2i32_post_imm_ld4lane:
 ;CHECK: ld4.s { v0, v1, v2, v3 }[0], [x0], #16
   %ld4 = call { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld4lane.v2i32.p0i32(<2 x i32> %B, <2 x i32> %C, <2 x i32> %D, <2 x i32> %E, i64 0, i32* %A)
-  %tmp = getelementptr i32* %A, i32 4
+  %tmp = getelementptr i32, i32* %A, i32 4
   store i32* %tmp, i32** %ptr
   ret { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } %ld4
 }
@@ -3489,7 +3489,7 @@ define { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_reg_ld4la
 ;CHECK-LABEL: test_v2i32_post_reg_ld4lane:
 ;CHECK: ld4.s { v0, v1, v2, v3 }[0], [x0], x{{[0-9]+}}
   %ld4 = call { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld4lane.v2i32.p0i32(<2 x i32> %B, <2 x i32> %C, <2 x i32> %D, <2 x i32> %E, i64 0, i32* %A)
-  %tmp = getelementptr i32* %A, i64 %inc
+  %tmp = getelementptr i32, i32* %A, i64 %inc
   store i32* %tmp, i32** %ptr
   ret { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } %ld4
 }
@@ -3501,7 +3501,7 @@ define { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_imm_ld4la
 ;CHECK-LABEL: test_v2i64_post_imm_ld4lane:
 ;CHECK: ld4.d { v0, v1, v2, v3 }[0], [x0], #32
   %ld4 = call { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld4lane.v2i64.p0i64(<2 x i64> %B, <2 x i64> %C, <2 x i64> %D, <2 x i64> %E, i64 0, i64* %A)
-  %tmp = getelementptr i64* %A, i32 4
+  %tmp = getelementptr i64, i64* %A, i32 4
   store i64* %tmp, i64** %ptr
   ret { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } %ld4
 }
@@ -3510,7 +3510,7 @@ define { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_reg_ld4la
 ;CHECK-LABEL: test_v2i64_post_reg_ld4lane:
 ;CHECK: ld4.d { v0, v1, v2, v3 }[0], [x0], x{{[0-9]+}}
   %ld4 = call { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld4lane.v2i64.p0i64(<2 x i64> %B, <2 x i64> %C, <2 x i64> %D, <2 x i64> %E, i64 0, i64* %A)
-  %tmp = getelementptr i64* %A, i64 %inc
+  %tmp = getelementptr i64, i64* %A, i64 %inc
   store i64* %tmp, i64** %ptr
   ret { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } %ld4
 }
@@ -3522,7 +3522,7 @@ define { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_imm_ld4la
 ;CHECK-LABEL: test_v1i64_post_imm_ld4lane:
 ;CHECK: ld4.d { v0, v1, v2, v3 }[0], [x0], #32
   %ld4 = call { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld4lane.v1i64.p0i64(<1 x i64> %B, <1 x i64> %C, <1 x i64> %D, <1 x i64> %E, i64 0, i64* %A)
-  %tmp = getelementptr i64* %A, i32 4
+  %tmp = getelementptr i64, i64* %A, i32 4
   store i64* %tmp, i64** %ptr
   ret { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } %ld4
 }
@@ -3531,7 +3531,7 @@ define { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_reg_ld4la
 ;CHECK-LABEL: test_v1i64_post_reg_ld4lane:
 ;CHECK: ld4.d { v0, v1, v2, v3 }[0], [x0], x{{[0-9]+}}
   %ld4 = call { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld4lane.v1i64.p0i64(<1 x i64> %B, <1 x i64> %C, <1 x i64> %D, <1 x i64> %E, i64 0, i64* %A)
-  %tmp = getelementptr i64* %A, i64 %inc
+  %tmp = getelementptr i64, i64* %A, i64 %inc
   store i64* %tmp, i64** %ptr
   ret { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } %ld4
 }
@@ -3543,7 +3543,7 @@ define { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_i
 ;CHECK-LABEL: test_v4f32_post_imm_ld4lane:
 ;CHECK: ld4.s { v0, v1, v2, v3 }[0], [x0], #16
   %ld4 = call { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld4lane.v4f32.p0f32(<4 x float> %B, <4 x float> %C, <4 x float> %D, <4 x float> %E, i64 0, float* %A)
-  %tmp = getelementptr float* %A, i32 4
+  %tmp = getelementptr float, float* %A, i32 4
   store float* %tmp, float** %ptr
   ret { <4 x float>, <4 x float>, <4 x float>, <4 x float> } %ld4
 }
@@ -3552,7 +3552,7 @@ define { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_r
 ;CHECK-LABEL: test_v4f32_post_reg_ld4lane:
 ;CHECK: ld4.s { v0, v1, v2, v3 }[0], [x0], x{{[0-9]+}}
   %ld4 = call { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld4lane.v4f32.p0f32(<4 x float> %B, <4 x float> %C, <4 x float> %D, <4 x float> %E, i64 0, float* %A)
-  %tmp = getelementptr float* %A, i64 %inc
+  %tmp = getelementptr float, float* %A, i64 %inc
   store float* %tmp, float** %ptr
   ret { <4 x float>, <4 x float>, <4 x float>, <4 x float> } %ld4
 }
@@ -3564,7 +3564,7 @@ define { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_i
 ;CHECK-LABEL: test_v2f32_post_imm_ld4lane:
 ;CHECK: ld4.s { v0, v1, v2, v3 }[0], [x0], #16
   %ld4 = call { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld4lane.v2f32.p0f32(<2 x float> %B, <2 x float> %C, <2 x float> %D, <2 x float> %E, i64 0, float* %A)
-  %tmp = getelementptr float* %A, i32 4
+  %tmp = getelementptr float, float* %A, i32 4
   store float* %tmp, float** %ptr
   ret { <2 x float>, <2 x float>, <2 x float>, <2 x float> } %ld4
 }
@@ -3573,7 +3573,7 @@ define { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_r
 ;CHECK-LABEL: test_v2f32_post_reg_ld4lane:
 ;CHECK: ld4.s { v0, v1, v2, v3 }[0], [x0], x{{[0-9]+}}
   %ld4 = call { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld4lane.v2f32.p0f32(<2 x float> %B, <2 x float> %C, <2 x float> %D, <2 x float> %E, i64 0, float* %A)
-  %tmp = getelementptr float* %A, i64 %inc
+  %tmp = getelementptr float, float* %A, i64 %inc
   store float* %tmp, float** %ptr
   ret { <2 x float>, <2 x float>, <2 x float>, <2 x float> } %ld4
 }
@@ -3585,7 +3585,7 @@ define { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @test_v2f64_po
 ;CHECK-LABEL: test_v2f64_post_imm_ld4lane:
 ;CHECK: ld4.d { v0, v1, v2, v3 }[0], [x0], #32
   %ld4 = call { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld4lane.v2f64.p0f64(<2 x double> %B, <2 x double> %C, <2 x double> %D, <2 x double> %E, i64 0, double* %A)
-  %tmp = getelementptr double* %A, i32 4
+  %tmp = getelementptr double, double* %A, i32 4
   store double* %tmp, double** %ptr
   ret { <2 x double>, <2 x double>, <2 x double>, <2 x double> } %ld4
 }
@@ -3594,7 +3594,7 @@ define { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @test_v2f64_po
 ;CHECK-LABEL: test_v2f64_post_reg_ld4lane:
 ;CHECK: ld4.d { v0, v1, v2, v3 }[0], [x0], x{{[0-9]+}}
   %ld4 = call { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld4lane.v2f64.p0f64(<2 x double> %B, <2 x double> %C, <2 x double> %D, <2 x double> %E, i64 0, double* %A)
-  %tmp = getelementptr double* %A, i64 %inc
+  %tmp = getelementptr double, double* %A, i64 %inc
   store double* %tmp, double** %ptr
   ret { <2 x double>, <2 x double>, <2 x double>, <2 x double> } %ld4
 }
@@ -3606,7 +3606,7 @@ define { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @test_v1f64_po
 ;CHECK-LABEL: test_v1f64_post_imm_ld4lane:
 ;CHECK: ld4.d { v0, v1, v2, v3 }[0], [x0], #32
   %ld4 = call { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld4lane.v1f64.p0f64(<1 x double> %B, <1 x double> %C, <1 x double> %D, <1 x double> %E, i64 0, double* %A)
-  %tmp = getelementptr double* %A, i32 4
+  %tmp = getelementptr double, double* %A, i32 4
   store double* %tmp, double** %ptr
   ret { <1 x double>, <1 x double>, <1 x double>, <1 x double> } %ld4
 }
@@ -3615,7 +3615,7 @@ define { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @test_v1f64_po
 ;CHECK-LABEL: test_v1f64_post_reg_ld4lane:
 ;CHECK: ld4.d { v0, v1, v2, v3 }[0], [x0], x{{[0-9]+}}
   %ld4 = call { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld4lane.v1f64.p0f64(<1 x double> %B, <1 x double> %C, <1 x double> %D, <1 x double> %E, i64 0, double* %A)
-  %tmp = getelementptr double* %A, i64 %inc
+  %tmp = getelementptr double, double* %A, i64 %inc
   store double* %tmp, double** %ptr
   ret { <1 x double>, <1 x double>, <1 x double>, <1 x double> } %ld4
 }
@@ -3627,7 +3627,7 @@ define i8* @test_v16i8_post_imm_st2(i8* %A, i8** %ptr, <16 x i8> %B, <16 x i8> %
 ;CHECK-LABEL: test_v16i8_post_imm_st2:
 ;CHECK: st2.16b { v0, v1 }, [x0], #32
   call void @llvm.aarch64.neon.st2.v16i8.p0i8(<16 x i8> %B, <16 x i8> %C, i8* %A)
-  %tmp = getelementptr i8* %A, i32 32
+  %tmp = getelementptr i8, i8* %A, i32 32
   ret i8* %tmp
 }
 
@@ -3635,7 +3635,7 @@ define i8* @test_v16i8_post_reg_st2(i8* %A, i8** %ptr, <16 x i8> %B, <16 x i8> %
 ;CHECK-LABEL: test_v16i8_post_reg_st2:
 ;CHECK: st2.16b { v0, v1 }, [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st2.v16i8.p0i8(<16 x i8> %B, <16 x i8> %C, i8* %A)
-  %tmp = getelementptr i8* %A, i64 %inc
+  %tmp = getelementptr i8, i8* %A, i64 %inc
   ret i8* %tmp
 }
 
@@ -3646,7 +3646,7 @@ define i8* @test_v8i8_post_imm_st2(i8* %A, i8** %ptr, <8 x i8> %B, <8 x i8> %C)
 ;CHECK-LABEL: test_v8i8_post_imm_st2:
 ;CHECK: st2.8b { v0, v1 }, [x0], #16
   call void @llvm.aarch64.neon.st2.v8i8.p0i8(<8 x i8> %B, <8 x i8> %C, i8* %A)
-  %tmp = getelementptr i8* %A, i32 16
+  %tmp = getelementptr i8, i8* %A, i32 16
   ret i8* %tmp
 }
 
@@ -3654,7 +3654,7 @@ define i8* @test_v8i8_post_reg_st2(i8* %A, i8** %ptr, <8 x i8> %B, <8 x i8> %C,
 ;CHECK-LABEL: test_v8i8_post_reg_st2:
 ;CHECK: st2.8b { v0, v1 }, [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st2.v8i8.p0i8(<8 x i8> %B, <8 x i8> %C, i8* %A)
-  %tmp = getelementptr i8* %A, i64 %inc
+  %tmp = getelementptr i8, i8* %A, i64 %inc
   ret i8* %tmp
 }
 
@@ -3665,7 +3665,7 @@ define i16* @test_v8i16_post_imm_st2(i16* %A, i16** %ptr, <8 x i16> %B, <8 x i16
 ;CHECK-LABEL: test_v8i16_post_imm_st2:
 ;CHECK: st2.8h { v0, v1 }, [x0], #32
   call void @llvm.aarch64.neon.st2.v8i16.p0i16(<8 x i16> %B, <8 x i16> %C, i16* %A)
-  %tmp = getelementptr i16* %A, i32 16
+  %tmp = getelementptr i16, i16* %A, i32 16
   ret i16* %tmp
 }
 
@@ -3673,7 +3673,7 @@ define i16* @test_v8i16_post_reg_st2(i16* %A, i16** %ptr, <8 x i16> %B, <8 x i16
 ;CHECK-LABEL: test_v8i16_post_reg_st2:
 ;CHECK: st2.8h { v0, v1 }, [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st2.v8i16.p0i16(<8 x i16> %B, <8 x i16> %C, i16* %A)
-  %tmp = getelementptr i16* %A, i64 %inc
+  %tmp = getelementptr i16, i16* %A, i64 %inc
   ret i16* %tmp
 }
 
@@ -3684,7 +3684,7 @@ define i16* @test_v4i16_post_imm_st2(i16* %A, i16** %ptr, <4 x i16> %B, <4 x i16
 ;CHECK-LABEL: test_v4i16_post_imm_st2:
 ;CHECK: st2.4h { v0, v1 }, [x0], #16
   call void @llvm.aarch64.neon.st2.v4i16.p0i16(<4 x i16> %B, <4 x i16> %C, i16* %A)
-  %tmp = getelementptr i16* %A, i32 8
+  %tmp = getelementptr i16, i16* %A, i32 8
   ret i16* %tmp
 }
 
@@ -3692,7 +3692,7 @@ define i16* @test_v4i16_post_reg_st2(i16* %A, i16** %ptr, <4 x i16> %B, <4 x i16
 ;CHECK-LABEL: test_v4i16_post_reg_st2:
 ;CHECK: st2.4h { v0, v1 }, [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st2.v4i16.p0i16(<4 x i16> %B, <4 x i16> %C, i16* %A)
-  %tmp = getelementptr i16* %A, i64 %inc
+  %tmp = getelementptr i16, i16* %A, i64 %inc
   ret i16* %tmp
 }
 
@@ -3703,7 +3703,7 @@ define i32* @test_v4i32_post_imm_st2(i32* %A, i32** %ptr, <4 x i32> %B, <4 x i32
 ;CHECK-LABEL: test_v4i32_post_imm_st2:
 ;CHECK: st2.4s { v0, v1 }, [x0], #32
   call void @llvm.aarch64.neon.st2.v4i32.p0i32(<4 x i32> %B, <4 x i32> %C, i32* %A)
-  %tmp = getelementptr i32* %A, i32 8
+  %tmp = getelementptr i32, i32* %A, i32 8
   ret i32* %tmp
 }
 
@@ -3711,7 +3711,7 @@ define i32* @test_v4i32_post_reg_st2(i32* %A, i32** %ptr, <4 x i32> %B, <4 x i32
 ;CHECK-LABEL: test_v4i32_post_reg_st2:
 ;CHECK: st2.4s { v0, v1 }, [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st2.v4i32.p0i32(<4 x i32> %B, <4 x i32> %C, i32* %A)
-  %tmp = getelementptr i32* %A, i64 %inc
+  %tmp = getelementptr i32, i32* %A, i64 %inc
   ret i32* %tmp
 }
 
@@ -3722,7 +3722,7 @@ define i32* @test_v2i32_post_imm_st2(i32* %A, i32** %ptr, <2 x i32> %B, <2 x i32
 ;CHECK-LABEL: test_v2i32_post_imm_st2:
 ;CHECK: st2.2s { v0, v1 }, [x0], #16
   call void @llvm.aarch64.neon.st2.v2i32.p0i32(<2 x i32> %B, <2 x i32> %C, i32* %A)
-  %tmp = getelementptr i32* %A, i32 4
+  %tmp = getelementptr i32, i32* %A, i32 4
   ret i32* %tmp
 }
 
@@ -3730,7 +3730,7 @@ define i32* @test_v2i32_post_reg_st2(i32* %A, i32** %ptr, <2 x i32> %B, <2 x i32
 ;CHECK-LABEL: test_v2i32_post_reg_st2:
 ;CHECK: st2.2s { v0, v1 }, [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st2.v2i32.p0i32(<2 x i32> %B, <2 x i32> %C, i32* %A)
-  %tmp = getelementptr i32* %A, i64 %inc
+  %tmp = getelementptr i32, i32* %A, i64 %inc
   ret i32* %tmp
 }
 
@@ -3741,7 +3741,7 @@ define i64* @test_v2i64_post_imm_st2(i64* %A, i64** %ptr, <2 x i64> %B, <2 x i64
 ;CHECK-LABEL: test_v2i64_post_imm_st2:
 ;CHECK: st2.2d { v0, v1 }, [x0], #32
   call void @llvm.aarch64.neon.st2.v2i64.p0i64(<2 x i64> %B, <2 x i64> %C, i64* %A)
-  %tmp = getelementptr i64* %A, i64 4
+  %tmp = getelementptr i64, i64* %A, i64 4
   ret i64* %tmp
 }
 
@@ -3749,7 +3749,7 @@ define i64* @test_v2i64_post_reg_st2(i64* %A, i64** %ptr, <2 x i64> %B, <2 x i64
 ;CHECK-LABEL: test_v2i64_post_reg_st2:
 ;CHECK: st2.2d { v0, v1 }, [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st2.v2i64.p0i64(<2 x i64> %B, <2 x i64> %C, i64* %A)
-  %tmp = getelementptr i64* %A, i64 %inc
+  %tmp = getelementptr i64, i64* %A, i64 %inc
   ret i64* %tmp
 }
 
@@ -3760,7 +3760,7 @@ define i64* @test_v1i64_post_imm_st2(i64* %A, i64** %ptr, <1 x i64> %B, <1 x i64
 ;CHECK-LABEL: test_v1i64_post_imm_st2:
 ;CHECK: st1.1d { v0, v1 }, [x0], #16
   call void @llvm.aarch64.neon.st2.v1i64.p0i64(<1 x i64> %B, <1 x i64> %C, i64* %A)
-  %tmp = getelementptr i64* %A, i64 2
+  %tmp = getelementptr i64, i64* %A, i64 2
   ret i64* %tmp
 }
 
@@ -3768,7 +3768,7 @@ define i64* @test_v1i64_post_reg_st2(i64* %A, i64** %ptr, <1 x i64> %B, <1 x i64
 ;CHECK-LABEL: test_v1i64_post_reg_st2:
 ;CHECK: st1.1d { v0, v1 }, [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st2.v1i64.p0i64(<1 x i64> %B, <1 x i64> %C, i64* %A)
-  %tmp = getelementptr i64* %A, i64 %inc
+  %tmp = getelementptr i64, i64* %A, i64 %inc
   ret i64* %tmp
 }
 
@@ -3779,7 +3779,7 @@ define float* @test_v4f32_post_imm_st2(float* %A, float** %ptr, <4 x float> %B,
 ;CHECK-LABEL: test_v4f32_post_imm_st2:
 ;CHECK: st2.4s { v0, v1 }, [x0], #32
   call void @llvm.aarch64.neon.st2.v4f32.p0f32(<4 x float> %B, <4 x float> %C, float* %A)
-  %tmp = getelementptr float* %A, i32 8
+  %tmp = getelementptr float, float* %A, i32 8
   ret float* %tmp
 }
 
@@ -3787,7 +3787,7 @@ define float* @test_v4f32_post_reg_st2(float* %A, float** %ptr, <4 x float> %B,
 ;CHECK-LABEL: test_v4f32_post_reg_st2:
 ;CHECK: st2.4s { v0, v1 }, [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st2.v4f32.p0f32(<4 x float> %B, <4 x float> %C, float* %A)
-  %tmp = getelementptr float* %A, i64 %inc
+  %tmp = getelementptr float, float* %A, i64 %inc
   ret float* %tmp
 }
 
@@ -3798,7 +3798,7 @@ define float* @test_v2f32_post_imm_st2(float* %A, float** %ptr, <2 x float> %B,
 ;CHECK-LABEL: test_v2f32_post_imm_st2:
 ;CHECK: st2.2s { v0, v1 }, [x0], #16
   call void @llvm.aarch64.neon.st2.v2f32.p0f32(<2 x float> %B, <2 x float> %C, float* %A)
-  %tmp = getelementptr float* %A, i32 4
+  %tmp = getelementptr float, float* %A, i32 4
   ret float* %tmp
 }
 
@@ -3806,7 +3806,7 @@ define float* @test_v2f32_post_reg_st2(float* %A, float** %ptr, <2 x float> %B,
 ;CHECK-LABEL: test_v2f32_post_reg_st2:
 ;CHECK: st2.2s { v0, v1 }, [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st2.v2f32.p0f32(<2 x float> %B, <2 x float> %C, float* %A)
-  %tmp = getelementptr float* %A, i64 %inc
+  %tmp = getelementptr float, float* %A, i64 %inc
   ret float* %tmp
 }
 
@@ -3817,7 +3817,7 @@ define double* @test_v2f64_post_imm_st2(double* %A, double** %ptr, <2 x double>
 ;CHECK-LABEL: test_v2f64_post_imm_st2:
 ;CHECK: st2.2d { v0, v1 }, [x0], #32
   call void @llvm.aarch64.neon.st2.v2f64.p0f64(<2 x double> %B, <2 x double> %C, double* %A)
-  %tmp = getelementptr double* %A, i64 4
+  %tmp = getelementptr double, double* %A, i64 4
   ret double* %tmp
 }
 
@@ -3825,7 +3825,7 @@ define double* @test_v2f64_post_reg_st2(double* %A, double** %ptr, <2 x double>
 ;CHECK-LABEL: test_v2f64_post_reg_st2:
 ;CHECK: st2.2d { v0, v1 }, [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st2.v2f64.p0f64(<2 x double> %B, <2 x double> %C, double* %A)
-  %tmp = getelementptr double* %A, i64 %inc
+  %tmp = getelementptr double, double* %A, i64 %inc
   ret double* %tmp
 }
 
@@ -3836,7 +3836,7 @@ define double* @test_v1f64_post_imm_st2(double* %A, double** %ptr, <1 x double>
 ;CHECK-LABEL: test_v1f64_post_imm_st2:
 ;CHECK: st1.1d { v0, v1 }, [x0], #16
   call void @llvm.aarch64.neon.st2.v1f64.p0f64(<1 x double> %B, <1 x double> %C, double* %A)
-  %tmp = getelementptr double* %A, i64 2
+  %tmp = getelementptr double, double* %A, i64 2
   ret double* %tmp
 }
 
@@ -3844,7 +3844,7 @@ define double* @test_v1f64_post_reg_st2(double* %A, double** %ptr, <1 x double>
 ;CHECK-LABEL: test_v1f64_post_reg_st2:
 ;CHECK: st1.1d { v0, v1 }, [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st2.v1f64.p0f64(<1 x double> %B, <1 x double> %C, double* %A)
-  %tmp = getelementptr double* %A, i64 %inc
+  %tmp = getelementptr double, double* %A, i64 %inc
   ret double* %tmp
 }
 
@@ -3855,7 +3855,7 @@ define i8* @test_v16i8_post_imm_st3(i8* %A, i8** %ptr, <16 x i8> %B, <16 x i8> %
 ;CHECK-LABEL: test_v16i8_post_imm_st3:
 ;CHECK: st3.16b { v0, v1, v2 }, [x0], #48
   call void @llvm.aarch64.neon.st3.v16i8.p0i8(<16 x i8> %B, <16 x i8> %C, <16 x i8> %D, i8* %A)
-  %tmp = getelementptr i8* %A, i32 48
+  %tmp = getelementptr i8, i8* %A, i32 48
   ret i8* %tmp
 }
 
@@ -3863,7 +3863,7 @@ define i8* @test_v16i8_post_reg_st3(i8* %A, i8** %ptr, <16 x i8> %B, <16 x i8> %
 ;CHECK-LABEL: test_v16i8_post_reg_st3:
 ;CHECK: st3.16b { v0, v1, v2 }, [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st3.v16i8.p0i8(<16 x i8> %B, <16 x i8> %C, <16 x i8> %D, i8* %A)
-  %tmp = getelementptr i8* %A, i64 %inc
+  %tmp = getelementptr i8, i8* %A, i64 %inc
   ret i8* %tmp
 }
 
@@ -3874,7 +3874,7 @@ define i8* @test_v8i8_post_imm_st3(i8* %A, i8** %ptr, <8 x i8> %B, <8 x i8> %C,
 ;CHECK-LABEL: test_v8i8_post_imm_st3:
 ;CHECK: st3.8b { v0, v1, v2 }, [x0], #24
   call void @llvm.aarch64.neon.st3.v8i8.p0i8(<8 x i8> %B, <8 x i8> %C, <8 x i8> %D, i8* %A)
-  %tmp = getelementptr i8* %A, i32 24
+  %tmp = getelementptr i8, i8* %A, i32 24
   ret i8* %tmp
 }
 
@@ -3882,7 +3882,7 @@ define i8* @test_v8i8_post_reg_st3(i8* %A, i8** %ptr, <8 x i8> %B, <8 x i8> %C,
 ;CHECK-LABEL: test_v8i8_post_reg_st3:
 ;CHECK: st3.8b { v0, v1, v2 }, [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st3.v8i8.p0i8(<8 x i8> %B, <8 x i8> %C, <8 x i8> %D, i8* %A)
-  %tmp = getelementptr i8* %A, i64 %inc
+  %tmp = getelementptr i8, i8* %A, i64 %inc
   ret i8* %tmp
 }
 
@@ -3893,7 +3893,7 @@ define i16* @test_v8i16_post_imm_st3(i16* %A, i16** %ptr, <8 x i16> %B, <8 x i16
 ;CHECK-LABEL: test_v8i16_post_imm_st3:
 ;CHECK: st3.8h { v0, v1, v2 }, [x0], #48
   call void @llvm.aarch64.neon.st3.v8i16.p0i16(<8 x i16> %B, <8 x i16> %C, <8 x i16> %D, i16* %A)
-  %tmp = getelementptr i16* %A, i32 24
+  %tmp = getelementptr i16, i16* %A, i32 24
   ret i16* %tmp
 }
 
@@ -3901,7 +3901,7 @@ define i16* @test_v8i16_post_reg_st3(i16* %A, i16** %ptr, <8 x i16> %B, <8 x i16
 ;CHECK-LABEL: test_v8i16_post_reg_st3:
 ;CHECK: st3.8h { v0, v1, v2 }, [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st3.v8i16.p0i16(<8 x i16> %B, <8 x i16> %C, <8 x i16> %D, i16* %A)
-  %tmp = getelementptr i16* %A, i64 %inc
+  %tmp = getelementptr i16, i16* %A, i64 %inc
   ret i16* %tmp
 }
 
@@ -3912,7 +3912,7 @@ define i16* @test_v4i16_post_imm_st3(i16* %A, i16** %ptr, <4 x i16> %B, <4 x i16
 ;CHECK-LABEL: test_v4i16_post_imm_st3:
 ;CHECK: st3.4h { v0, v1, v2 }, [x0], #24
   call void @llvm.aarch64.neon.st3.v4i16.p0i16(<4 x i16> %B, <4 x i16> %C, <4 x i16> %D, i16* %A)
-  %tmp = getelementptr i16* %A, i32 12
+  %tmp = getelementptr i16, i16* %A, i32 12
   ret i16* %tmp
 }
 
@@ -3920,7 +3920,7 @@ define i16* @test_v4i16_post_reg_st3(i16* %A, i16** %ptr, <4 x i16> %B, <4 x i16
 ;CHECK-LABEL: test_v4i16_post_reg_st3:
 ;CHECK: st3.4h { v0, v1, v2 }, [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st3.v4i16.p0i16(<4 x i16> %B, <4 x i16> %C, <4 x i16> %D, i16* %A)
-  %tmp = getelementptr i16* %A, i64 %inc
+  %tmp = getelementptr i16, i16* %A, i64 %inc
   ret i16* %tmp
 }
 
@@ -3931,7 +3931,7 @@ define i32* @test_v4i32_post_imm_st3(i32* %A, i32** %ptr, <4 x i32> %B, <4 x i32
 ;CHECK-LABEL: test_v4i32_post_imm_st3:
 ;CHECK: st3.4s { v0, v1, v2 }, [x0], #48
   call void @llvm.aarch64.neon.st3.v4i32.p0i32(<4 x i32> %B, <4 x i32> %C, <4 x i32> %D, i32* %A)
-  %tmp = getelementptr i32* %A, i32 12
+  %tmp = getelementptr i32, i32* %A, i32 12
   ret i32* %tmp
 }
 
@@ -3939,7 +3939,7 @@ define i32* @test_v4i32_post_reg_st3(i32* %A, i32** %ptr, <4 x i32> %B, <4 x i32
 ;CHECK-LABEL: test_v4i32_post_reg_st3:
 ;CHECK: st3.4s { v0, v1, v2 }, [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st3.v4i32.p0i32(<4 x i32> %B, <4 x i32> %C, <4 x i32> %D, i32* %A)
-  %tmp = getelementptr i32* %A, i64 %inc
+  %tmp = getelementptr i32, i32* %A, i64 %inc
   ret i32* %tmp
 }
 
@@ -3950,7 +3950,7 @@ define i32* @test_v2i32_post_imm_st3(i32* %A, i32** %ptr, <2 x i32> %B, <2 x i32
 ;CHECK-LABEL: test_v2i32_post_imm_st3:
 ;CHECK: st3.2s { v0, v1, v2 }, [x0], #24
   call void @llvm.aarch64.neon.st3.v2i32.p0i32(<2 x i32> %B, <2 x i32> %C, <2 x i32> %D, i32* %A)
-  %tmp = getelementptr i32* %A, i32 6
+  %tmp = getelementptr i32, i32* %A, i32 6
   ret i32* %tmp
 }
 
@@ -3958,7 +3958,7 @@ define i32* @test_v2i32_post_reg_st3(i32* %A, i32** %ptr, <2 x i32> %B, <2 x i32
 ;CHECK-LABEL: test_v2i32_post_reg_st3:
 ;CHECK: st3.2s { v0, v1, v2 }, [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st3.v2i32.p0i32(<2 x i32> %B, <2 x i32> %C, <2 x i32> %D, i32* %A)
-  %tmp = getelementptr i32* %A, i64 %inc
+  %tmp = getelementptr i32, i32* %A, i64 %inc
   ret i32* %tmp
 }
 
@@ -3969,7 +3969,7 @@ define i64* @test_v2i64_post_imm_st3(i64* %A, i64** %ptr, <2 x i64> %B, <2 x i64
 ;CHECK-LABEL: test_v2i64_post_imm_st3:
 ;CHECK: st3.2d { v0, v1, v2 }, [x0], #48
   call void @llvm.aarch64.neon.st3.v2i64.p0i64(<2 x i64> %B, <2 x i64> %C, <2 x i64> %D, i64* %A)
-  %tmp = getelementptr i64* %A, i64 6
+  %tmp = getelementptr i64, i64* %A, i64 6
   ret i64* %tmp
 }
 
@@ -3977,7 +3977,7 @@ define i64* @test_v2i64_post_reg_st3(i64* %A, i64** %ptr, <2 x i64> %B, <2 x i64
 ;CHECK-LABEL: test_v2i64_post_reg_st3:
 ;CHECK: st3.2d { v0, v1, v2 }, [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st3.v2i64.p0i64(<2 x i64> %B, <2 x i64> %C, <2 x i64> %D, i64* %A)
-  %tmp = getelementptr i64* %A, i64 %inc
+  %tmp = getelementptr i64, i64* %A, i64 %inc
   ret i64* %tmp
 }
 
@@ -3988,7 +3988,7 @@ define i64* @test_v1i64_post_imm_st3(i64* %A, i64** %ptr, <1 x i64> %B, <1 x i64
 ;CHECK-LABEL: test_v1i64_post_imm_st3:
 ;CHECK: st1.1d { v0, v1, v2 }, [x0], #24
   call void @llvm.aarch64.neon.st3.v1i64.p0i64(<1 x i64> %B, <1 x i64> %C, <1 x i64> %D, i64* %A)
-  %tmp = getelementptr i64* %A, i64 3
+  %tmp = getelementptr i64, i64* %A, i64 3
   ret i64* %tmp
 }
 
@@ -3996,7 +3996,7 @@ define i64* @test_v1i64_post_reg_st3(i64* %A, i64** %ptr, <1 x i64> %B, <1 x i64
 ;CHECK-LABEL: test_v1i64_post_reg_st3:
 ;CHECK: st1.1d { v0, v1, v2 }, [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st3.v1i64.p0i64(<1 x i64> %B, <1 x i64> %C, <1 x i64> %D, i64* %A)
-  %tmp = getelementptr i64* %A, i64 %inc
+  %tmp = getelementptr i64, i64* %A, i64 %inc
   ret i64* %tmp
 }
 
@@ -4007,7 +4007,7 @@ define float* @test_v4f32_post_imm_st3(float* %A, float** %ptr, <4 x float> %B,
 ;CHECK-LABEL: test_v4f32_post_imm_st3:
 ;CHECK: st3.4s { v0, v1, v2 }, [x0], #48
   call void @llvm.aarch64.neon.st3.v4f32.p0f32(<4 x float> %B, <4 x float> %C, <4 x float> %D, float* %A)
-  %tmp = getelementptr float* %A, i32 12
+  %tmp = getelementptr float, float* %A, i32 12
   ret float* %tmp
 }
 
@@ -4015,7 +4015,7 @@ define float* @test_v4f32_post_reg_st3(float* %A, float** %ptr, <4 x float> %B,
 ;CHECK-LABEL: test_v4f32_post_reg_st3:
 ;CHECK: st3.4s { v0, v1, v2 }, [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st3.v4f32.p0f32(<4 x float> %B, <4 x float> %C, <4 x float> %D, float* %A)
-  %tmp = getelementptr float* %A, i64 %inc
+  %tmp = getelementptr float, float* %A, i64 %inc
   ret float* %tmp
 }
 
@@ -4026,7 +4026,7 @@ define float* @test_v2f32_post_imm_st3(float* %A, float** %ptr, <2 x float> %B,
 ;CHECK-LABEL: test_v2f32_post_imm_st3:
 ;CHECK: st3.2s { v0, v1, v2 }, [x0], #24
   call void @llvm.aarch64.neon.st3.v2f32.p0f32(<2 x float> %B, <2 x float> %C, <2 x float> %D, float* %A)
-  %tmp = getelementptr float* %A, i32 6
+  %tmp = getelementptr float, float* %A, i32 6
   ret float* %tmp
 }
 
@@ -4034,7 +4034,7 @@ define float* @test_v2f32_post_reg_st3(float* %A, float** %ptr, <2 x float> %B,
 ;CHECK-LABEL: test_v2f32_post_reg_st3:
 ;CHECK: st3.2s { v0, v1, v2 }, [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st3.v2f32.p0f32(<2 x float> %B, <2 x float> %C, <2 x float> %D, float* %A)
-  %tmp = getelementptr float* %A, i64 %inc
+  %tmp = getelementptr float, float* %A, i64 %inc
   ret float* %tmp
 }
 
@@ -4045,7 +4045,7 @@ define double* @test_v2f64_post_imm_st3(double* %A, double** %ptr, <2 x double>
 ;CHECK-LABEL: test_v2f64_post_imm_st3:
 ;CHECK: st3.2d { v0, v1, v2 }, [x0], #48
   call void @llvm.aarch64.neon.st3.v2f64.p0f64(<2 x double> %B, <2 x double> %C, <2 x double> %D, double* %A)
-  %tmp = getelementptr double* %A, i64 6
+  %tmp = getelementptr double, double* %A, i64 6
   ret double* %tmp
 }
 
@@ -4053,7 +4053,7 @@ define double* @test_v2f64_post_reg_st3(double* %A, double** %ptr, <2 x double>
 ;CHECK-LABEL: test_v2f64_post_reg_st3:
 ;CHECK: st3.2d { v0, v1, v2 }, [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st3.v2f64.p0f64(<2 x double> %B, <2 x double> %C, <2 x double> %D, double* %A)
-  %tmp = getelementptr double* %A, i64 %inc
+  %tmp = getelementptr double, double* %A, i64 %inc
   ret double* %tmp
 }
 
@@ -4064,7 +4064,7 @@ define double* @test_v1f64_post_imm_st3(double* %A, double** %ptr, <1 x double>
 ;CHECK-LABEL: test_v1f64_post_imm_st3:
 ;CHECK: st1.1d { v0, v1, v2 }, [x0], #24
   call void @llvm.aarch64.neon.st3.v1f64.p0f64(<1 x double> %B, <1 x double> %C, <1 x double> %D, double* %A)
-  %tmp = getelementptr double* %A, i64 3
+  %tmp = getelementptr double, double* %A, i64 3
   ret double* %tmp
 }
 
@@ -4072,7 +4072,7 @@ define double* @test_v1f64_post_reg_st3(double* %A, double** %ptr, <1 x double>
 ;CHECK-LABEL: test_v1f64_post_reg_st3:
 ;CHECK: st1.1d { v0, v1, v2 }, [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st3.v1f64.p0f64(<1 x double> %B, <1 x double> %C, <1 x double> %D, double* %A)
-  %tmp = getelementptr double* %A, i64 %inc
+  %tmp = getelementptr double, double* %A, i64 %inc
   ret double* %tmp
 }
 
@@ -4083,7 +4083,7 @@ define i8* @test_v16i8_post_imm_st4(i8* %A, i8** %ptr, <16 x i8> %B, <16 x i8> %
 ;CHECK-LABEL: test_v16i8_post_imm_st4:
 ;CHECK: st4.16b { v0, v1, v2, v3 }, [x0], #64
   call void @llvm.aarch64.neon.st4.v16i8.p0i8(<16 x i8> %B, <16 x i8> %C, <16 x i8> %D, <16 x i8> %E, i8* %A)
-  %tmp = getelementptr i8* %A, i32 64
+  %tmp = getelementptr i8, i8* %A, i32 64
   ret i8* %tmp
 }
 
@@ -4091,7 +4091,7 @@ define i8* @test_v16i8_post_reg_st4(i8* %A, i8** %ptr, <16 x i8> %B, <16 x i8> %
 ;CHECK-LABEL: test_v16i8_post_reg_st4:
 ;CHECK: st4.16b { v0, v1, v2, v3 }, [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st4.v16i8.p0i8(<16 x i8> %B, <16 x i8> %C, <16 x i8> %D, <16 x i8> %E, i8* %A)
-  %tmp = getelementptr i8* %A, i64 %inc
+  %tmp = getelementptr i8, i8* %A, i64 %inc
   ret i8* %tmp
 }
 
@@ -4102,7 +4102,7 @@ define i8* @test_v8i8_post_imm_st4(i8* %A, i8** %ptr, <8 x i8> %B, <8 x i8> %C,
 ;CHECK-LABEL: test_v8i8_post_imm_st4:
 ;CHECK: st4.8b { v0, v1, v2, v3 }, [x0], #32
   call void @llvm.aarch64.neon.st4.v8i8.p0i8(<8 x i8> %B, <8 x i8> %C, <8 x i8> %D, <8 x i8> %E, i8* %A)
-  %tmp = getelementptr i8* %A, i32 32
+  %tmp = getelementptr i8, i8* %A, i32 32
   ret i8* %tmp
 }
 
@@ -4110,7 +4110,7 @@ define i8* @test_v8i8_post_reg_st4(i8* %A, i8** %ptr, <8 x i8> %B, <8 x i8> %C,
 ;CHECK-LABEL: test_v8i8_post_reg_st4:
 ;CHECK: st4.8b { v0, v1, v2, v3 }, [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st4.v8i8.p0i8(<8 x i8> %B, <8 x i8> %C, <8 x i8> %D, <8 x i8> %E, i8* %A)
-  %tmp = getelementptr i8* %A, i64 %inc
+  %tmp = getelementptr i8, i8* %A, i64 %inc
   ret i8* %tmp
 }
 
@@ -4121,7 +4121,7 @@ define i16* @test_v8i16_post_imm_st4(i16* %A, i16** %ptr, <8 x i16> %B, <8 x i16
 ;CHECK-LABEL: test_v8i16_post_imm_st4:
 ;CHECK: st4.8h { v0, v1, v2, v3 }, [x0], #64
   call void @llvm.aarch64.neon.st4.v8i16.p0i16(<8 x i16> %B, <8 x i16> %C, <8 x i16> %D, <8 x i16> %E, i16* %A)
-  %tmp = getelementptr i16* %A, i32 32
+  %tmp = getelementptr i16, i16* %A, i32 32
   ret i16* %tmp
 }
 
@@ -4129,7 +4129,7 @@ define i16* @test_v8i16_post_reg_st4(i16* %A, i16** %ptr, <8 x i16> %B, <8 x i16
 ;CHECK-LABEL: test_v8i16_post_reg_st4:
 ;CHECK: st4.8h { v0, v1, v2, v3 }, [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st4.v8i16.p0i16(<8 x i16> %B, <8 x i16> %C, <8 x i16> %D, <8 x i16> %E, i16* %A)
-  %tmp = getelementptr i16* %A, i64 %inc
+  %tmp = getelementptr i16, i16* %A, i64 %inc
   ret i16* %tmp
 }
 
@@ -4140,7 +4140,7 @@ define i16* @test_v4i16_post_imm_st4(i16* %A, i16** %ptr, <4 x i16> %B, <4 x i16
 ;CHECK-LABEL: test_v4i16_post_imm_st4:
 ;CHECK: st4.4h { v0, v1, v2, v3 }, [x0], #32
   call void @llvm.aarch64.neon.st4.v4i16.p0i16(<4 x i16> %B, <4 x i16> %C, <4 x i16> %D, <4 x i16> %E, i16* %A)
-  %tmp = getelementptr i16* %A, i32 16
+  %tmp = getelementptr i16, i16* %A, i32 16
   ret i16* %tmp
 }
 
@@ -4148,7 +4148,7 @@ define i16* @test_v4i16_post_reg_st4(i16* %A, i16** %ptr, <4 x i16> %B, <4 x i16
 ;CHECK-LABEL: test_v4i16_post_reg_st4:
 ;CHECK: st4.4h { v0, v1, v2, v3 }, [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st4.v4i16.p0i16(<4 x i16> %B, <4 x i16> %C, <4 x i16> %D, <4 x i16> %E, i16* %A)
-  %tmp = getelementptr i16* %A, i64 %inc
+  %tmp = getelementptr i16, i16* %A, i64 %inc
   ret i16* %tmp
 }
 
@@ -4159,7 +4159,7 @@ define i32* @test_v4i32_post_imm_st4(i32* %A, i32** %ptr, <4 x i32> %B, <4 x i32
 ;CHECK-LABEL: test_v4i32_post_imm_st4:
 ;CHECK: st4.4s { v0, v1, v2, v3 }, [x0], #64
   call void @llvm.aarch64.neon.st4.v4i32.p0i32(<4 x i32> %B, <4 x i32> %C, <4 x i32> %D, <4 x i32> %E, i32* %A)
-  %tmp = getelementptr i32* %A, i32 16
+  %tmp = getelementptr i32, i32* %A, i32 16
   ret i32* %tmp
 }
 
@@ -4167,7 +4167,7 @@ define i32* @test_v4i32_post_reg_st4(i32* %A, i32** %ptr, <4 x i32> %B, <4 x i32
 ;CHECK-LABEL: test_v4i32_post_reg_st4:
 ;CHECK: st4.4s { v0, v1, v2, v3 }, [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st4.v4i32.p0i32(<4 x i32> %B, <4 x i32> %C, <4 x i32> %D, <4 x i32> %E, i32* %A)
-  %tmp = getelementptr i32* %A, i64 %inc
+  %tmp = getelementptr i32, i32* %A, i64 %inc
   ret i32* %tmp
 }
 
@@ -4178,7 +4178,7 @@ define i32* @test_v2i32_post_imm_st4(i32* %A, i32** %ptr, <2 x i32> %B, <2 x i32
 ;CHECK-LABEL: test_v2i32_post_imm_st4:
 ;CHECK: st4.2s { v0, v1, v2, v3 }, [x0], #32
   call void @llvm.aarch64.neon.st4.v2i32.p0i32(<2 x i32> %B, <2 x i32> %C, <2 x i32> %D, <2 x i32> %E, i32* %A)
-  %tmp = getelementptr i32* %A, i32 8
+  %tmp = getelementptr i32, i32* %A, i32 8
   ret i32* %tmp
 }
 
@@ -4186,7 +4186,7 @@ define i32* @test_v2i32_post_reg_st4(i32* %A, i32** %ptr, <2 x i32> %B, <2 x i32
 ;CHECK-LABEL: test_v2i32_post_reg_st4:
 ;CHECK: st4.2s { v0, v1, v2, v3 }, [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st4.v2i32.p0i32(<2 x i32> %B, <2 x i32> %C, <2 x i32> %D, <2 x i32> %E, i32* %A)
-  %tmp = getelementptr i32* %A, i64 %inc
+  %tmp = getelementptr i32, i32* %A, i64 %inc
   ret i32* %tmp
 }
 
@@ -4197,7 +4197,7 @@ define i64* @test_v2i64_post_imm_st4(i64* %A, i64** %ptr, <2 x i64> %B, <2 x i64
 ;CHECK-LABEL: test_v2i64_post_imm_st4:
 ;CHECK: st4.2d { v0, v1, v2, v3 }, [x0], #64
   call void @llvm.aarch64.neon.st4.v2i64.p0i64(<2 x i64> %B, <2 x i64> %C, <2 x i64> %D, <2 x i64> %E, i64* %A)
-  %tmp = getelementptr i64* %A, i64 8
+  %tmp = getelementptr i64, i64* %A, i64 8
   ret i64* %tmp
 }
 
@@ -4205,7 +4205,7 @@ define i64* @test_v2i64_post_reg_st4(i64* %A, i64** %ptr, <2 x i64> %B, <2 x i64
 ;CHECK-LABEL: test_v2i64_post_reg_st4:
 ;CHECK: st4.2d { v0, v1, v2, v3 }, [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st4.v2i64.p0i64(<2 x i64> %B, <2 x i64> %C, <2 x i64> %D, <2 x i64> %E, i64* %A)
-  %tmp = getelementptr i64* %A, i64 %inc
+  %tmp = getelementptr i64, i64* %A, i64 %inc
   ret i64* %tmp
 }
 
@@ -4216,7 +4216,7 @@ define i64* @test_v1i64_post_imm_st4(i64* %A, i64** %ptr, <1 x i64> %B, <1 x i64
 ;CHECK-LABEL: test_v1i64_post_imm_st4:
 ;CHECK: st1.1d { v0, v1, v2, v3 }, [x0], #32
   call void @llvm.aarch64.neon.st4.v1i64.p0i64(<1 x i64> %B, <1 x i64> %C, <1 x i64> %D, <1 x i64> %E, i64* %A)
-  %tmp = getelementptr i64* %A, i64 4
+  %tmp = getelementptr i64, i64* %A, i64 4
   ret i64* %tmp
 }
 
@@ -4224,7 +4224,7 @@ define i64* @test_v1i64_post_reg_st4(i64* %A, i64** %ptr, <1 x i64> %B, <1 x i64
 ;CHECK-LABEL: test_v1i64_post_reg_st4:
 ;CHECK: st1.1d { v0, v1, v2, v3 }, [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st4.v1i64.p0i64(<1 x i64> %B, <1 x i64> %C, <1 x i64> %D, <1 x i64> %E, i64* %A)
-  %tmp = getelementptr i64* %A, i64 %inc
+  %tmp = getelementptr i64, i64* %A, i64 %inc
   ret i64* %tmp
 }
 
@@ -4235,7 +4235,7 @@ define float* @test_v4f32_post_imm_st4(float* %A, float** %ptr, <4 x float> %B,
 ;CHECK-LABEL: test_v4f32_post_imm_st4:
 ;CHECK: st4.4s { v0, v1, v2, v3 }, [x0], #64
   call void @llvm.aarch64.neon.st4.v4f32.p0f32(<4 x float> %B, <4 x float> %C, <4 x float> %D, <4 x float> %E, float* %A)
-  %tmp = getelementptr float* %A, i32 16
+  %tmp = getelementptr float, float* %A, i32 16
   ret float* %tmp
 }
 
@@ -4243,7 +4243,7 @@ define float* @test_v4f32_post_reg_st4(float* %A, float** %ptr, <4 x float> %B,
 ;CHECK-LABEL: test_v4f32_post_reg_st4:
 ;CHECK: st4.4s { v0, v1, v2, v3 }, [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st4.v4f32.p0f32(<4 x float> %B, <4 x float> %C, <4 x float> %D, <4 x float> %E, float* %A)
-  %tmp = getelementptr float* %A, i64 %inc
+  %tmp = getelementptr float, float* %A, i64 %inc
   ret float* %tmp
 }
 
@@ -4254,7 +4254,7 @@ define float* @test_v2f32_post_imm_st4(float* %A, float** %ptr, <2 x float> %B,
 ;CHECK-LABEL: test_v2f32_post_imm_st4:
 ;CHECK: st4.2s { v0, v1, v2, v3 }, [x0], #32
   call void @llvm.aarch64.neon.st4.v2f32.p0f32(<2 x float> %B, <2 x float> %C, <2 x float> %D, <2 x float> %E, float* %A)
-  %tmp = getelementptr float* %A, i32 8
+  %tmp = getelementptr float, float* %A, i32 8
   ret float* %tmp
 }
 
@@ -4262,7 +4262,7 @@ define float* @test_v2f32_post_reg_st4(float* %A, float** %ptr, <2 x float> %B,
 ;CHECK-LABEL: test_v2f32_post_reg_st4:
 ;CHECK: st4.2s { v0, v1, v2, v3 }, [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st4.v2f32.p0f32(<2 x float> %B, <2 x float> %C, <2 x float> %D, <2 x float> %E, float* %A)
-  %tmp = getelementptr float* %A, i64 %inc
+  %tmp = getelementptr float, float* %A, i64 %inc
   ret float* %tmp
 }
 
@@ -4273,7 +4273,7 @@ define double* @test_v2f64_post_imm_st4(double* %A, double** %ptr, <2 x double>
 ;CHECK-LABEL: test_v2f64_post_imm_st4:
 ;CHECK: st4.2d { v0, v1, v2, v3 }, [x0], #64
   call void @llvm.aarch64.neon.st4.v2f64.p0f64(<2 x double> %B, <2 x double> %C, <2 x double> %D, <2 x double> %E, double* %A)
-  %tmp = getelementptr double* %A, i64 8
+  %tmp = getelementptr double, double* %A, i64 8
   ret double* %tmp
 }
 
@@ -4281,7 +4281,7 @@ define double* @test_v2f64_post_reg_st4(double* %A, double** %ptr, <2 x double>
 ;CHECK-LABEL: test_v2f64_post_reg_st4:
 ;CHECK: st4.2d { v0, v1, v2, v3 }, [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st4.v2f64.p0f64(<2 x double> %B, <2 x double> %C, <2 x double> %D, <2 x double> %E, double* %A)
-  %tmp = getelementptr double* %A, i64 %inc
+  %tmp = getelementptr double, double* %A, i64 %inc
   ret double* %tmp
 }
 
@@ -4292,7 +4292,7 @@ define double* @test_v1f64_post_imm_st4(double* %A, double** %ptr, <1 x double>
 ;CHECK-LABEL: test_v1f64_post_imm_st4:
 ;CHECK: st1.1d { v0, v1, v2, v3 }, [x0], #32
   call void @llvm.aarch64.neon.st4.v1f64.p0f64(<1 x double> %B, <1 x double> %C, <1 x double> %D, <1 x double> %E, double* %A)
-  %tmp = getelementptr double* %A, i64 4
+  %tmp = getelementptr double, double* %A, i64 4
   ret double* %tmp
 }
 
@@ -4300,7 +4300,7 @@ define double* @test_v1f64_post_reg_st4(double* %A, double** %ptr, <1 x double>
 ;CHECK-LABEL: test_v1f64_post_reg_st4:
 ;CHECK: st1.1d { v0, v1, v2, v3 }, [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st4.v1f64.p0f64(<1 x double> %B, <1 x double> %C, <1 x double> %D, <1 x double> %E, double* %A)
-  %tmp = getelementptr double* %A, i64 %inc
+  %tmp = getelementptr double, double* %A, i64 %inc
   ret double* %tmp
 }
 
@@ -4311,7 +4311,7 @@ define i8* @test_v16i8_post_imm_st1x2(i8* %A, i8** %ptr, <16 x i8> %B, <16 x i8>
 ;CHECK-LABEL: test_v16i8_post_imm_st1x2:
 ;CHECK: st1.16b { v0, v1 }, [x0], #32
   call void @llvm.aarch64.neon.st1x2.v16i8.p0i8(<16 x i8> %B, <16 x i8> %C, i8* %A)
-  %tmp = getelementptr i8* %A, i32 32
+  %tmp = getelementptr i8, i8* %A, i32 32
   ret i8* %tmp
 }
 
@@ -4319,7 +4319,7 @@ define i8* @test_v16i8_post_reg_st1x2(i8* %A, i8** %ptr, <16 x i8> %B, <16 x i8>
 ;CHECK-LABEL: test_v16i8_post_reg_st1x2:
 ;CHECK: st1.16b { v0, v1 }, [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st1x2.v16i8.p0i8(<16 x i8> %B, <16 x i8> %C, i8* %A)
-  %tmp = getelementptr i8* %A, i64 %inc
+  %tmp = getelementptr i8, i8* %A, i64 %inc
   ret i8* %tmp
 }
 
@@ -4330,7 +4330,7 @@ define i8* @test_v8i8_post_imm_st1x2(i8* %A, i8** %ptr, <8 x i8> %B, <8 x i8> %C
 ;CHECK-LABEL: test_v8i8_post_imm_st1x2:
 ;CHECK: st1.8b { v0, v1 }, [x0], #16
   call void @llvm.aarch64.neon.st1x2.v8i8.p0i8(<8 x i8> %B, <8 x i8> %C, i8* %A)
-  %tmp = getelementptr i8* %A, i32 16
+  %tmp = getelementptr i8, i8* %A, i32 16
   ret i8* %tmp
 }
 
@@ -4338,7 +4338,7 @@ define i8* @test_v8i8_post_reg_st1x2(i8* %A, i8** %ptr, <8 x i8> %B, <8 x i8> %C
 ;CHECK-LABEL: test_v8i8_post_reg_st1x2:
 ;CHECK: st1.8b { v0, v1 }, [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st1x2.v8i8.p0i8(<8 x i8> %B, <8 x i8> %C, i8* %A)
-  %tmp = getelementptr i8* %A, i64 %inc
+  %tmp = getelementptr i8, i8* %A, i64 %inc
   ret i8* %tmp
 }
 
@@ -4349,7 +4349,7 @@ define i16* @test_v8i16_post_imm_st1x2(i16* %A, i16** %ptr, <8 x i16> %B, <8 x i
 ;CHECK-LABEL: test_v8i16_post_imm_st1x2:
 ;CHECK: st1.8h { v0, v1 }, [x0], #32
   call void @llvm.aarch64.neon.st1x2.v8i16.p0i16(<8 x i16> %B, <8 x i16> %C, i16* %A)
-  %tmp = getelementptr i16* %A, i32 16
+  %tmp = getelementptr i16, i16* %A, i32 16
   ret i16* %tmp
 }
 
@@ -4357,7 +4357,7 @@ define i16* @test_v8i16_post_reg_st1x2(i16* %A, i16** %ptr, <8 x i16> %B, <8 x i
 ;CHECK-LABEL: test_v8i16_post_reg_st1x2:
 ;CHECK: st1.8h { v0, v1 }, [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st1x2.v8i16.p0i16(<8 x i16> %B, <8 x i16> %C, i16* %A)
-  %tmp = getelementptr i16* %A, i64 %inc
+  %tmp = getelementptr i16, i16* %A, i64 %inc
   ret i16* %tmp
 }
 
@@ -4368,7 +4368,7 @@ define i16* @test_v4i16_post_imm_st1x2(i16* %A, i16** %ptr, <4 x i16> %B, <4 x i
 ;CHECK-LABEL: test_v4i16_post_imm_st1x2:
 ;CHECK: st1.4h { v0, v1 }, [x0], #16
   call void @llvm.aarch64.neon.st1x2.v4i16.p0i16(<4 x i16> %B, <4 x i16> %C, i16* %A)
-  %tmp = getelementptr i16* %A, i32 8
+  %tmp = getelementptr i16, i16* %A, i32 8
   ret i16* %tmp
 }
 
@@ -4376,7 +4376,7 @@ define i16* @test_v4i16_post_reg_st1x2(i16* %A, i16** %ptr, <4 x i16> %B, <4 x i
 ;CHECK-LABEL: test_v4i16_post_reg_st1x2:
 ;CHECK: st1.4h { v0, v1 }, [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st1x2.v4i16.p0i16(<4 x i16> %B, <4 x i16> %C, i16* %A)
-  %tmp = getelementptr i16* %A, i64 %inc
+  %tmp = getelementptr i16, i16* %A, i64 %inc
   ret i16* %tmp
 }
 
@@ -4387,7 +4387,7 @@ define i32* @test_v4i32_post_imm_st1x2(i32* %A, i32** %ptr, <4 x i32> %B, <4 x i
 ;CHECK-LABEL: test_v4i32_post_imm_st1x2:
 ;CHECK: st1.4s { v0, v1 }, [x0], #32
   call void @llvm.aarch64.neon.st1x2.v4i32.p0i32(<4 x i32> %B, <4 x i32> %C, i32* %A)
-  %tmp = getelementptr i32* %A, i32 8
+  %tmp = getelementptr i32, i32* %A, i32 8
   ret i32* %tmp
 }
 
@@ -4395,7 +4395,7 @@ define i32* @test_v4i32_post_reg_st1x2(i32* %A, i32** %ptr, <4 x i32> %B, <4 x i
 ;CHECK-LABEL: test_v4i32_post_reg_st1x2:
 ;CHECK: st1.4s { v0, v1 }, [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st1x2.v4i32.p0i32(<4 x i32> %B, <4 x i32> %C, i32* %A)
-  %tmp = getelementptr i32* %A, i64 %inc
+  %tmp = getelementptr i32, i32* %A, i64 %inc
   ret i32* %tmp
 }
 
@@ -4406,7 +4406,7 @@ define i32* @test_v2i32_post_imm_st1x2(i32* %A, i32** %ptr, <2 x i32> %B, <2 x i
 ;CHECK-LABEL: test_v2i32_post_imm_st1x2:
 ;CHECK: st1.2s { v0, v1 }, [x0], #16
   call void @llvm.aarch64.neon.st1x2.v2i32.p0i32(<2 x i32> %B, <2 x i32> %C, i32* %A)
-  %tmp = getelementptr i32* %A, i32 4
+  %tmp = getelementptr i32, i32* %A, i32 4
   ret i32* %tmp
 }
 
@@ -4414,7 +4414,7 @@ define i32* @test_v2i32_post_reg_st1x2(i32* %A, i32** %ptr, <2 x i32> %B, <2 x i
 ;CHECK-LABEL: test_v2i32_post_reg_st1x2:
 ;CHECK: st1.2s { v0, v1 }, [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st1x2.v2i32.p0i32(<2 x i32> %B, <2 x i32> %C, i32* %A)
-  %tmp = getelementptr i32* %A, i64 %inc
+  %tmp = getelementptr i32, i32* %A, i64 %inc
   ret i32* %tmp
 }
 
@@ -4425,7 +4425,7 @@ define i64* @test_v2i64_post_imm_st1x2(i64* %A, i64** %ptr, <2 x i64> %B, <2 x i
 ;CHECK-LABEL: test_v2i64_post_imm_st1x2:
 ;CHECK: st1.2d { v0, v1 }, [x0], #32
   call void @llvm.aarch64.neon.st1x2.v2i64.p0i64(<2 x i64> %B, <2 x i64> %C, i64* %A)
-  %tmp = getelementptr i64* %A, i64 4
+  %tmp = getelementptr i64, i64* %A, i64 4
   ret i64* %tmp
 }
 
@@ -4433,7 +4433,7 @@ define i64* @test_v2i64_post_reg_st1x2(i64* %A, i64** %ptr, <2 x i64> %B, <2 x i
 ;CHECK-LABEL: test_v2i64_post_reg_st1x2:
 ;CHECK: st1.2d { v0, v1 }, [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st1x2.v2i64.p0i64(<2 x i64> %B, <2 x i64> %C, i64* %A)
-  %tmp = getelementptr i64* %A, i64 %inc
+  %tmp = getelementptr i64, i64* %A, i64 %inc
   ret i64* %tmp
 }
 
@@ -4444,7 +4444,7 @@ define i64* @test_v1i64_post_imm_st1x2(i64* %A, i64** %ptr, <1 x i64> %B, <1 x i
 ;CHECK-LABEL: test_v1i64_post_imm_st1x2:
 ;CHECK: st1.1d { v0, v1 }, [x0], #16
   call void @llvm.aarch64.neon.st1x2.v1i64.p0i64(<1 x i64> %B, <1 x i64> %C, i64* %A)
-  %tmp = getelementptr i64* %A, i64 2
+  %tmp = getelementptr i64, i64* %A, i64 2
   ret i64* %tmp
 }
 
@@ -4452,7 +4452,7 @@ define i64* @test_v1i64_post_reg_st1x2(i64* %A, i64** %ptr, <1 x i64> %B, <1 x i
 ;CHECK-LABEL: test_v1i64_post_reg_st1x2:
 ;CHECK: st1.1d { v0, v1 }, [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st1x2.v1i64.p0i64(<1 x i64> %B, <1 x i64> %C, i64* %A)
-  %tmp = getelementptr i64* %A, i64 %inc
+  %tmp = getelementptr i64, i64* %A, i64 %inc
   ret i64* %tmp
 }
 
@@ -4463,7 +4463,7 @@ define float* @test_v4f32_post_imm_st1x2(float* %A, float** %ptr, <4 x float> %B
 ;CHECK-LABEL: test_v4f32_post_imm_st1x2:
 ;CHECK: st1.4s { v0, v1 }, [x0], #32
   call void @llvm.aarch64.neon.st1x2.v4f32.p0f32(<4 x float> %B, <4 x float> %C, float* %A)
-  %tmp = getelementptr float* %A, i32 8
+  %tmp = getelementptr float, float* %A, i32 8
   ret float* %tmp
 }
 
@@ -4471,7 +4471,7 @@ define float* @test_v4f32_post_reg_st1x2(float* %A, float** %ptr, <4 x float> %B
 ;CHECK-LABEL: test_v4f32_post_reg_st1x2:
 ;CHECK: st1.4s { v0, v1 }, [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st1x2.v4f32.p0f32(<4 x float> %B, <4 x float> %C, float* %A)
-  %tmp = getelementptr float* %A, i64 %inc
+  %tmp = getelementptr float, float* %A, i64 %inc
   ret float* %tmp
 }
 
@@ -4482,7 +4482,7 @@ define float* @test_v2f32_post_imm_st1x2(float* %A, float** %ptr, <2 x float> %B
 ;CHECK-LABEL: test_v2f32_post_imm_st1x2:
 ;CHECK: st1.2s { v0, v1 }, [x0], #16
   call void @llvm.aarch64.neon.st1x2.v2f32.p0f32(<2 x float> %B, <2 x float> %C, float* %A)
-  %tmp = getelementptr float* %A, i32 4
+  %tmp = getelementptr float, float* %A, i32 4
   ret float* %tmp
 }
 
@@ -4490,7 +4490,7 @@ define float* @test_v2f32_post_reg_st1x2(float* %A, float** %ptr, <2 x float> %B
 ;CHECK-LABEL: test_v2f32_post_reg_st1x2:
 ;CHECK: st1.2s { v0, v1 }, [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st1x2.v2f32.p0f32(<2 x float> %B, <2 x float> %C, float* %A)
-  %tmp = getelementptr float* %A, i64 %inc
+  %tmp = getelementptr float, float* %A, i64 %inc
   ret float* %tmp
 }
 
@@ -4501,7 +4501,7 @@ define double* @test_v2f64_post_imm_st1x2(double* %A, double** %ptr, <2 x double
 ;CHECK-LABEL: test_v2f64_post_imm_st1x2:
 ;CHECK: st1.2d { v0, v1 }, [x0], #32
   call void @llvm.aarch64.neon.st1x2.v2f64.p0f64(<2 x double> %B, <2 x double> %C, double* %A)
-  %tmp = getelementptr double* %A, i64 4
+  %tmp = getelementptr double, double* %A, i64 4
   ret double* %tmp
 }
 
@@ -4509,7 +4509,7 @@ define double* @test_v2f64_post_reg_st1x2(double* %A, double** %ptr, <2 x double
 ;CHECK-LABEL: test_v2f64_post_reg_st1x2:
 ;CHECK: st1.2d { v0, v1 }, [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st1x2.v2f64.p0f64(<2 x double> %B, <2 x double> %C, double* %A)
-  %tmp = getelementptr double* %A, i64 %inc
+  %tmp = getelementptr double, double* %A, i64 %inc
   ret double* %tmp
 }
 
@@ -4520,7 +4520,7 @@ define double* @test_v1f64_post_imm_st1x2(double* %A, double** %ptr, <1 x double
 ;CHECK-LABEL: test_v1f64_post_imm_st1x2:
 ;CHECK: st1.1d { v0, v1 }, [x0], #16
   call void @llvm.aarch64.neon.st1x2.v1f64.p0f64(<1 x double> %B, <1 x double> %C, double* %A)
-  %tmp = getelementptr double* %A, i64 2
+  %tmp = getelementptr double, double* %A, i64 2
   ret double* %tmp
 }
 
@@ -4528,7 +4528,7 @@ define double* @test_v1f64_post_reg_st1x2(double* %A, double** %ptr, <1 x double
 ;CHECK-LABEL: test_v1f64_post_reg_st1x2:
 ;CHECK: st1.1d { v0, v1 }, [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st1x2.v1f64.p0f64(<1 x double> %B, <1 x double> %C, double* %A)
-  %tmp = getelementptr double* %A, i64 %inc
+  %tmp = getelementptr double, double* %A, i64 %inc
   ret double* %tmp
 }
 
@@ -4539,7 +4539,7 @@ define i8* @test_v16i8_post_imm_st1x3(i8* %A, i8** %ptr, <16 x i8> %B, <16 x i8>
 ;CHECK-LABEL: test_v16i8_post_imm_st1x3:
 ;CHECK: st1.16b { v0, v1, v2 }, [x0], #48
   call void @llvm.aarch64.neon.st1x3.v16i8.p0i8(<16 x i8> %B, <16 x i8> %C, <16 x i8> %D, i8* %A)
-  %tmp = getelementptr i8* %A, i32 48
+  %tmp = getelementptr i8, i8* %A, i32 48
   ret i8* %tmp
 }
 
@@ -4547,7 +4547,7 @@ define i8* @test_v16i8_post_reg_st1x3(i8* %A, i8** %ptr, <16 x i8> %B, <16 x i8>
 ;CHECK-LABEL: test_v16i8_post_reg_st1x3:
 ;CHECK: st1.16b { v0, v1, v2 }, [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st1x3.v16i8.p0i8(<16 x i8> %B, <16 x i8> %C, <16 x i8> %D, i8* %A)
-  %tmp = getelementptr i8* %A, i64 %inc
+  %tmp = getelementptr i8, i8* %A, i64 %inc
   ret i8* %tmp
 }
 
@@ -4558,7 +4558,7 @@ define i8* @test_v8i8_post_imm_st1x3(i8* %A, i8** %ptr, <8 x i8> %B, <8 x i8> %C
 ;CHECK-LABEL: test_v8i8_post_imm_st1x3:
 ;CHECK: st1.8b { v0, v1, v2 }, [x0], #24
   call void @llvm.aarch64.neon.st1x3.v8i8.p0i8(<8 x i8> %B, <8 x i8> %C, <8 x i8> %D, i8* %A)
-  %tmp = getelementptr i8* %A, i32 24
+  %tmp = getelementptr i8, i8* %A, i32 24
   ret i8* %tmp
 }
 
@@ -4566,7 +4566,7 @@ define i8* @test_v8i8_post_reg_st1x3(i8* %A, i8** %ptr, <8 x i8> %B, <8 x i8> %C
 ;CHECK-LABEL: test_v8i8_post_reg_st1x3:
 ;CHECK: st1.8b { v0, v1, v2 }, [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st1x3.v8i8.p0i8(<8 x i8> %B, <8 x i8> %C, <8 x i8> %D, i8* %A)
-  %tmp = getelementptr i8* %A, i64 %inc
+  %tmp = getelementptr i8, i8* %A, i64 %inc
   ret i8* %tmp
 }
 
@@ -4577,7 +4577,7 @@ define i16* @test_v8i16_post_imm_st1x3(i16* %A, i16** %ptr, <8 x i16> %B, <8 x i
 ;CHECK-LABEL: test_v8i16_post_imm_st1x3:
 ;CHECK: st1.8h { v0, v1, v2 }, [x0], #48
   call void @llvm.aarch64.neon.st1x3.v8i16.p0i16(<8 x i16> %B, <8 x i16> %C, <8 x i16> %D, i16* %A)
-  %tmp = getelementptr i16* %A, i32 24
+  %tmp = getelementptr i16, i16* %A, i32 24
   ret i16* %tmp
 }
 
@@ -4585,7 +4585,7 @@ define i16* @test_v8i16_post_reg_st1x3(i16* %A, i16** %ptr, <8 x i16> %B, <8 x i
 ;CHECK-LABEL: test_v8i16_post_reg_st1x3:
 ;CHECK: st1.8h { v0, v1, v2 }, [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st1x3.v8i16.p0i16(<8 x i16> %B, <8 x i16> %C, <8 x i16> %D, i16* %A)
-  %tmp = getelementptr i16* %A, i64 %inc
+  %tmp = getelementptr i16, i16* %A, i64 %inc
   ret i16* %tmp
 }
 
@@ -4596,7 +4596,7 @@ define i16* @test_v4i16_post_imm_st1x3(i16* %A, i16** %ptr, <4 x i16> %B, <4 x i
 ;CHECK-LABEL: test_v4i16_post_imm_st1x3:
 ;CHECK: st1.4h { v0, v1, v2 }, [x0], #24
   call void @llvm.aarch64.neon.st1x3.v4i16.p0i16(<4 x i16> %B, <4 x i16> %C, <4 x i16> %D, i16* %A)
-  %tmp = getelementptr i16* %A, i32 12
+  %tmp = getelementptr i16, i16* %A, i32 12
   ret i16* %tmp
 }
 
@@ -4604,7 +4604,7 @@ define i16* @test_v4i16_post_reg_st1x3(i16* %A, i16** %ptr, <4 x i16> %B, <4 x i
 ;CHECK-LABEL: test_v4i16_post_reg_st1x3:
 ;CHECK: st1.4h { v0, v1, v2 }, [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st1x3.v4i16.p0i16(<4 x i16> %B, <4 x i16> %C, <4 x i16> %D, i16* %A)
-  %tmp = getelementptr i16* %A, i64 %inc
+  %tmp = getelementptr i16, i16* %A, i64 %inc
   ret i16* %tmp
 }
 
@@ -4615,7 +4615,7 @@ define i32* @test_v4i32_post_imm_st1x3(i32* %A, i32** %ptr, <4 x i32> %B, <4 x i
 ;CHECK-LABEL: test_v4i32_post_imm_st1x3:
 ;CHECK: st1.4s { v0, v1, v2 }, [x0], #48
   call void @llvm.aarch64.neon.st1x3.v4i32.p0i32(<4 x i32> %B, <4 x i32> %C, <4 x i32> %D, i32* %A)
-  %tmp = getelementptr i32* %A, i32 12
+  %tmp = getelementptr i32, i32* %A, i32 12
   ret i32* %tmp
 }
 
@@ -4623,7 +4623,7 @@ define i32* @test_v4i32_post_reg_st1x3(i32* %A, i32** %ptr, <4 x i32> %B, <4 x i
 ;CHECK-LABEL: test_v4i32_post_reg_st1x3:
 ;CHECK: st1.4s { v0, v1, v2 }, [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st1x3.v4i32.p0i32(<4 x i32> %B, <4 x i32> %C, <4 x i32> %D, i32* %A)
-  %tmp = getelementptr i32* %A, i64 %inc
+  %tmp = getelementptr i32, i32* %A, i64 %inc
   ret i32* %tmp
 }
 
@@ -4634,7 +4634,7 @@ define i32* @test_v2i32_post_imm_st1x3(i32* %A, i32** %ptr, <2 x i32> %B, <2 x i
 ;CHECK-LABEL: test_v2i32_post_imm_st1x3:
 ;CHECK: st1.2s { v0, v1, v2 }, [x0], #24
   call void @llvm.aarch64.neon.st1x3.v2i32.p0i32(<2 x i32> %B, <2 x i32> %C, <2 x i32> %D, i32* %A)
-  %tmp = getelementptr i32* %A, i32 6
+  %tmp = getelementptr i32, i32* %A, i32 6
   ret i32* %tmp
 }
 
@@ -4642,7 +4642,7 @@ define i32* @test_v2i32_post_reg_st1x3(i32* %A, i32** %ptr, <2 x i32> %B, <2 x i
 ;CHECK-LABEL: test_v2i32_post_reg_st1x3:
 ;CHECK: st1.2s { v0, v1, v2 }, [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st1x3.v2i32.p0i32(<2 x i32> %B, <2 x i32> %C, <2 x i32> %D, i32* %A)
-  %tmp = getelementptr i32* %A, i64 %inc
+  %tmp = getelementptr i32, i32* %A, i64 %inc
   ret i32* %tmp
 }
 
@@ -4653,7 +4653,7 @@ define i64* @test_v2i64_post_imm_st1x3(i64* %A, i64** %ptr, <2 x i64> %B, <2 x i
 ;CHECK-LABEL: test_v2i64_post_imm_st1x3:
 ;CHECK: st1.2d { v0, v1, v2 }, [x0], #48
   call void @llvm.aarch64.neon.st1x3.v2i64.p0i64(<2 x i64> %B, <2 x i64> %C, <2 x i64> %D, i64* %A)
-  %tmp = getelementptr i64* %A, i64 6
+  %tmp = getelementptr i64, i64* %A, i64 6
   ret i64* %tmp
 }
 
@@ -4661,7 +4661,7 @@ define i64* @test_v2i64_post_reg_st1x3(i64* %A, i64** %ptr, <2 x i64> %B, <2 x i
 ;CHECK-LABEL: test_v2i64_post_reg_st1x3:
 ;CHECK: st1.2d { v0, v1, v2 }, [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st1x3.v2i64.p0i64(<2 x i64> %B, <2 x i64> %C, <2 x i64> %D, i64* %A)
-  %tmp = getelementptr i64* %A, i64 %inc
+  %tmp = getelementptr i64, i64* %A, i64 %inc
   ret i64* %tmp
 }
 
@@ -4672,7 +4672,7 @@ define i64* @test_v1i64_post_imm_st1x3(i64* %A, i64** %ptr, <1 x i64> %B, <1 x i
 ;CHECK-LABEL: test_v1i64_post_imm_st1x3:
 ;CHECK: st1.1d { v0, v1, v2 }, [x0], #24
   call void @llvm.aarch64.neon.st1x3.v1i64.p0i64(<1 x i64> %B, <1 x i64> %C, <1 x i64> %D, i64* %A)
-  %tmp = getelementptr i64* %A, i64 3
+  %tmp = getelementptr i64, i64* %A, i64 3
   ret i64* %tmp
 }
 
@@ -4680,7 +4680,7 @@ define i64* @test_v1i64_post_reg_st1x3(i64* %A, i64** %ptr, <1 x i64> %B, <1 x i
 ;CHECK-LABEL: test_v1i64_post_reg_st1x3:
 ;CHECK: st1.1d { v0, v1, v2 }, [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st1x3.v1i64.p0i64(<1 x i64> %B, <1 x i64> %C, <1 x i64> %D, i64* %A)
-  %tmp = getelementptr i64* %A, i64 %inc
+  %tmp = getelementptr i64, i64* %A, i64 %inc
   ret i64* %tmp
 }
 
@@ -4691,7 +4691,7 @@ define float* @test_v4f32_post_imm_st1x3(float* %A, float** %ptr, <4 x float> %B
 ;CHECK-LABEL: test_v4f32_post_imm_st1x3:
 ;CHECK: st1.4s { v0, v1, v2 }, [x0], #48
   call void @llvm.aarch64.neon.st1x3.v4f32.p0f32(<4 x float> %B, <4 x float> %C, <4 x float> %D, float* %A)
-  %tmp = getelementptr float* %A, i32 12
+  %tmp = getelementptr float, float* %A, i32 12
   ret float* %tmp
 }
 
@@ -4699,7 +4699,7 @@ define float* @test_v4f32_post_reg_st1x3(float* %A, float** %ptr, <4 x float> %B
 ;CHECK-LABEL: test_v4f32_post_reg_st1x3:
 ;CHECK: st1.4s { v0, v1, v2 }, [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st1x3.v4f32.p0f32(<4 x float> %B, <4 x float> %C, <4 x float> %D, float* %A)
-  %tmp = getelementptr float* %A, i64 %inc
+  %tmp = getelementptr float, float* %A, i64 %inc
   ret float* %tmp
 }
 
@@ -4710,7 +4710,7 @@ define float* @test_v2f32_post_imm_st1x3(float* %A, float** %ptr, <2 x float> %B
 ;CHECK-LABEL: test_v2f32_post_imm_st1x3:
 ;CHECK: st1.2s { v0, v1, v2 }, [x0], #24
   call void @llvm.aarch64.neon.st1x3.v2f32.p0f32(<2 x float> %B, <2 x float> %C, <2 x float> %D, float* %A)
-  %tmp = getelementptr float* %A, i32 6
+  %tmp = getelementptr float, float* %A, i32 6
   ret float* %tmp
 }
 
@@ -4718,7 +4718,7 @@ define float* @test_v2f32_post_reg_st1x3(float* %A, float** %ptr, <2 x float> %B
 ;CHECK-LABEL: test_v2f32_post_reg_st1x3:
 ;CHECK: st1.2s { v0, v1, v2 }, [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st1x3.v2f32.p0f32(<2 x float> %B, <2 x float> %C, <2 x float> %D, float* %A)
-  %tmp = getelementptr float* %A, i64 %inc
+  %tmp = getelementptr float, float* %A, i64 %inc
   ret float* %tmp
 }
 
@@ -4729,7 +4729,7 @@ define double* @test_v2f64_post_imm_st1x3(double* %A, double** %ptr, <2 x double
 ;CHECK-LABEL: test_v2f64_post_imm_st1x3:
 ;CHECK: st1.2d { v0, v1, v2 }, [x0], #48
   call void @llvm.aarch64.neon.st1x3.v2f64.p0f64(<2 x double> %B, <2 x double> %C, <2 x double> %D, double* %A)
-  %tmp = getelementptr double* %A, i64 6
+  %tmp = getelementptr double, double* %A, i64 6
   ret double* %tmp
 }
 
@@ -4737,7 +4737,7 @@ define double* @test_v2f64_post_reg_st1x3(double* %A, double** %ptr, <2 x double
 ;CHECK-LABEL: test_v2f64_post_reg_st1x3:
 ;CHECK: st1.2d { v0, v1, v2 }, [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st1x3.v2f64.p0f64(<2 x double> %B, <2 x double> %C, <2 x double> %D, double* %A)
-  %tmp = getelementptr double* %A, i64 %inc
+  %tmp = getelementptr double, double* %A, i64 %inc
   ret double* %tmp
 }
 
@@ -4748,7 +4748,7 @@ define double* @test_v1f64_post_imm_st1x3(double* %A, double** %ptr, <1 x double
 ;CHECK-LABEL: test_v1f64_post_imm_st1x3:
 ;CHECK: st1.1d { v0, v1, v2 }, [x0], #24
   call void @llvm.aarch64.neon.st1x3.v1f64.p0f64(<1 x double> %B, <1 x double> %C, <1 x double> %D, double* %A)
-  %tmp = getelementptr double* %A, i64 3
+  %tmp = getelementptr double, double* %A, i64 3
   ret double* %tmp
 }
 
@@ -4756,7 +4756,7 @@ define double* @test_v1f64_post_reg_st1x3(double* %A, double** %ptr, <1 x double
 ;CHECK-LABEL: test_v1f64_post_reg_st1x3:
 ;CHECK: st1.1d { v0, v1, v2 }, [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st1x3.v1f64.p0f64(<1 x double> %B, <1 x double> %C, <1 x double> %D, double* %A)
-  %tmp = getelementptr double* %A, i64 %inc
+  %tmp = getelementptr double, double* %A, i64 %inc
   ret double* %tmp
 }
 
@@ -4767,7 +4767,7 @@ define i8* @test_v16i8_post_imm_st1x4(i8* %A, i8** %ptr, <16 x i8> %B, <16 x i8>
 ;CHECK-LABEL: test_v16i8_post_imm_st1x4:
 ;CHECK: st1.16b { v0, v1, v2, v3 }, [x0], #64
   call void @llvm.aarch64.neon.st1x4.v16i8.p0i8(<16 x i8> %B, <16 x i8> %C, <16 x i8> %D, <16 x i8> %E, i8* %A)
-  %tmp = getelementptr i8* %A, i32 64
+  %tmp = getelementptr i8, i8* %A, i32 64
   ret i8* %tmp
 }
 
@@ -4775,7 +4775,7 @@ define i8* @test_v16i8_post_reg_st1x4(i8* %A, i8** %ptr, <16 x i8> %B, <16 x i8>
 ;CHECK-LABEL: test_v16i8_post_reg_st1x4:
 ;CHECK: st1.16b { v0, v1, v2, v3 }, [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st1x4.v16i8.p0i8(<16 x i8> %B, <16 x i8> %C, <16 x i8> %D, <16 x i8> %E, i8* %A)
-  %tmp = getelementptr i8* %A, i64 %inc
+  %tmp = getelementptr i8, i8* %A, i64 %inc
   ret i8* %tmp
 }
 
@@ -4786,7 +4786,7 @@ define i8* @test_v8i8_post_imm_st1x4(i8* %A, i8** %ptr, <8 x i8> %B, <8 x i8> %C
 ;CHECK-LABEL: test_v8i8_post_imm_st1x4:
 ;CHECK: st1.8b { v0, v1, v2, v3 }, [x0], #32
   call void @llvm.aarch64.neon.st1x4.v8i8.p0i8(<8 x i8> %B, <8 x i8> %C, <8 x i8> %D, <8 x i8> %E, i8* %A)
-  %tmp = getelementptr i8* %A, i32 32
+  %tmp = getelementptr i8, i8* %A, i32 32
   ret i8* %tmp
 }
 
@@ -4794,7 +4794,7 @@ define i8* @test_v8i8_post_reg_st1x4(i8* %A, i8** %ptr, <8 x i8> %B, <8 x i8> %C
 ;CHECK-LABEL: test_v8i8_post_reg_st1x4:
 ;CHECK: st1.8b { v0, v1, v2, v3 }, [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st1x4.v8i8.p0i8(<8 x i8> %B, <8 x i8> %C, <8 x i8> %D, <8 x i8> %E, i8* %A)
-  %tmp = getelementptr i8* %A, i64 %inc
+  %tmp = getelementptr i8, i8* %A, i64 %inc
   ret i8* %tmp
 }
 
@@ -4805,7 +4805,7 @@ define i16* @test_v8i16_post_imm_st1x4(i16* %A, i16** %ptr, <8 x i16> %B, <8 x i
 ;CHECK-LABEL: test_v8i16_post_imm_st1x4:
 ;CHECK: st1.8h { v0, v1, v2, v3 }, [x0], #64
   call void @llvm.aarch64.neon.st1x4.v8i16.p0i16(<8 x i16> %B, <8 x i16> %C, <8 x i16> %D, <8 x i16> %E, i16* %A)
-  %tmp = getelementptr i16* %A, i32 32
+  %tmp = getelementptr i16, i16* %A, i32 32
   ret i16* %tmp
 }
 
@@ -4813,7 +4813,7 @@ define i16* @test_v8i16_post_reg_st1x4(i16* %A, i16** %ptr, <8 x i16> %B, <8 x i
 ;CHECK-LABEL: test_v8i16_post_reg_st1x4:
 ;CHECK: st1.8h { v0, v1, v2, v3 }, [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st1x4.v8i16.p0i16(<8 x i16> %B, <8 x i16> %C, <8 x i16> %D, <8 x i16> %E, i16* %A)
-  %tmp = getelementptr i16* %A, i64 %inc
+  %tmp = getelementptr i16, i16* %A, i64 %inc
   ret i16* %tmp
 }
 
@@ -4824,7 +4824,7 @@ define i16* @test_v4i16_post_imm_st1x4(i16* %A, i16** %ptr, <4 x i16> %B, <4 x i
 ;CHECK-LABEL: test_v4i16_post_imm_st1x4:
 ;CHECK: st1.4h { v0, v1, v2, v3 }, [x0], #32
   call void @llvm.aarch64.neon.st1x4.v4i16.p0i16(<4 x i16> %B, <4 x i16> %C, <4 x i16> %D, <4 x i16> %E, i16* %A)
-  %tmp = getelementptr i16* %A, i32 16
+  %tmp = getelementptr i16, i16* %A, i32 16
   ret i16* %tmp
 }
 
@@ -4832,7 +4832,7 @@ define i16* @test_v4i16_post_reg_st1x4(i16* %A, i16** %ptr, <4 x i16> %B, <4 x i
 ;CHECK-LABEL: test_v4i16_post_reg_st1x4:
 ;CHECK: st1.4h { v0, v1, v2, v3 }, [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st1x4.v4i16.p0i16(<4 x i16> %B, <4 x i16> %C, <4 x i16> %D, <4 x i16> %E, i16* %A)
-  %tmp = getelementptr i16* %A, i64 %inc
+  %tmp = getelementptr i16, i16* %A, i64 %inc
   ret i16* %tmp
 }
 
@@ -4843,7 +4843,7 @@ define i32* @test_v4i32_post_imm_st1x4(i32* %A, i32** %ptr, <4 x i32> %B, <4 x i
 ;CHECK-LABEL: test_v4i32_post_imm_st1x4:
 ;CHECK: st1.4s { v0, v1, v2, v3 }, [x0], #64
   call void @llvm.aarch64.neon.st1x4.v4i32.p0i32(<4 x i32> %B, <4 x i32> %C, <4 x i32> %D, <4 x i32> %E, i32* %A)
-  %tmp = getelementptr i32* %A, i32 16
+  %tmp = getelementptr i32, i32* %A, i32 16
   ret i32* %tmp
 }
 
@@ -4851,7 +4851,7 @@ define i32* @test_v4i32_post_reg_st1x4(i32* %A, i32** %ptr, <4 x i32> %B, <4 x i
 ;CHECK-LABEL: test_v4i32_post_reg_st1x4:
 ;CHECK: st1.4s { v0, v1, v2, v3 }, [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st1x4.v4i32.p0i32(<4 x i32> %B, <4 x i32> %C, <4 x i32> %D, <4 x i32> %E, i32* %A)
-  %tmp = getelementptr i32* %A, i64 %inc
+  %tmp = getelementptr i32, i32* %A, i64 %inc
   ret i32* %tmp
 }
 
@@ -4862,7 +4862,7 @@ define i32* @test_v2i32_post_imm_st1x4(i32* %A, i32** %ptr, <2 x i32> %B, <2 x i
 ;CHECK-LABEL: test_v2i32_post_imm_st1x4:
 ;CHECK: st1.2s { v0, v1, v2, v3 }, [x0], #32
   call void @llvm.aarch64.neon.st1x4.v2i32.p0i32(<2 x i32> %B, <2 x i32> %C, <2 x i32> %D, <2 x i32> %E, i32* %A)
-  %tmp = getelementptr i32* %A, i32 8
+  %tmp = getelementptr i32, i32* %A, i32 8
   ret i32* %tmp
 }
 
@@ -4870,7 +4870,7 @@ define i32* @test_v2i32_post_reg_st1x4(i32* %A, i32** %ptr, <2 x i32> %B, <2 x i
 ;CHECK-LABEL: test_v2i32_post_reg_st1x4:
 ;CHECK: st1.2s { v0, v1, v2, v3 }, [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st1x4.v2i32.p0i32(<2 x i32> %B, <2 x i32> %C, <2 x i32> %D, <2 x i32> %E, i32* %A)
-  %tmp = getelementptr i32* %A, i64 %inc
+  %tmp = getelementptr i32, i32* %A, i64 %inc
   ret i32* %tmp
 }
 
@@ -4881,7 +4881,7 @@ define i64* @test_v2i64_post_imm_st1x4(i64* %A, i64** %ptr, <2 x i64> %B, <2 x i
 ;CHECK-LABEL: test_v2i64_post_imm_st1x4:
 ;CHECK: st1.2d { v0, v1, v2, v3 }, [x0], #64
   call void @llvm.aarch64.neon.st1x4.v2i64.p0i64(<2 x i64> %B, <2 x i64> %C, <2 x i64> %D, <2 x i64> %E, i64* %A)
-  %tmp = getelementptr i64* %A, i64 8
+  %tmp = getelementptr i64, i64* %A, i64 8
   ret i64* %tmp
 }
 
@@ -4889,7 +4889,7 @@ define i64* @test_v2i64_post_reg_st1x4(i64* %A, i64** %ptr, <2 x i64> %B, <2 x i
 ;CHECK-LABEL: test_v2i64_post_reg_st1x4:
 ;CHECK: st1.2d { v0, v1, v2, v3 }, [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st1x4.v2i64.p0i64(<2 x i64> %B, <2 x i64> %C, <2 x i64> %D, <2 x i64> %E, i64* %A)
-  %tmp = getelementptr i64* %A, i64 %inc
+  %tmp = getelementptr i64, i64* %A, i64 %inc
   ret i64* %tmp
 }
 
@@ -4900,7 +4900,7 @@ define i64* @test_v1i64_post_imm_st1x4(i64* %A, i64** %ptr, <1 x i64> %B, <1 x i
 ;CHECK-LABEL: test_v1i64_post_imm_st1x4:
 ;CHECK: st1.1d { v0, v1, v2, v3 }, [x0], #32
   call void @llvm.aarch64.neon.st1x4.v1i64.p0i64(<1 x i64> %B, <1 x i64> %C, <1 x i64> %D, <1 x i64> %E, i64* %A)
-  %tmp = getelementptr i64* %A, i64 4
+  %tmp = getelementptr i64, i64* %A, i64 4
   ret i64* %tmp
 }
 
@@ -4908,7 +4908,7 @@ define i64* @test_v1i64_post_reg_st1x4(i64* %A, i64** %ptr, <1 x i64> %B, <1 x i
 ;CHECK-LABEL: test_v1i64_post_reg_st1x4:
 ;CHECK: st1.1d { v0, v1, v2, v3 }, [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st1x4.v1i64.p0i64(<1 x i64> %B, <1 x i64> %C, <1 x i64> %D, <1 x i64> %E, i64* %A)
-  %tmp = getelementptr i64* %A, i64 %inc
+  %tmp = getelementptr i64, i64* %A, i64 %inc
   ret i64* %tmp
 }
 
@@ -4919,7 +4919,7 @@ define float* @test_v4f32_post_imm_st1x4(float* %A, float** %ptr, <4 x float> %B
 ;CHECK-LABEL: test_v4f32_post_imm_st1x4:
 ;CHECK: st1.4s { v0, v1, v2, v3 }, [x0], #64
   call void @llvm.aarch64.neon.st1x4.v4f32.p0f32(<4 x float> %B, <4 x float> %C, <4 x float> %D, <4 x float> %E, float* %A)
-  %tmp = getelementptr float* %A, i32 16
+  %tmp = getelementptr float, float* %A, i32 16
   ret float* %tmp
 }
 
@@ -4927,7 +4927,7 @@ define float* @test_v4f32_post_reg_st1x4(float* %A, float** %ptr, <4 x float> %B
 ;CHECK-LABEL: test_v4f32_post_reg_st1x4:
 ;CHECK: st1.4s { v0, v1, v2, v3 }, [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st1x4.v4f32.p0f32(<4 x float> %B, <4 x float> %C, <4 x float> %D, <4 x float> %E, float* %A)
-  %tmp = getelementptr float* %A, i64 %inc
+  %tmp = getelementptr float, float* %A, i64 %inc
   ret float* %tmp
 }
 
@@ -4938,7 +4938,7 @@ define float* @test_v2f32_post_imm_st1x4(float* %A, float** %ptr, <2 x float> %B
 ;CHECK-LABEL: test_v2f32_post_imm_st1x4:
 ;CHECK: st1.2s { v0, v1, v2, v3 }, [x0], #32
   call void @llvm.aarch64.neon.st1x4.v2f32.p0f32(<2 x float> %B, <2 x float> %C, <2 x float> %D, <2 x float> %E, float* %A)
-  %tmp = getelementptr float* %A, i32 8
+  %tmp = getelementptr float, float* %A, i32 8
   ret float* %tmp
 }
 
@@ -4946,7 +4946,7 @@ define float* @test_v2f32_post_reg_st1x4(float* %A, float** %ptr, <2 x float> %B
 ;CHECK-LABEL: test_v2f32_post_reg_st1x4:
 ;CHECK: st1.2s { v0, v1, v2, v3 }, [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st1x4.v2f32.p0f32(<2 x float> %B, <2 x float> %C, <2 x float> %D, <2 x float> %E, float* %A)
-  %tmp = getelementptr float* %A, i64 %inc
+  %tmp = getelementptr float, float* %A, i64 %inc
   ret float* %tmp
 }
 
@@ -4957,7 +4957,7 @@ define double* @test_v2f64_post_imm_st1x4(double* %A, double** %ptr, <2 x double
 ;CHECK-LABEL: test_v2f64_post_imm_st1x4:
 ;CHECK: st1.2d { v0, v1, v2, v3 }, [x0], #64
   call void @llvm.aarch64.neon.st1x4.v2f64.p0f64(<2 x double> %B, <2 x double> %C, <2 x double> %D, <2 x double> %E, double* %A)
-  %tmp = getelementptr double* %A, i64 8
+  %tmp = getelementptr double, double* %A, i64 8
   ret double* %tmp
 }
 
@@ -4965,7 +4965,7 @@ define double* @test_v2f64_post_reg_st1x4(double* %A, double** %ptr, <2 x double
 ;CHECK-LABEL: test_v2f64_post_reg_st1x4:
 ;CHECK: st1.2d { v0, v1, v2, v3 }, [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st1x4.v2f64.p0f64(<2 x double> %B, <2 x double> %C, <2 x double> %D, <2 x double> %E, double* %A)
-  %tmp = getelementptr double* %A, i64 %inc
+  %tmp = getelementptr double, double* %A, i64 %inc
   ret double* %tmp
 }
 
@@ -4976,7 +4976,7 @@ define double* @test_v1f64_post_imm_st1x4(double* %A, double** %ptr, <1 x double
 ;CHECK-LABEL: test_v1f64_post_imm_st1x4:
 ;CHECK: st1.1d { v0, v1, v2, v3 }, [x0], #32
   call void @llvm.aarch64.neon.st1x4.v1f64.p0f64(<1 x double> %B, <1 x double> %C, <1 x double> %D, <1 x double> %E, double* %A)
-  %tmp = getelementptr double* %A, i64 4
+  %tmp = getelementptr double, double* %A, i64 4
   ret double* %tmp
 }
 
@@ -4984,7 +4984,7 @@ define double* @test_v1f64_post_reg_st1x4(double* %A, double** %ptr, <1 x double
 ;CHECK-LABEL: test_v1f64_post_reg_st1x4:
 ;CHECK: st1.1d { v0, v1, v2, v3 }, [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st1x4.v1f64.p0f64(<1 x double> %B, <1 x double> %C, <1 x double> %D, <1 x double> %E, double* %A)
-  %tmp = getelementptr double* %A, i64 %inc
+  %tmp = getelementptr double, double* %A, i64 %inc
   ret double* %tmp
 }
 
@@ -4993,13 +4993,13 @@ declare void @llvm.aarch64.neon.st1x4.v1f64.p0f64(<1 x double>, <1 x double>, <1
 
 define i8* @test_v16i8_post_imm_st2lanelane(i8* %A, i8** %ptr, <16 x i8> %B, <16 x i8> %C) {
   call void @llvm.aarch64.neon.st2lanelane.v16i8.p0i8(<16 x i8> %B, <16 x i8> %C, i64 0, i64 1, i8* %A)
-  %tmp = getelementptr i8* %A, i32 2
+  %tmp = getelementptr i8, i8* %A, i32 2
   ret i8* %tmp
 }
 
 define i8* @test_v16i8_post_reg_st2lanelane(i8* %A, i8** %ptr, <16 x i8> %B, <16 x i8> %C, i64 %inc) {
   call void @llvm.aarch64.neon.st2lanelane.v16i8.p0i8(<16 x i8> %B, <16 x i8> %C, i64 0, i64 1, i8* %A)
-  %tmp = getelementptr i8* %A, i64 %inc
+  %tmp = getelementptr i8, i8* %A, i64 %inc
   ret i8* %tmp
 }
 
@@ -5010,7 +5010,7 @@ define i8* @test_v16i8_post_imm_st2lane(i8* %A, i8** %ptr, <16 x i8> %B, <16 x i
 ;CHECK-LABEL: test_v16i8_post_imm_st2lane:
 ;CHECK: st2.b { v0, v1 }[0], [x0], #2
   call void @llvm.aarch64.neon.st2lane.v16i8.p0i8(<16 x i8> %B, <16 x i8> %C, i64 0, i8* %A)
-  %tmp = getelementptr i8* %A, i32 2
+  %tmp = getelementptr i8, i8* %A, i32 2
   ret i8* %tmp
 }
 
@@ -5018,7 +5018,7 @@ define i8* @test_v16i8_post_reg_st2lane(i8* %A, i8** %ptr, <16 x i8> %B, <16 x i
 ;CHECK-LABEL: test_v16i8_post_reg_st2lane:
 ;CHECK: st2.b { v0, v1 }[0], [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st2lane.v16i8.p0i8(<16 x i8> %B, <16 x i8> %C, i64 0, i8* %A)
-  %tmp = getelementptr i8* %A, i64 %inc
+  %tmp = getelementptr i8, i8* %A, i64 %inc
   ret i8* %tmp
 }
 
@@ -5029,7 +5029,7 @@ define i8* @test_v8i8_post_imm_st2lane(i8* %A, i8** %ptr, <8 x i8> %B, <8 x i8>
 ;CHECK-LABEL: test_v8i8_post_imm_st2lane:
 ;CHECK: st2.b { v0, v1 }[0], [x0], #2
   call void @llvm.aarch64.neon.st2lane.v8i8.p0i8(<8 x i8> %B, <8 x i8> %C, i64 0, i8* %A)
-  %tmp = getelementptr i8* %A, i32 2
+  %tmp = getelementptr i8, i8* %A, i32 2
   ret i8* %tmp
 }
 
@@ -5037,7 +5037,7 @@ define i8* @test_v8i8_post_reg_st2lane(i8* %A, i8** %ptr, <8 x i8> %B, <8 x i8>
 ;CHECK-LABEL: test_v8i8_post_reg_st2lane:
 ;CHECK: st2.b { v0, v1 }[0], [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st2lane.v8i8.p0i8(<8 x i8> %B, <8 x i8> %C, i64 0, i8* %A)
-  %tmp = getelementptr i8* %A, i64 %inc
+  %tmp = getelementptr i8, i8* %A, i64 %inc
   ret i8* %tmp
 }
 
@@ -5048,7 +5048,7 @@ define i16* @test_v8i16_post_imm_st2lane(i16* %A, i16** %ptr, <8 x i16> %B, <8 x
 ;CHECK-LABEL: test_v8i16_post_imm_st2lane:
 ;CHECK: st2.h { v0, v1 }[0], [x0], #4
   call void @llvm.aarch64.neon.st2lane.v8i16.p0i16(<8 x i16> %B, <8 x i16> %C, i64 0, i16* %A)
-  %tmp = getelementptr i16* %A, i32 2
+  %tmp = getelementptr i16, i16* %A, i32 2
   ret i16* %tmp
 }
 
@@ -5056,7 +5056,7 @@ define i16* @test_v8i16_post_reg_st2lane(i16* %A, i16** %ptr, <8 x i16> %B, <8 x
 ;CHECK-LABEL: test_v8i16_post_reg_st2lane:
 ;CHECK: st2.h { v0, v1 }[0], [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st2lane.v8i16.p0i16(<8 x i16> %B, <8 x i16> %C, i64 0, i16* %A)
-  %tmp = getelementptr i16* %A, i64 %inc
+  %tmp = getelementptr i16, i16* %A, i64 %inc
   ret i16* %tmp
 }
 
@@ -5067,7 +5067,7 @@ define i16* @test_v4i16_post_imm_st2lane(i16* %A, i16** %ptr, <4 x i16> %B, <4 x
 ;CHECK-LABEL: test_v4i16_post_imm_st2lane:
 ;CHECK: st2.h { v0, v1 }[0], [x0], #4
   call void @llvm.aarch64.neon.st2lane.v4i16.p0i16(<4 x i16> %B, <4 x i16> %C, i64 0, i16* %A)
-  %tmp = getelementptr i16* %A, i32 2
+  %tmp = getelementptr i16, i16* %A, i32 2
   ret i16* %tmp
 }
 
@@ -5075,7 +5075,7 @@ define i16* @test_v4i16_post_reg_st2lane(i16* %A, i16** %ptr, <4 x i16> %B, <4 x
 ;CHECK-LABEL: test_v4i16_post_reg_st2lane:
 ;CHECK: st2.h { v0, v1 }[0], [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st2lane.v4i16.p0i16(<4 x i16> %B, <4 x i16> %C, i64 0, i16* %A)
-  %tmp = getelementptr i16* %A, i64 %inc
+  %tmp = getelementptr i16, i16* %A, i64 %inc
   ret i16* %tmp
 }
 
@@ -5086,7 +5086,7 @@ define i32* @test_v4i32_post_imm_st2lane(i32* %A, i32** %ptr, <4 x i32> %B, <4 x
 ;CHECK-LABEL: test_v4i32_post_imm_st2lane:
 ;CHECK: st2.s { v0, v1 }[0], [x0], #8
   call void @llvm.aarch64.neon.st2lane.v4i32.p0i32(<4 x i32> %B, <4 x i32> %C, i64 0, i32* %A)
-  %tmp = getelementptr i32* %A, i32 2
+  %tmp = getelementptr i32, i32* %A, i32 2
   ret i32* %tmp
 }
 
@@ -5094,7 +5094,7 @@ define i32* @test_v4i32_post_reg_st2lane(i32* %A, i32** %ptr, <4 x i32> %B, <4 x
 ;CHECK-LABEL: test_v4i32_post_reg_st2lane:
 ;CHECK: st2.s { v0, v1 }[0], [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st2lane.v4i32.p0i32(<4 x i32> %B, <4 x i32> %C, i64 0, i32* %A)
-  %tmp = getelementptr i32* %A, i64 %inc
+  %tmp = getelementptr i32, i32* %A, i64 %inc
   ret i32* %tmp
 }
 
@@ -5105,7 +5105,7 @@ define i32* @test_v2i32_post_imm_st2lane(i32* %A, i32** %ptr, <2 x i32> %B, <2 x
 ;CHECK-LABEL: test_v2i32_post_imm_st2lane:
 ;CHECK: st2.s { v0, v1 }[0], [x0], #8
   call void @llvm.aarch64.neon.st2lane.v2i32.p0i32(<2 x i32> %B, <2 x i32> %C, i64 0, i32* %A)
-  %tmp = getelementptr i32* %A, i32 2
+  %tmp = getelementptr i32, i32* %A, i32 2
   ret i32* %tmp
 }
 
@@ -5113,7 +5113,7 @@ define i32* @test_v2i32_post_reg_st2lane(i32* %A, i32** %ptr, <2 x i32> %B, <2 x
 ;CHECK-LABEL: test_v2i32_post_reg_st2lane:
 ;CHECK: st2.s { v0, v1 }[0], [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st2lane.v2i32.p0i32(<2 x i32> %B, <2 x i32> %C, i64 0, i32* %A)
-  %tmp = getelementptr i32* %A, i64 %inc
+  %tmp = getelementptr i32, i32* %A, i64 %inc
   ret i32* %tmp
 }
 
@@ -5124,7 +5124,7 @@ define i64* @test_v2i64_post_imm_st2lane(i64* %A, i64** %ptr, <2 x i64> %B, <2 x
 ;CHECK-LABEL: test_v2i64_post_imm_st2lane:
 ;CHECK: st2.d { v0, v1 }[0], [x0], #16
   call void @llvm.aarch64.neon.st2lane.v2i64.p0i64(<2 x i64> %B, <2 x i64> %C, i64 0, i64* %A)
-  %tmp = getelementptr i64* %A, i64 2
+  %tmp = getelementptr i64, i64* %A, i64 2
   ret i64* %tmp
 }
 
@@ -5132,7 +5132,7 @@ define i64* @test_v2i64_post_reg_st2lane(i64* %A, i64** %ptr, <2 x i64> %B, <2 x
 ;CHECK-LABEL: test_v2i64_post_reg_st2lane:
 ;CHECK: st2.d { v0, v1 }[0], [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st2lane.v2i64.p0i64(<2 x i64> %B, <2 x i64> %C, i64 0, i64* %A)
-  %tmp = getelementptr i64* %A, i64 %inc
+  %tmp = getelementptr i64, i64* %A, i64 %inc
   ret i64* %tmp
 }
 
@@ -5143,7 +5143,7 @@ define i64* @test_v1i64_post_imm_st2lane(i64* %A, i64** %ptr, <1 x i64> %B, <1 x
 ;CHECK-LABEL: test_v1i64_post_imm_st2lane:
 ;CHECK: st2.d { v0, v1 }[0], [x0], #16
   call void @llvm.aarch64.neon.st2lane.v1i64.p0i64(<1 x i64> %B, <1 x i64> %C, i64 0, i64* %A)
-  %tmp = getelementptr i64* %A, i64 2
+  %tmp = getelementptr i64, i64* %A, i64 2
   ret i64* %tmp
 }
 
@@ -5151,7 +5151,7 @@ define i64* @test_v1i64_post_reg_st2lane(i64* %A, i64** %ptr, <1 x i64> %B, <1 x
 ;CHECK-LABEL: test_v1i64_post_reg_st2lane:
 ;CHECK: st2.d { v0, v1 }[0], [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st2lane.v1i64.p0i64(<1 x i64> %B, <1 x i64> %C, i64 0, i64* %A)
-  %tmp = getelementptr i64* %A, i64 %inc
+  %tmp = getelementptr i64, i64* %A, i64 %inc
   ret i64* %tmp
 }
 
@@ -5162,7 +5162,7 @@ define float* @test_v4f32_post_imm_st2lane(float* %A, float** %ptr, <4 x float>
 ;CHECK-LABEL: test_v4f32_post_imm_st2lane:
 ;CHECK: st2.s { v0, v1 }[0], [x0], #8
   call void @llvm.aarch64.neon.st2lane.v4f32.p0f32(<4 x float> %B, <4 x float> %C, i64 0, float* %A)
-  %tmp = getelementptr float* %A, i32 2
+  %tmp = getelementptr float, float* %A, i32 2
   ret float* %tmp
 }
 
@@ -5170,7 +5170,7 @@ define float* @test_v4f32_post_reg_st2lane(float* %A, float** %ptr, <4 x float>
 ;CHECK-LABEL: test_v4f32_post_reg_st2lane:
 ;CHECK: st2.s { v0, v1 }[0], [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st2lane.v4f32.p0f32(<4 x float> %B, <4 x float> %C, i64 0, float* %A)
-  %tmp = getelementptr float* %A, i64 %inc
+  %tmp = getelementptr float, float* %A, i64 %inc
   ret float* %tmp
 }
 
@@ -5181,7 +5181,7 @@ define float* @test_v2f32_post_imm_st2lane(float* %A, float** %ptr, <2 x float>
 ;CHECK-LABEL: test_v2f32_post_imm_st2lane:
 ;CHECK: st2.s { v0, v1 }[0], [x0], #8
   call void @llvm.aarch64.neon.st2lane.v2f32.p0f32(<2 x float> %B, <2 x float> %C, i64 0, float* %A)
-  %tmp = getelementptr float* %A, i32 2
+  %tmp = getelementptr float, float* %A, i32 2
   ret float* %tmp
 }
 
@@ -5189,7 +5189,7 @@ define float* @test_v2f32_post_reg_st2lane(float* %A, float** %ptr, <2 x float>
 ;CHECK-LABEL: test_v2f32_post_reg_st2lane:
 ;CHECK: st2.s { v0, v1 }[0], [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st2lane.v2f32.p0f32(<2 x float> %B, <2 x float> %C, i64 0, float* %A)
-  %tmp = getelementptr float* %A, i64 %inc
+  %tmp = getelementptr float, float* %A, i64 %inc
   ret float* %tmp
 }
 
@@ -5200,7 +5200,7 @@ define double* @test_v2f64_post_imm_st2lane(double* %A, double** %ptr, <2 x doub
 ;CHECK-LABEL: test_v2f64_post_imm_st2lane:
 ;CHECK: st2.d { v0, v1 }[0], [x0], #16
   call void @llvm.aarch64.neon.st2lane.v2f64.p0f64(<2 x double> %B, <2 x double> %C, i64 0, double* %A)
-  %tmp = getelementptr double* %A, i64 2
+  %tmp = getelementptr double, double* %A, i64 2
   ret double* %tmp
 }
 
@@ -5208,7 +5208,7 @@ define double* @test_v2f64_post_reg_st2lane(double* %A, double** %ptr, <2 x doub
 ;CHECK-LABEL: test_v2f64_post_reg_st2lane:
 ;CHECK: st2.d { v0, v1 }[0], [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st2lane.v2f64.p0f64(<2 x double> %B, <2 x double> %C, i64 0, double* %A)
-  %tmp = getelementptr double* %A, i64 %inc
+  %tmp = getelementptr double, double* %A, i64 %inc
   ret double* %tmp
 }
 
@@ -5219,7 +5219,7 @@ define double* @test_v1f64_post_imm_st2lane(double* %A, double** %ptr, <1 x doub
 ;CHECK-LABEL: test_v1f64_post_imm_st2lane:
 ;CHECK: st2.d { v0, v1 }[0], [x0], #16
   call void @llvm.aarch64.neon.st2lane.v1f64.p0f64(<1 x double> %B, <1 x double> %C, i64 0, double* %A)
-  %tmp = getelementptr double* %A, i64 2
+  %tmp = getelementptr double, double* %A, i64 2
   ret double* %tmp
 }
 
@@ -5227,7 +5227,7 @@ define double* @test_v1f64_post_reg_st2lane(double* %A, double** %ptr, <1 x doub
 ;CHECK-LABEL: test_v1f64_post_reg_st2lane:
 ;CHECK: st2.d { v0, v1 }[0], [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st2lane.v1f64.p0f64(<1 x double> %B, <1 x double> %C, i64 0, double* %A)
-  %tmp = getelementptr double* %A, i64 %inc
+  %tmp = getelementptr double, double* %A, i64 %inc
   ret double* %tmp
 }
 
@@ -5238,7 +5238,7 @@ define i8* @test_v16i8_post_imm_st3lane(i8* %A, i8** %ptr, <16 x i8> %B, <16 x i
 ;CHECK-LABEL: test_v16i8_post_imm_st3lane:
 ;CHECK: st3.b { v0, v1, v2 }[0], [x0], #3
   call void @llvm.aarch64.neon.st3lane.v16i8.p0i8(<16 x i8> %B, <16 x i8> %C, <16 x i8> %D, i64 0, i8* %A)
-  %tmp = getelementptr i8* %A, i32 3
+  %tmp = getelementptr i8, i8* %A, i32 3
   ret i8* %tmp
 }
 
@@ -5246,7 +5246,7 @@ define i8* @test_v16i8_post_reg_st3lane(i8* %A, i8** %ptr, <16 x i8> %B, <16 x i
 ;CHECK-LABEL: test_v16i8_post_reg_st3lane:
 ;CHECK: st3.b { v0, v1, v2 }[0], [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st3lane.v16i8.p0i8(<16 x i8> %B, <16 x i8> %C, <16 x i8> %D, i64 0, i8* %A)
-  %tmp = getelementptr i8* %A, i64 %inc
+  %tmp = getelementptr i8, i8* %A, i64 %inc
   ret i8* %tmp
 }
 
@@ -5257,7 +5257,7 @@ define i8* @test_v8i8_post_imm_st3lane(i8* %A, i8** %ptr, <8 x i8> %B, <8 x i8>
 ;CHECK-LABEL: test_v8i8_post_imm_st3lane:
 ;CHECK: st3.b { v0, v1, v2 }[0], [x0], #3
   call void @llvm.aarch64.neon.st3lane.v8i8.p0i8(<8 x i8> %B, <8 x i8> %C, <8 x i8> %D, i64 0, i8* %A)
-  %tmp = getelementptr i8* %A, i32 3
+  %tmp = getelementptr i8, i8* %A, i32 3
   ret i8* %tmp
 }
 
@@ -5265,7 +5265,7 @@ define i8* @test_v8i8_post_reg_st3lane(i8* %A, i8** %ptr, <8 x i8> %B, <8 x i8>
 ;CHECK-LABEL: test_v8i8_post_reg_st3lane:
 ;CHECK: st3.b { v0, v1, v2 }[0], [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st3lane.v8i8.p0i8(<8 x i8> %B, <8 x i8> %C, <8 x i8> %D, i64 0, i8* %A)
-  %tmp = getelementptr i8* %A, i64 %inc
+  %tmp = getelementptr i8, i8* %A, i64 %inc
   ret i8* %tmp
 }
 
@@ -5276,7 +5276,7 @@ define i16* @test_v8i16_post_imm_st3lane(i16* %A, i16** %ptr, <8 x i16> %B, <8 x
 ;CHECK-LABEL: test_v8i16_post_imm_st3lane:
 ;CHECK: st3.h { v0, v1, v2 }[0], [x0], #6
   call void @llvm.aarch64.neon.st3lane.v8i16.p0i16(<8 x i16> %B, <8 x i16> %C, <8 x i16> %D, i64 0, i16* %A)
-  %tmp = getelementptr i16* %A, i32 3
+  %tmp = getelementptr i16, i16* %A, i32 3
   ret i16* %tmp
 }
 
@@ -5284,7 +5284,7 @@ define i16* @test_v8i16_post_reg_st3lane(i16* %A, i16** %ptr, <8 x i16> %B, <8 x
 ;CHECK-LABEL: test_v8i16_post_reg_st3lane:
 ;CHECK: st3.h { v0, v1, v2 }[0], [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st3lane.v8i16.p0i16(<8 x i16> %B, <8 x i16> %C, <8 x i16> %D, i64 0, i16* %A)
-  %tmp = getelementptr i16* %A, i64 %inc
+  %tmp = getelementptr i16, i16* %A, i64 %inc
   ret i16* %tmp
 }
 
@@ -5295,7 +5295,7 @@ define i16* @test_v4i16_post_imm_st3lane(i16* %A, i16** %ptr, <4 x i16> %B, <4 x
 ;CHECK-LABEL: test_v4i16_post_imm_st3lane:
 ;CHECK: st3.h { v0, v1, v2 }[0], [x0], #6
   call void @llvm.aarch64.neon.st3lane.v4i16.p0i16(<4 x i16> %B, <4 x i16> %C, <4 x i16> %D, i64 0, i16* %A)
-  %tmp = getelementptr i16* %A, i32 3
+  %tmp = getelementptr i16, i16* %A, i32 3
   ret i16* %tmp
 }
 
@@ -5303,7 +5303,7 @@ define i16* @test_v4i16_post_reg_st3lane(i16* %A, i16** %ptr, <4 x i16> %B, <4 x
 ;CHECK-LABEL: test_v4i16_post_reg_st3lane:
 ;CHECK: st3.h { v0, v1, v2 }[0], [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st3lane.v4i16.p0i16(<4 x i16> %B, <4 x i16> %C, <4 x i16> %D, i64 0, i16* %A)
-  %tmp = getelementptr i16* %A, i64 %inc
+  %tmp = getelementptr i16, i16* %A, i64 %inc
   ret i16* %tmp
 }
 
@@ -5314,7 +5314,7 @@ define i32* @test_v4i32_post_imm_st3lane(i32* %A, i32** %ptr, <4 x i32> %B, <4 x
 ;CHECK-LABEL: test_v4i32_post_imm_st3lane:
 ;CHECK: st3.s { v0, v1, v2 }[0], [x0], #12
   call void @llvm.aarch64.neon.st3lane.v4i32.p0i32(<4 x i32> %B, <4 x i32> %C, <4 x i32> %D, i64 0, i32* %A)
-  %tmp = getelementptr i32* %A, i32 3
+  %tmp = getelementptr i32, i32* %A, i32 3
   ret i32* %tmp
 }
 
@@ -5322,7 +5322,7 @@ define i32* @test_v4i32_post_reg_st3lane(i32* %A, i32** %ptr, <4 x i32> %B, <4 x
 ;CHECK-LABEL: test_v4i32_post_reg_st3lane:
 ;CHECK: st3.s { v0, v1, v2 }[0], [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st3lane.v4i32.p0i32(<4 x i32> %B, <4 x i32> %C, <4 x i32> %D, i64 0, i32* %A)
-  %tmp = getelementptr i32* %A, i64 %inc
+  %tmp = getelementptr i32, i32* %A, i64 %inc
   ret i32* %tmp
 }
 
@@ -5333,7 +5333,7 @@ define i32* @test_v2i32_post_imm_st3lane(i32* %A, i32** %ptr, <2 x i32> %B, <2 x
 ;CHECK-LABEL: test_v2i32_post_imm_st3lane:
 ;CHECK: st3.s { v0, v1, v2 }[0], [x0], #12
   call void @llvm.aarch64.neon.st3lane.v2i32.p0i32(<2 x i32> %B, <2 x i32> %C, <2 x i32> %D, i64 0, i32* %A)
-  %tmp = getelementptr i32* %A, i32 3
+  %tmp = getelementptr i32, i32* %A, i32 3
   ret i32* %tmp
 }
 
@@ -5341,7 +5341,7 @@ define i32* @test_v2i32_post_reg_st3lane(i32* %A, i32** %ptr, <2 x i32> %B, <2 x
 ;CHECK-LABEL: test_v2i32_post_reg_st3lane:
 ;CHECK: st3.s { v0, v1, v2 }[0], [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st3lane.v2i32.p0i32(<2 x i32> %B, <2 x i32> %C, <2 x i32> %D, i64 0, i32* %A)
-  %tmp = getelementptr i32* %A, i64 %inc
+  %tmp = getelementptr i32, i32* %A, i64 %inc
   ret i32* %tmp
 }
 
@@ -5352,7 +5352,7 @@ define i64* @test_v2i64_post_imm_st3lane(i64* %A, i64** %ptr, <2 x i64> %B, <2 x
 ;CHECK-LABEL: test_v2i64_post_imm_st3lane:
 ;CHECK: st3.d { v0, v1, v2 }[0], [x0], #24
   call void @llvm.aarch64.neon.st3lane.v2i64.p0i64(<2 x i64> %B, <2 x i64> %C, <2 x i64> %D, i64 0, i64* %A)
-  %tmp = getelementptr i64* %A, i64 3
+  %tmp = getelementptr i64, i64* %A, i64 3
   ret i64* %tmp
 }
 
@@ -5360,7 +5360,7 @@ define i64* @test_v2i64_post_reg_st3lane(i64* %A, i64** %ptr, <2 x i64> %B, <2 x
 ;CHECK-LABEL: test_v2i64_post_reg_st3lane:
 ;CHECK: st3.d { v0, v1, v2 }[0], [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st3lane.v2i64.p0i64(<2 x i64> %B, <2 x i64> %C, <2 x i64> %D, i64 0, i64* %A)
-  %tmp = getelementptr i64* %A, i64 %inc
+  %tmp = getelementptr i64, i64* %A, i64 %inc
   ret i64* %tmp
 }
 
@@ -5371,7 +5371,7 @@ define i64* @test_v1i64_post_imm_st3lane(i64* %A, i64** %ptr, <1 x i64> %B, <1 x
 ;CHECK-LABEL: test_v1i64_post_imm_st3lane:
 ;CHECK: st3.d { v0, v1, v2 }[0], [x0], #24
   call void @llvm.aarch64.neon.st3lane.v1i64.p0i64(<1 x i64> %B, <1 x i64> %C, <1 x i64> %D, i64 0, i64* %A)
-  %tmp = getelementptr i64* %A, i64 3
+  %tmp = getelementptr i64, i64* %A, i64 3
   ret i64* %tmp
 }
 
@@ -5379,7 +5379,7 @@ define i64* @test_v1i64_post_reg_st3lane(i64* %A, i64** %ptr, <1 x i64> %B, <1 x
 ;CHECK-LABEL: test_v1i64_post_reg_st3lane:
 ;CHECK: st3.d { v0, v1, v2 }[0], [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st3lane.v1i64.p0i64(<1 x i64> %B, <1 x i64> %C, <1 x i64> %D, i64 0, i64* %A)
-  %tmp = getelementptr i64* %A, i64 %inc
+  %tmp = getelementptr i64, i64* %A, i64 %inc
   ret i64* %tmp
 }
 
@@ -5390,7 +5390,7 @@ define float* @test_v4f32_post_imm_st3lane(float* %A, float** %ptr, <4 x float>
 ;CHECK-LABEL: test_v4f32_post_imm_st3lane:
 ;CHECK: st3.s { v0, v1, v2 }[0], [x0], #12
   call void @llvm.aarch64.neon.st3lane.v4f32.p0f32(<4 x float> %B, <4 x float> %C, <4 x float> %D, i64 0, float* %A)
-  %tmp = getelementptr float* %A, i32 3
+  %tmp = getelementptr float, float* %A, i32 3
   ret float* %tmp
 }
 
@@ -5398,7 +5398,7 @@ define float* @test_v4f32_post_reg_st3lane(float* %A, float** %ptr, <4 x float>
 ;CHECK-LABEL: test_v4f32_post_reg_st3lane:
 ;CHECK: st3.s { v0, v1, v2 }[0], [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st3lane.v4f32.p0f32(<4 x float> %B, <4 x float> %C, <4 x float> %D, i64 0, float* %A)
-  %tmp = getelementptr float* %A, i64 %inc
+  %tmp = getelementptr float, float* %A, i64 %inc
   ret float* %tmp
 }
 
@@ -5409,7 +5409,7 @@ define float* @test_v2f32_post_imm_st3lane(float* %A, float** %ptr, <2 x float>
 ;CHECK-LABEL: test_v2f32_post_imm_st3lane:
 ;CHECK: st3.s { v0, v1, v2 }[0], [x0], #12
   call void @llvm.aarch64.neon.st3lane.v2f32.p0f32(<2 x float> %B, <2 x float> %C, <2 x float> %D, i64 0, float* %A)
-  %tmp = getelementptr float* %A, i32 3
+  %tmp = getelementptr float, float* %A, i32 3
   ret float* %tmp
 }
 
@@ -5417,7 +5417,7 @@ define float* @test_v2f32_post_reg_st3lane(float* %A, float** %ptr, <2 x float>
 ;CHECK-LABEL: test_v2f32_post_reg_st3lane:
 ;CHECK: st3.s { v0, v1, v2 }[0], [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st3lane.v2f32.p0f32(<2 x float> %B, <2 x float> %C, <2 x float> %D, i64 0, float* %A)
-  %tmp = getelementptr float* %A, i64 %inc
+  %tmp = getelementptr float, float* %A, i64 %inc
   ret float* %tmp
 }
 
@@ -5428,7 +5428,7 @@ define double* @test_v2f64_post_imm_st3lane(double* %A, double** %ptr, <2 x doub
 ;CHECK-LABEL: test_v2f64_post_imm_st3lane:
 ;CHECK: st3.d { v0, v1, v2 }[0], [x0], #24
   call void @llvm.aarch64.neon.st3lane.v2f64.p0f64(<2 x double> %B, <2 x double> %C, <2 x double> %D, i64 0, double* %A)
-  %tmp = getelementptr double* %A, i64 3
+  %tmp = getelementptr double, double* %A, i64 3
   ret double* %tmp
 }
 
@@ -5436,7 +5436,7 @@ define double* @test_v2f64_post_reg_st3lane(double* %A, double** %ptr, <2 x doub
 ;CHECK-LABEL: test_v2f64_post_reg_st3lane:
 ;CHECK: st3.d { v0, v1, v2 }[0], [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st3lane.v2f64.p0f64(<2 x double> %B, <2 x double> %C, <2 x double> %D, i64 0, double* %A)
-  %tmp = getelementptr double* %A, i64 %inc
+  %tmp = getelementptr double, double* %A, i64 %inc
   ret double* %tmp
 }
 
@@ -5447,7 +5447,7 @@ define double* @test_v1f64_post_imm_st3lane(double* %A, double** %ptr, <1 x doub
 ;CHECK-LABEL: test_v1f64_post_imm_st3lane:
 ;CHECK: st3.d { v0, v1, v2 }[0], [x0], #24
   call void @llvm.aarch64.neon.st3lane.v1f64.p0f64(<1 x double> %B, <1 x double> %C, <1 x double> %D, i64 0, double* %A)
-  %tmp = getelementptr double* %A, i64 3
+  %tmp = getelementptr double, double* %A, i64 3
   ret double* %tmp
 }
 
@@ -5455,7 +5455,7 @@ define double* @test_v1f64_post_reg_st3lane(double* %A, double** %ptr, <1 x doub
 ;CHECK-LABEL: test_v1f64_post_reg_st3lane:
 ;CHECK: st3.d { v0, v1, v2 }[0], [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st3lane.v1f64.p0f64(<1 x double> %B, <1 x double> %C, <1 x double> %D, i64 0, double* %A)
-  %tmp = getelementptr double* %A, i64 %inc
+  %tmp = getelementptr double, double* %A, i64 %inc
   ret double* %tmp
 }
 
@@ -5466,7 +5466,7 @@ define i8* @test_v16i8_post_imm_st4lane(i8* %A, i8** %ptr, <16 x i8> %B, <16 x i
 ;CHECK-LABEL: test_v16i8_post_imm_st4lane:
 ;CHECK: st4.b { v0, v1, v2, v3 }[0], [x0], #4
   call void @llvm.aarch64.neon.st4lane.v16i8.p0i8(<16 x i8> %B, <16 x i8> %C, <16 x i8> %D, <16 x i8> %E, i64 0, i8* %A)
-  %tmp = getelementptr i8* %A, i32 4
+  %tmp = getelementptr i8, i8* %A, i32 4
   ret i8* %tmp
 }
 
@@ -5474,7 +5474,7 @@ define i8* @test_v16i8_post_reg_st4lane(i8* %A, i8** %ptr, <16 x i8> %B, <16 x i
 ;CHECK-LABEL: test_v16i8_post_reg_st4lane:
 ;CHECK: st4.b { v0, v1, v2, v3 }[0], [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st4lane.v16i8.p0i8(<16 x i8> %B, <16 x i8> %C, <16 x i8> %D, <16 x i8> %E, i64 0, i8* %A)
-  %tmp = getelementptr i8* %A, i64 %inc
+  %tmp = getelementptr i8, i8* %A, i64 %inc
   ret i8* %tmp
 }
 
@@ -5485,7 +5485,7 @@ define i8* @test_v8i8_post_imm_st4lane(i8* %A, i8** %ptr, <8 x i8> %B, <8 x i8>
 ;CHECK-LABEL: test_v8i8_post_imm_st4lane:
 ;CHECK: st4.b { v0, v1, v2, v3 }[0], [x0], #4
   call void @llvm.aarch64.neon.st4lane.v8i8.p0i8(<8 x i8> %B, <8 x i8> %C, <8 x i8> %D, <8 x i8> %E, i64 0, i8* %A)
-  %tmp = getelementptr i8* %A, i32 4
+  %tmp = getelementptr i8, i8* %A, i32 4
   ret i8* %tmp
 }
 
@@ -5493,7 +5493,7 @@ define i8* @test_v8i8_post_reg_st4lane(i8* %A, i8** %ptr, <8 x i8> %B, <8 x i8>
 ;CHECK-LABEL: test_v8i8_post_reg_st4lane:
 ;CHECK: st4.b { v0, v1, v2, v3 }[0], [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st4lane.v8i8.p0i8(<8 x i8> %B, <8 x i8> %C, <8 x i8> %D, <8 x i8> %E, i64 0, i8* %A)
-  %tmp = getelementptr i8* %A, i64 %inc
+  %tmp = getelementptr i8, i8* %A, i64 %inc
   ret i8* %tmp
 }
 
@@ -5504,7 +5504,7 @@ define i16* @test_v8i16_post_imm_st4lane(i16* %A, i16** %ptr, <8 x i16> %B, <8 x
 ;CHECK-LABEL: test_v8i16_post_imm_st4lane:
 ;CHECK: st4.h { v0, v1, v2, v3 }[0], [x0], #8
   call void @llvm.aarch64.neon.st4lane.v8i16.p0i16(<8 x i16> %B, <8 x i16> %C, <8 x i16> %D, <8 x i16> %E, i64 0, i16* %A)
-  %tmp = getelementptr i16* %A, i32 4
+  %tmp = getelementptr i16, i16* %A, i32 4
   ret i16* %tmp
 }
 
@@ -5512,7 +5512,7 @@ define i16* @test_v8i16_post_reg_st4lane(i16* %A, i16** %ptr, <8 x i16> %B, <8 x
 ;CHECK-LABEL: test_v8i16_post_reg_st4lane:
 ;CHECK: st4.h { v0, v1, v2, v3 }[0], [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st4lane.v8i16.p0i16(<8 x i16> %B, <8 x i16> %C, <8 x i16> %D, <8 x i16> %E, i64 0, i16* %A)
-  %tmp = getelementptr i16* %A, i64 %inc
+  %tmp = getelementptr i16, i16* %A, i64 %inc
   ret i16* %tmp
 }
 
@@ -5523,7 +5523,7 @@ define i16* @test_v4i16_post_imm_st4lane(i16* %A, i16** %ptr, <4 x i16> %B, <4 x
 ;CHECK-LABEL: test_v4i16_post_imm_st4lane:
 ;CHECK: st4.h { v0, v1, v2, v3 }[0], [x0], #8
   call void @llvm.aarch64.neon.st4lane.v4i16.p0i16(<4 x i16> %B, <4 x i16> %C, <4 x i16> %D, <4 x i16> %E, i64 0, i16* %A)
-  %tmp = getelementptr i16* %A, i32 4
+  %tmp = getelementptr i16, i16* %A, i32 4
   ret i16* %tmp
 }
 
@@ -5531,7 +5531,7 @@ define i16* @test_v4i16_post_reg_st4lane(i16* %A, i16** %ptr, <4 x i16> %B, <4 x
 ;CHECK-LABEL: test_v4i16_post_reg_st4lane:
 ;CHECK: st4.h { v0, v1, v2, v3 }[0], [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st4lane.v4i16.p0i16(<4 x i16> %B, <4 x i16> %C, <4 x i16> %D, <4 x i16> %E, i64 0, i16* %A)
-  %tmp = getelementptr i16* %A, i64 %inc
+  %tmp = getelementptr i16, i16* %A, i64 %inc
   ret i16* %tmp
 }
 
@@ -5542,7 +5542,7 @@ define i32* @test_v4i32_post_imm_st4lane(i32* %A, i32** %ptr, <4 x i32> %B, <4 x
 ;CHECK-LABEL: test_v4i32_post_imm_st4lane:
 ;CHECK: st4.s { v0, v1, v2, v3 }[0], [x0], #16
   call void @llvm.aarch64.neon.st4lane.v4i32.p0i32(<4 x i32> %B, <4 x i32> %C, <4 x i32> %D, <4 x i32> %E, i64 0, i32* %A)
-  %tmp = getelementptr i32* %A, i32 4
+  %tmp = getelementptr i32, i32* %A, i32 4
   ret i32* %tmp
 }
 
@@ -5550,7 +5550,7 @@ define i32* @test_v4i32_post_reg_st4lane(i32* %A, i32** %ptr, <4 x i32> %B, <4 x
 ;CHECK-LABEL: test_v4i32_post_reg_st4lane:
 ;CHECK: st4.s { v0, v1, v2, v3 }[0], [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st4lane.v4i32.p0i32(<4 x i32> %B, <4 x i32> %C, <4 x i32> %D, <4 x i32> %E, i64 0, i32* %A)
-  %tmp = getelementptr i32* %A, i64 %inc
+  %tmp = getelementptr i32, i32* %A, i64 %inc
   ret i32* %tmp
 }
 
@@ -5561,7 +5561,7 @@ define i32* @test_v2i32_post_imm_st4lane(i32* %A, i32** %ptr, <2 x i32> %B, <2 x
 ;CHECK-LABEL: test_v2i32_post_imm_st4lane:
 ;CHECK: st4.s { v0, v1, v2, v3 }[0], [x0], #16
   call void @llvm.aarch64.neon.st4lane.v2i32.p0i32(<2 x i32> %B, <2 x i32> %C, <2 x i32> %D, <2 x i32> %E, i64 0, i32* %A)
-  %tmp = getelementptr i32* %A, i32 4
+  %tmp = getelementptr i32, i32* %A, i32 4
   ret i32* %tmp
 }
 
@@ -5569,7 +5569,7 @@ define i32* @test_v2i32_post_reg_st4lane(i32* %A, i32** %ptr, <2 x i32> %B, <2 x
 ;CHECK-LABEL: test_v2i32_post_reg_st4lane:
 ;CHECK: st4.s { v0, v1, v2, v3 }[0], [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st4lane.v2i32.p0i32(<2 x i32> %B, <2 x i32> %C, <2 x i32> %D, <2 x i32> %E, i64 0, i32* %A)
-  %tmp = getelementptr i32* %A, i64 %inc
+  %tmp = getelementptr i32, i32* %A, i64 %inc
   ret i32* %tmp
 }
 
@@ -5580,7 +5580,7 @@ define i64* @test_v2i64_post_imm_st4lane(i64* %A, i64** %ptr, <2 x i64> %B, <2 x
 ;CHECK-LABEL: test_v2i64_post_imm_st4lane:
 ;CHECK: st4.d { v0, v1, v2, v3 }[0], [x0], #32
   call void @llvm.aarch64.neon.st4lane.v2i64.p0i64(<2 x i64> %B, <2 x i64> %C, <2 x i64> %D, <2 x i64> %E, i64 0, i64* %A)
-  %tmp = getelementptr i64* %A, i64 4
+  %tmp = getelementptr i64, i64* %A, i64 4
   ret i64* %tmp
 }
 
@@ -5588,7 +5588,7 @@ define i64* @test_v2i64_post_reg_st4lane(i64* %A, i64** %ptr, <2 x i64> %B, <2 x
 ;CHECK-LABEL: test_v2i64_post_reg_st4lane:
 ;CHECK: st4.d { v0, v1, v2, v3 }[0], [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st4lane.v2i64.p0i64(<2 x i64> %B, <2 x i64> %C, <2 x i64> %D, <2 x i64> %E, i64 0, i64* %A)
-  %tmp = getelementptr i64* %A, i64 %inc
+  %tmp = getelementptr i64, i64* %A, i64 %inc
   ret i64* %tmp
 }
 
@@ -5599,7 +5599,7 @@ define i64* @test_v1i64_post_imm_st4lane(i64* %A, i64** %ptr, <1 x i64> %B, <1 x
 ;CHECK-LABEL: test_v1i64_post_imm_st4lane:
 ;CHECK: st4.d { v0, v1, v2, v3 }[0], [x0], #32
   call void @llvm.aarch64.neon.st4lane.v1i64.p0i64(<1 x i64> %B, <1 x i64> %C, <1 x i64> %D, <1 x i64> %E, i64 0, i64* %A)
-  %tmp = getelementptr i64* %A, i64 4
+  %tmp = getelementptr i64, i64* %A, i64 4
   ret i64* %tmp
 }
 
@@ -5607,7 +5607,7 @@ define i64* @test_v1i64_post_reg_st4lane(i64* %A, i64** %ptr, <1 x i64> %B, <1 x
 ;CHECK-LABEL: test_v1i64_post_reg_st4lane:
 ;CHECK: st4.d { v0, v1, v2, v3 }[0], [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st4lane.v1i64.p0i64(<1 x i64> %B, <1 x i64> %C, <1 x i64> %D, <1 x i64> %E, i64 0, i64* %A)
-  %tmp = getelementptr i64* %A, i64 %inc
+  %tmp = getelementptr i64, i64* %A, i64 %inc
   ret i64* %tmp
 }
 
@@ -5618,7 +5618,7 @@ define float* @test_v4f32_post_imm_st4lane(float* %A, float** %ptr, <4 x float>
 ;CHECK-LABEL: test_v4f32_post_imm_st4lane:
 ;CHECK: st4.s { v0, v1, v2, v3 }[0], [x0], #16
   call void @llvm.aarch64.neon.st4lane.v4f32.p0f32(<4 x float> %B, <4 x float> %C, <4 x float> %D, <4 x float> %E, i64 0, float* %A)
-  %tmp = getelementptr float* %A, i32 4
+  %tmp = getelementptr float, float* %A, i32 4
   ret float* %tmp
 }
 
@@ -5626,7 +5626,7 @@ define float* @test_v4f32_post_reg_st4lane(float* %A, float** %ptr, <4 x float>
 ;CHECK-LABEL: test_v4f32_post_reg_st4lane:
 ;CHECK: st4.s { v0, v1, v2, v3 }[0], [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st4lane.v4f32.p0f32(<4 x float> %B, <4 x float> %C, <4 x float> %D, <4 x float> %E, i64 0, float* %A)
-  %tmp = getelementptr float* %A, i64 %inc
+  %tmp = getelementptr float, float* %A, i64 %inc
   ret float* %tmp
 }
 
@@ -5637,7 +5637,7 @@ define float* @test_v2f32_post_imm_st4lane(float* %A, float** %ptr, <2 x float>
 ;CHECK-LABEL: test_v2f32_post_imm_st4lane:
 ;CHECK: st4.s { v0, v1, v2, v3 }[0], [x0], #16
   call void @llvm.aarch64.neon.st4lane.v2f32.p0f32(<2 x float> %B, <2 x float> %C, <2 x float> %D, <2 x float> %E, i64 0, float* %A)
-  %tmp = getelementptr float* %A, i32 4
+  %tmp = getelementptr float, float* %A, i32 4
   ret float* %tmp
 }
 
@@ -5645,7 +5645,7 @@ define float* @test_v2f32_post_reg_st4lane(float* %A, float** %ptr, <2 x float>
 ;CHECK-LABEL: test_v2f32_post_reg_st4lane:
 ;CHECK: st4.s { v0, v1, v2, v3 }[0], [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st4lane.v2f32.p0f32(<2 x float> %B, <2 x float> %C, <2 x float> %D, <2 x float> %E, i64 0, float* %A)
-  %tmp = getelementptr float* %A, i64 %inc
+  %tmp = getelementptr float, float* %A, i64 %inc
   ret float* %tmp
 }
 
@@ -5656,7 +5656,7 @@ define double* @test_v2f64_post_imm_st4lane(double* %A, double** %ptr, <2 x doub
 ;CHECK-LABEL: test_v2f64_post_imm_st4lane:
 ;CHECK: st4.d { v0, v1, v2, v3 }[0], [x0], #32
   call void @llvm.aarch64.neon.st4lane.v2f64.p0f64(<2 x double> %B, <2 x double> %C, <2 x double> %D, <2 x double> %E, i64 0, double* %A)
-  %tmp = getelementptr double* %A, i64 4
+  %tmp = getelementptr double, double* %A, i64 4
   ret double* %tmp
 }
 
@@ -5664,7 +5664,7 @@ define double* @test_v2f64_post_reg_st4lane(double* %A, double** %ptr, <2 x doub
 ;CHECK-LABEL: test_v2f64_post_reg_st4lane:
 ;CHECK: st4.d { v0, v1, v2, v3 }[0], [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st4lane.v2f64.p0f64(<2 x double> %B, <2 x double> %C, <2 x double> %D, <2 x double> %E, i64 0, double* %A)
-  %tmp = getelementptr double* %A, i64 %inc
+  %tmp = getelementptr double, double* %A, i64 %inc
   ret double* %tmp
 }
 
@@ -5675,7 +5675,7 @@ define double* @test_v1f64_post_imm_st4lane(double* %A, double** %ptr, <1 x doub
 ;CHECK-LABEL: test_v1f64_post_imm_st4lane:
 ;CHECK: st4.d { v0, v1, v2, v3 }[0], [x0], #32
   call void @llvm.aarch64.neon.st4lane.v1f64.p0f64(<1 x double> %B, <1 x double> %C, <1 x double> %D, <1 x double> %E, i64 0, double* %A)
-  %tmp = getelementptr double* %A, i64 4
+  %tmp = getelementptr double, double* %A, i64 4
   ret double* %tmp
 }
 
@@ -5683,7 +5683,7 @@ define double* @test_v1f64_post_reg_st4lane(double* %A, double** %ptr, <1 x doub
 ;CHECK-LABEL: test_v1f64_post_reg_st4lane:
 ;CHECK: st4.d { v0, v1, v2, v3 }[0], [x0], x{{[0-9]+}}
   call void @llvm.aarch64.neon.st4lane.v1f64.p0f64(<1 x double> %B, <1 x double> %C, <1 x double> %D, <1 x double> %E, i64 0, double* %A)
-  %tmp = getelementptr double* %A, i64 %inc
+  %tmp = getelementptr double, double* %A, i64 %inc
   ret double* %tmp
 }
 
@@ -5692,7 +5692,7 @@ declare void @llvm.aarch64.neon.st4lane.v1f64.p0f64(<1 x double>, <1 x double>,
 define <16 x i8> @test_v16i8_post_imm_ld1r(i8* %bar, i8** %ptr) {
 ; CHECK-LABEL: test_v16i8_post_imm_ld1r:
 ; CHECK: ld1r.16b { v0 }, [x0], #1
-  %tmp1 = load i8* %bar
+  %tmp1 = load i8, i8* %bar
   %tmp2 = insertelement <16 x i8> <i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef>, i8 %tmp1, i32 0
   %tmp3 = insertelement <16 x i8> %tmp2, i8 %tmp1, i32 1
   %tmp4 = insertelement <16 x i8> %tmp3, i8 %tmp1, i32 2
@@ -5709,7 +5709,7 @@ define <16 x i8> @test_v16i8_post_imm_ld1r(i8* %bar, i8** %ptr) {
   %tmp15 = insertelement <16 x i8> %tmp14, i8 %tmp1, i32 13
   %tmp16 = insertelement <16 x i8> %tmp15, i8 %tmp1, i32 14
   %tmp17 = insertelement <16 x i8> %tmp16, i8 %tmp1, i32 15
-  %tmp18 = getelementptr i8* %bar, i64 1
+  %tmp18 = getelementptr i8, i8* %bar, i64 1
   store i8* %tmp18, i8** %ptr
   ret <16 x i8> %tmp17
 }
@@ -5717,7 +5717,7 @@ define <16 x i8> @test_v16i8_post_imm_ld1r(i8* %bar, i8** %ptr) {
 define <16 x i8> @test_v16i8_post_reg_ld1r(i8* %bar, i8** %ptr, i64 %inc) {
 ; CHECK-LABEL: test_v16i8_post_reg_ld1r:
 ; CHECK: ld1r.16b { v0 }, [x0], x{{[0-9]+}}
-  %tmp1 = load i8* %bar
+  %tmp1 = load i8, i8* %bar
   %tmp2 = insertelement <16 x i8> <i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef>, i8 %tmp1, i32 0
   %tmp3 = insertelement <16 x i8> %tmp2, i8 %tmp1, i32 1
   %tmp4 = insertelement <16 x i8> %tmp3, i8 %tmp1, i32 2
@@ -5734,7 +5734,7 @@ define <16 x i8> @test_v16i8_post_reg_ld1r(i8* %bar, i8** %ptr, i64 %inc) {
   %tmp15 = insertelement <16 x i8> %tmp14, i8 %tmp1, i32 13
   %tmp16 = insertelement <16 x i8> %tmp15, i8 %tmp1, i32 14
   %tmp17 = insertelement <16 x i8> %tmp16, i8 %tmp1, i32 15
-  %tmp18 = getelementptr i8* %bar, i64 %inc
+  %tmp18 = getelementptr i8, i8* %bar, i64 %inc
   store i8* %tmp18, i8** %ptr
   ret <16 x i8> %tmp17
 }
@@ -5742,7 +5742,7 @@ define <16 x i8> @test_v16i8_post_reg_ld1r(i8* %bar, i8** %ptr, i64 %inc) {
 define <8 x i8> @test_v8i8_post_imm_ld1r(i8* %bar, i8** %ptr) {
 ; CHECK-LABEL: test_v8i8_post_imm_ld1r:
 ; CHECK: ld1r.8b { v0 }, [x0], #1
-  %tmp1 = load i8* %bar
+  %tmp1 = load i8, i8* %bar
   %tmp2 = insertelement <8 x i8> <i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef>, i8 %tmp1, i32 0
   %tmp3 = insertelement <8 x i8> %tmp2, i8 %tmp1, i32 1
   %tmp4 = insertelement <8 x i8> %tmp3, i8 %tmp1, i32 2
@@ -5751,7 +5751,7 @@ define <8 x i8> @test_v8i8_post_imm_ld1r(i8* %bar, i8** %ptr) {
   %tmp7 = insertelement <8 x i8> %tmp6, i8 %tmp1, i32 5
   %tmp8 = insertelement <8 x i8> %tmp7, i8 %tmp1, i32 6
   %tmp9 = insertelement <8 x i8> %tmp8, i8 %tmp1, i32 7
-  %tmp10 = getelementptr i8* %bar, i64 1
+  %tmp10 = getelementptr i8, i8* %bar, i64 1
   store i8* %tmp10, i8** %ptr
   ret <8 x i8> %tmp9
 }
@@ -5759,7 +5759,7 @@ define <8 x i8> @test_v8i8_post_imm_ld1r(i8* %bar, i8** %ptr) {
 define <8 x i8> @test_v8i8_post_reg_ld1r(i8* %bar, i8** %ptr, i64 %inc) {
 ; CHECK-LABEL: test_v8i8_post_reg_ld1r:
 ; CHECK: ld1r.8b { v0 }, [x0], x{{[0-9]+}}
-  %tmp1 = load i8* %bar
+  %tmp1 = load i8, i8* %bar
   %tmp2 = insertelement <8 x i8> <i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef>, i8 %tmp1, i32 0
   %tmp3 = insertelement <8 x i8> %tmp2, i8 %tmp1, i32 1
   %tmp4 = insertelement <8 x i8> %tmp3, i8 %tmp1, i32 2
@@ -5768,7 +5768,7 @@ define <8 x i8> @test_v8i8_post_reg_ld1r(i8* %bar, i8** %ptr, i64 %inc) {
   %tmp7 = insertelement <8 x i8> %tmp6, i8 %tmp1, i32 5
   %tmp8 = insertelement <8 x i8> %tmp7, i8 %tmp1, i32 6
   %tmp9 = insertelement <8 x i8> %tmp8, i8 %tmp1, i32 7
-  %tmp10 = getelementptr i8* %bar, i64 %inc
+  %tmp10 = getelementptr i8, i8* %bar, i64 %inc
   store i8* %tmp10, i8** %ptr
   ret <8 x i8> %tmp9
 }
@@ -5776,7 +5776,7 @@ define <8 x i8> @test_v8i8_post_reg_ld1r(i8* %bar, i8** %ptr, i64 %inc) {
 define <8 x i16> @test_v8i16_post_imm_ld1r(i16* %bar, i16** %ptr) {
 ; CHECK-LABEL: test_v8i16_post_imm_ld1r:
 ; CHECK: ld1r.8h { v0 }, [x0], #2
-  %tmp1 = load i16* %bar
+  %tmp1 = load i16, i16* %bar
   %tmp2 = insertelement <8 x i16> <i16 undef, i16 undef, i16 undef, i16 undef, i16 undef, i16 undef, i16 undef, i16 undef>, i16 %tmp1, i32 0
   %tmp3 = insertelement <8 x i16> %tmp2, i16 %tmp1, i32 1
   %tmp4 = insertelement <8 x i16> %tmp3, i16 %tmp1, i32 2
@@ -5785,7 +5785,7 @@ define <8 x i16> @test_v8i16_post_imm_ld1r(i16* %bar, i16** %ptr) {
   %tmp7 = insertelement <8 x i16> %tmp6, i16 %tmp1, i32 5
   %tmp8 = insertelement <8 x i16> %tmp7, i16 %tmp1, i32 6
   %tmp9 = insertelement <8 x i16> %tmp8, i16 %tmp1, i32 7
-  %tmp10 = getelementptr i16* %bar, i64 1
+  %tmp10 = getelementptr i16, i16* %bar, i64 1
   store i16* %tmp10, i16** %ptr
   ret <8 x i16> %tmp9
 }
@@ -5793,7 +5793,7 @@ define <8 x i16> @test_v8i16_post_imm_ld1r(i16* %bar, i16** %ptr) {
 define <8 x i16> @test_v8i16_post_reg_ld1r(i16* %bar, i16** %ptr, i64 %inc) {
 ; CHECK-LABEL: test_v8i16_post_reg_ld1r:
 ; CHECK: ld1r.8h { v0 }, [x0], x{{[0-9]+}}
-  %tmp1 = load i16* %bar
+  %tmp1 = load i16, i16* %bar
   %tmp2 = insertelement <8 x i16> <i16 undef, i16 undef, i16 undef, i16 undef, i16 undef, i16 undef, i16 undef, i16 undef>, i16 %tmp1, i32 0
   %tmp3 = insertelement <8 x i16> %tmp2, i16 %tmp1, i32 1
   %tmp4 = insertelement <8 x i16> %tmp3, i16 %tmp1, i32 2
@@ -5802,7 +5802,7 @@ define <8 x i16> @test_v8i16_post_reg_ld1r(i16* %bar, i16** %ptr, i64 %inc) {
   %tmp7 = insertelement <8 x i16> %tmp6, i16 %tmp1, i32 5
   %tmp8 = insertelement <8 x i16> %tmp7, i16 %tmp1, i32 6
   %tmp9 = insertelement <8 x i16> %tmp8, i16 %tmp1, i32 7
-  %tmp10 = getelementptr i16* %bar, i64 %inc
+  %tmp10 = getelementptr i16, i16* %bar, i64 %inc
   store i16* %tmp10, i16** %ptr
   ret <8 x i16> %tmp9
 }
@@ -5810,12 +5810,12 @@ define <8 x i16> @test_v8i16_post_reg_ld1r(i16* %bar, i16** %ptr, i64 %inc) {
 define <4 x i16> @test_v4i16_post_imm_ld1r(i16* %bar, i16** %ptr) {
 ; CHECK-LABEL: test_v4i16_post_imm_ld1r:
 ; CHECK: ld1r.4h { v0 }, [x0], #2
-  %tmp1 = load i16* %bar
+  %tmp1 = load i16, i16* %bar
   %tmp2 = insertelement <4 x i16> <i16 undef, i16 undef, i16 undef, i16 undef>, i16 %tmp1, i32 0
   %tmp3 = insertelement <4 x i16> %tmp2, i16 %tmp1, i32 1
   %tmp4 = insertelement <4 x i16> %tmp3, i16 %tmp1, i32 2
   %tmp5 = insertelement <4 x i16> %tmp4, i16 %tmp1, i32 3
-  %tmp6 = getelementptr i16* %bar, i64 1
+  %tmp6 = getelementptr i16, i16* %bar, i64 1
   store i16* %tmp6, i16** %ptr
   ret <4 x i16> %tmp5
 }
@@ -5823,12 +5823,12 @@ define <4 x i16> @test_v4i16_post_imm_ld1r(i16* %bar, i16** %ptr) {
 define <4 x i16> @test_v4i16_post_reg_ld1r(i16* %bar, i16** %ptr, i64 %inc) {
 ; CHECK-LABEL: test_v4i16_post_reg_ld1r:
 ; CHECK: ld1r.4h { v0 }, [x0], x{{[0-9]+}}
-  %tmp1 = load i16* %bar
+  %tmp1 = load i16, i16* %bar
   %tmp2 = insertelement <4 x i16> <i16 undef, i16 undef, i16 undef, i16 undef>, i16 %tmp1, i32 0
   %tmp3 = insertelement <4 x i16> %tmp2, i16 %tmp1, i32 1
   %tmp4 = insertelement <4 x i16> %tmp3, i16 %tmp1, i32 2
   %tmp5 = insertelement <4 x i16> %tmp4, i16 %tmp1, i32 3
-  %tmp6 = getelementptr i16* %bar, i64 %inc
+  %tmp6 = getelementptr i16, i16* %bar, i64 %inc
   store i16* %tmp6, i16** %ptr
   ret <4 x i16> %tmp5
 }
@@ -5836,12 +5836,12 @@ define <4 x i16> @test_v4i16_post_reg_ld1r(i16* %bar, i16** %ptr, i64 %inc) {
 define <4 x i32> @test_v4i32_post_imm_ld1r(i32* %bar, i32** %ptr) {
 ; CHECK-LABEL: test_v4i32_post_imm_ld1r:
 ; CHECK: ld1r.4s { v0 }, [x0], #4
-  %tmp1 = load i32* %bar
+  %tmp1 = load i32, i32* %bar
   %tmp2 = insertelement <4 x i32> <i32 undef, i32 undef, i32 undef, i32 undef>, i32 %tmp1, i32 0
   %tmp3 = insertelement <4 x i32> %tmp2, i32 %tmp1, i32 1
   %tmp4 = insertelement <4 x i32> %tmp3, i32 %tmp1, i32 2
   %tmp5 = insertelement <4 x i32> %tmp4, i32 %tmp1, i32 3
-  %tmp6 = getelementptr i32* %bar, i64 1
+  %tmp6 = getelementptr i32, i32* %bar, i64 1
   store i32* %tmp6, i32** %ptr
   ret <4 x i32> %tmp5
 }
@@ -5849,12 +5849,12 @@ define <4 x i32> @test_v4i32_post_imm_ld1r(i32* %bar, i32** %ptr) {
 define <4 x i32> @test_v4i32_post_reg_ld1r(i32* %bar, i32** %ptr, i64 %inc) {
 ; CHECK-LABEL: test_v4i32_post_reg_ld1r:
 ; CHECK: ld1r.4s { v0 }, [x0], x{{[0-9]+}}
-  %tmp1 = load i32* %bar
+  %tmp1 = load i32, i32* %bar
   %tmp2 = insertelement <4 x i32> <i32 undef, i32 undef, i32 undef, i32 undef>, i32 %tmp1, i32 0
   %tmp3 = insertelement <4 x i32> %tmp2, i32 %tmp1, i32 1
   %tmp4 = insertelement <4 x i32> %tmp3, i32 %tmp1, i32 2
   %tmp5 = insertelement <4 x i32> %tmp4, i32 %tmp1, i32 3
-  %tmp6 = getelementptr i32* %bar, i64 %inc
+  %tmp6 = getelementptr i32, i32* %bar, i64 %inc
   store i32* %tmp6, i32** %ptr
   ret <4 x i32> %tmp5
 }
@@ -5862,10 +5862,10 @@ define <4 x i32> @test_v4i32_post_reg_ld1r(i32* %bar, i32** %ptr, i64 %inc) {
 define <2 x i32> @test_v2i32_post_imm_ld1r(i32* %bar, i32** %ptr) {
 ; CHECK-LABEL: test_v2i32_post_imm_ld1r:
 ; CHECK: ld1r.2s { v0 }, [x0], #4
-  %tmp1 = load i32* %bar
+  %tmp1 = load i32, i32* %bar
   %tmp2 = insertelement <2 x i32> <i32 undef, i32 undef>, i32 %tmp1, i32 0
   %tmp3 = insertelement <2 x i32> %tmp2, i32 %tmp1, i32 1
-  %tmp4 = getelementptr i32* %bar, i64 1
+  %tmp4 = getelementptr i32, i32* %bar, i64 1
   store i32* %tmp4, i32** %ptr
   ret <2 x i32> %tmp3
 }
@@ -5873,10 +5873,10 @@ define <2 x i32> @test_v2i32_post_imm_ld1r(i32* %bar, i32** %ptr) {
 define <2 x i32> @test_v2i32_post_reg_ld1r(i32* %bar, i32** %ptr, i64 %inc) {
 ; CHECK-LABEL: test_v2i32_post_reg_ld1r:
 ; CHECK: ld1r.2s { v0 }, [x0], x{{[0-9]+}}
-  %tmp1 = load i32* %bar
+  %tmp1 = load i32, i32* %bar
   %tmp2 = insertelement <2 x i32> <i32 undef, i32 undef>, i32 %tmp1, i32 0
   %tmp3 = insertelement <2 x i32> %tmp2, i32 %tmp1, i32 1
-  %tmp4 = getelementptr i32* %bar, i64 %inc
+  %tmp4 = getelementptr i32, i32* %bar, i64 %inc
   store i32* %tmp4, i32** %ptr
   ret <2 x i32> %tmp3
 }
@@ -5884,10 +5884,10 @@ define <2 x i32> @test_v2i32_post_reg_ld1r(i32* %bar, i32** %ptr, i64 %inc) {
 define <2 x i64> @test_v2i64_post_imm_ld1r(i64* %bar, i64** %ptr) {
 ; CHECK-LABEL: test_v2i64_post_imm_ld1r:
 ; CHECK: ld1r.2d { v0 }, [x0], #8
-  %tmp1 = load i64* %bar
+  %tmp1 = load i64, i64* %bar
   %tmp2 = insertelement <2 x i64> <i64 undef, i64 undef>, i64 %tmp1, i32 0
   %tmp3 = insertelement <2 x i64> %tmp2, i64 %tmp1, i32 1
-  %tmp4 = getelementptr i64* %bar, i64 1
+  %tmp4 = getelementptr i64, i64* %bar, i64 1
   store i64* %tmp4, i64** %ptr
   ret <2 x i64> %tmp3
 }
@@ -5895,10 +5895,10 @@ define <2 x i64> @test_v2i64_post_imm_ld1r(i64* %bar, i64** %ptr) {
 define <2 x i64> @test_v2i64_post_reg_ld1r(i64* %bar, i64** %ptr, i64 %inc) {
 ; CHECK-LABEL: test_v2i64_post_reg_ld1r:
 ; CHECK: ld1r.2d { v0 }, [x0], x{{[0-9]+}}
-  %tmp1 = load i64* %bar
+  %tmp1 = load i64, i64* %bar
   %tmp2 = insertelement <2 x i64> <i64 undef, i64 undef>, i64 %tmp1, i32 0
   %tmp3 = insertelement <2 x i64> %tmp2, i64 %tmp1, i32 1
-  %tmp4 = getelementptr i64* %bar, i64 %inc
+  %tmp4 = getelementptr i64, i64* %bar, i64 %inc
   store i64* %tmp4, i64** %ptr
   ret <2 x i64> %tmp3
 }
@@ -5906,12 +5906,12 @@ define <2 x i64> @test_v2i64_post_reg_ld1r(i64* %bar, i64** %ptr, i64 %inc) {
 define <4 x float> @test_v4f32_post_imm_ld1r(float* %bar, float** %ptr) {
 ; CHECK-LABEL: test_v4f32_post_imm_ld1r:
 ; CHECK: ld1r.4s { v0 }, [x0], #4
-  %tmp1 = load float* %bar
+  %tmp1 = load float, float* %bar
   %tmp2 = insertelement <4 x float> <float undef, float undef, float undef, float undef>, float %tmp1, i32 0
   %tmp3 = insertelement <4 x float> %tmp2, float %tmp1, i32 1
   %tmp4 = insertelement <4 x float> %tmp3, float %tmp1, i32 2
   %tmp5 = insertelement <4 x float> %tmp4, float %tmp1, i32 3
-  %tmp6 = getelementptr float* %bar, i64 1
+  %tmp6 = getelementptr float, float* %bar, i64 1
   store float* %tmp6, float** %ptr
   ret <4 x float> %tmp5
 }
@@ -5919,12 +5919,12 @@ define <4 x float> @test_v4f32_post_imm_ld1r(float* %bar, float** %ptr) {
 define <4 x float> @test_v4f32_post_reg_ld1r(float* %bar, float** %ptr, i64 %inc) {
 ; CHECK-LABEL: test_v4f32_post_reg_ld1r:
 ; CHECK: ld1r.4s { v0 }, [x0], x{{[0-9]+}}
-  %tmp1 = load float* %bar
+  %tmp1 = load float, float* %bar
   %tmp2 = insertelement <4 x float> <float undef, float undef, float undef, float undef>, float %tmp1, i32 0
   %tmp3 = insertelement <4 x float> %tmp2, float %tmp1, i32 1
   %tmp4 = insertelement <4 x float> %tmp3, float %tmp1, i32 2
   %tmp5 = insertelement <4 x float> %tmp4, float %tmp1, i32 3
-  %tmp6 = getelementptr float* %bar, i64 %inc
+  %tmp6 = getelementptr float, float* %bar, i64 %inc
   store float* %tmp6, float** %ptr
   ret <4 x float> %tmp5
 }
@@ -5932,10 +5932,10 @@ define <4 x float> @test_v4f32_post_reg_ld1r(float* %bar, float** %ptr, i64 %inc
 define <2 x float> @test_v2f32_post_imm_ld1r(float* %bar, float** %ptr) {
 ; CHECK-LABEL: test_v2f32_post_imm_ld1r:
 ; CHECK: ld1r.2s { v0 }, [x0], #4
-  %tmp1 = load float* %bar
+  %tmp1 = load float, float* %bar
   %tmp2 = insertelement <2 x float> <float undef, float undef>, float %tmp1, i32 0
   %tmp3 = insertelement <2 x float> %tmp2, float %tmp1, i32 1
-  %tmp4 = getelementptr float* %bar, i64 1
+  %tmp4 = getelementptr float, float* %bar, i64 1
   store float* %tmp4, float** %ptr
   ret <2 x float> %tmp3
 }
@@ -5943,10 +5943,10 @@ define <2 x float> @test_v2f32_post_imm_ld1r(float* %bar, float** %ptr) {
 define <2 x float> @test_v2f32_post_reg_ld1r(float* %bar, float** %ptr, i64 %inc) {
 ; CHECK-LABEL: test_v2f32_post_reg_ld1r:
 ; CHECK: ld1r.2s { v0 }, [x0], x{{[0-9]+}}
-  %tmp1 = load float* %bar
+  %tmp1 = load float, float* %bar
   %tmp2 = insertelement <2 x float> <float undef, float undef>, float %tmp1, i32 0
   %tmp3 = insertelement <2 x float> %tmp2, float %tmp1, i32 1
-  %tmp4 = getelementptr float* %bar, i64 %inc
+  %tmp4 = getelementptr float, float* %bar, i64 %inc
   store float* %tmp4, float** %ptr
   ret <2 x float> %tmp3
 }
@@ -5954,10 +5954,10 @@ define <2 x float> @test_v2f32_post_reg_ld1r(float* %bar, float** %ptr, i64 %inc
 define <2 x double> @test_v2f64_post_imm_ld1r(double* %bar, double** %ptr) {
 ; CHECK-LABEL: test_v2f64_post_imm_ld1r:
 ; CHECK: ld1r.2d { v0 }, [x0], #8
-  %tmp1 = load double* %bar
+  %tmp1 = load double, double* %bar
   %tmp2 = insertelement <2 x double> <double undef, double undef>, double %tmp1, i32 0
   %tmp3 = insertelement <2 x double> %tmp2, double %tmp1, i32 1
-  %tmp4 = getelementptr double* %bar, i64 1
+  %tmp4 = getelementptr double, double* %bar, i64 1
   store double* %tmp4, double** %ptr
   ret <2 x double> %tmp3
 }
@@ -5965,10 +5965,10 @@ define <2 x double> @test_v2f64_post_imm_ld1r(double* %bar, double** %ptr) {
 define <2 x double> @test_v2f64_post_reg_ld1r(double* %bar, double** %ptr, i64 %inc) {
 ; CHECK-LABEL: test_v2f64_post_reg_ld1r:
 ; CHECK: ld1r.2d { v0 }, [x0], x{{[0-9]+}}
-  %tmp1 = load double* %bar
+  %tmp1 = load double, double* %bar
   %tmp2 = insertelement <2 x double> <double undef, double undef>, double %tmp1, i32 0
   %tmp3 = insertelement <2 x double> %tmp2, double %tmp1, i32 1
-  %tmp4 = getelementptr double* %bar, i64 %inc
+  %tmp4 = getelementptr double, double* %bar, i64 %inc
   store double* %tmp4, double** %ptr
   ret <2 x double> %tmp3
 }
@@ -5976,9 +5976,9 @@ define <2 x double> @test_v2f64_post_reg_ld1r(double* %bar, double** %ptr, i64 %
 define <16 x i8> @test_v16i8_post_imm_ld1lane(i8* %bar, i8** %ptr, <16 x i8> %A) {
 ; CHECK-LABEL: test_v16i8_post_imm_ld1lane:
 ; CHECK: ld1.b { v0 }[1], [x0], #1
-  %tmp1 = load i8* %bar
+  %tmp1 = load i8, i8* %bar
   %tmp2 = insertelement <16 x i8> %A, i8 %tmp1, i32 1
-  %tmp3 = getelementptr i8* %bar, i64 1
+  %tmp3 = getelementptr i8, i8* %bar, i64 1
   store i8* %tmp3, i8** %ptr
   ret <16 x i8> %tmp2
 }
@@ -5986,9 +5986,9 @@ define <16 x i8> @test_v16i8_post_imm_ld1lane(i8* %bar, i8** %ptr, <16 x i8> %A)
 define <16 x i8> @test_v16i8_post_reg_ld1lane(i8* %bar, i8** %ptr, i64 %inc, <16 x i8> %A) {
 ; CHECK-LABEL: test_v16i8_post_reg_ld1lane:
 ; CHECK: ld1.b { v0 }[1], [x0], x{{[0-9]+}}
-  %tmp1 = load i8* %bar
+  %tmp1 = load i8, i8* %bar
   %tmp2 = insertelement <16 x i8> %A, i8 %tmp1, i32 1
-  %tmp3 = getelementptr i8* %bar, i64 %inc
+  %tmp3 = getelementptr i8, i8* %bar, i64 %inc
   store i8* %tmp3, i8** %ptr
   ret <16 x i8> %tmp2
 }
@@ -5996,9 +5996,9 @@ define <16 x i8> @test_v16i8_post_reg_ld1lane(i8* %bar, i8** %ptr, i64 %inc, <16
 define <8 x i8> @test_v8i8_post_imm_ld1lane(i8* %bar, i8** %ptr, <8 x i8> %A) {
 ; CHECK-LABEL: test_v8i8_post_imm_ld1lane:
 ; CHECK: ld1.b { v0 }[1], [x0], #1
-  %tmp1 = load i8* %bar
+  %tmp1 = load i8, i8* %bar
   %tmp2 = insertelement <8 x i8> %A, i8 %tmp1, i32 1
-  %tmp3 = getelementptr i8* %bar, i64 1
+  %tmp3 = getelementptr i8, i8* %bar, i64 1
   store i8* %tmp3, i8** %ptr
   ret <8 x i8> %tmp2
 }
@@ -6006,9 +6006,9 @@ define <8 x i8> @test_v8i8_post_imm_ld1lane(i8* %bar, i8** %ptr, <8 x i8> %A) {
 define <8 x i8> @test_v8i8_post_reg_ld1lane(i8* %bar, i8** %ptr, i64 %inc, <8 x i8> %A) {
 ; CHECK-LABEL: test_v8i8_post_reg_ld1lane:
 ; CHECK: ld1.b { v0 }[1], [x0], x{{[0-9]+}}
-  %tmp1 = load i8* %bar
+  %tmp1 = load i8, i8* %bar
   %tmp2 = insertelement <8 x i8> %A, i8 %tmp1, i32 1
-  %tmp3 = getelementptr i8* %bar, i64 %inc
+  %tmp3 = getelementptr i8, i8* %bar, i64 %inc
   store i8* %tmp3, i8** %ptr
   ret <8 x i8> %tmp2
 }
@@ -6016,9 +6016,9 @@ define <8 x i8> @test_v8i8_post_reg_ld1lane(i8* %bar, i8** %ptr, i64 %inc, <8 x
 define <8 x i16> @test_v8i16_post_imm_ld1lane(i16* %bar, i16** %ptr, <8 x i16> %A) {
 ; CHECK-LABEL: test_v8i16_post_imm_ld1lane:
 ; CHECK: ld1.h { v0 }[1], [x0], #2
-  %tmp1 = load i16* %bar
+  %tmp1 = load i16, i16* %bar
   %tmp2 = insertelement <8 x i16> %A, i16 %tmp1, i32 1
-  %tmp3 = getelementptr i16* %bar, i64 1
+  %tmp3 = getelementptr i16, i16* %bar, i64 1
   store i16* %tmp3, i16** %ptr
   ret <8 x i16> %tmp2
 }
@@ -6026,9 +6026,9 @@ define <8 x i16> @test_v8i16_post_imm_ld1lane(i16* %bar, i16** %ptr, <8 x i16> %
 define <8 x i16> @test_v8i16_post_reg_ld1lane(i16* %bar, i16** %ptr, i64 %inc, <8 x i16> %A) {
 ; CHECK-LABEL: test_v8i16_post_reg_ld1lane:
 ; CHECK: ld1.h { v0 }[1], [x0], x{{[0-9]+}}
-  %tmp1 = load i16* %bar
+  %tmp1 = load i16, i16* %bar
   %tmp2 = insertelement <8 x i16> %A, i16 %tmp1, i32 1
-  %tmp3 = getelementptr i16* %bar, i64 %inc
+  %tmp3 = getelementptr i16, i16* %bar, i64 %inc
   store i16* %tmp3, i16** %ptr
   ret <8 x i16> %tmp2
 }
@@ -6036,9 +6036,9 @@ define <8 x i16> @test_v8i16_post_reg_ld1lane(i16* %bar, i16** %ptr, i64 %inc, <
 define <4 x i16> @test_v4i16_post_imm_ld1lane(i16* %bar, i16** %ptr, <4 x i16> %A) {
 ; CHECK-LABEL: test_v4i16_post_imm_ld1lane:
 ; CHECK: ld1.h { v0 }[1], [x0], #2
-  %tmp1 = load i16* %bar
+  %tmp1 = load i16, i16* %bar
   %tmp2 = insertelement <4 x i16> %A, i16 %tmp1, i32 1
-  %tmp3 = getelementptr i16* %bar, i64 1
+  %tmp3 = getelementptr i16, i16* %bar, i64 1
   store i16* %tmp3, i16** %ptr
   ret <4 x i16> %tmp2
 }
@@ -6046,9 +6046,9 @@ define <4 x i16> @test_v4i16_post_imm_ld1lane(i16* %bar, i16** %ptr, <4 x i16> %
 define <4 x i16> @test_v4i16_post_reg_ld1lane(i16* %bar, i16** %ptr, i64 %inc, <4 x i16> %A) {
 ; CHECK-LABEL: test_v4i16_post_reg_ld1lane:
 ; CHECK: ld1.h { v0 }[1], [x0], x{{[0-9]+}}
-  %tmp1 = load i16* %bar
+  %tmp1 = load i16, i16* %bar
   %tmp2 = insertelement <4 x i16> %A, i16 %tmp1, i32 1
-  %tmp3 = getelementptr i16* %bar, i64 %inc
+  %tmp3 = getelementptr i16, i16* %bar, i64 %inc
   store i16* %tmp3, i16** %ptr
   ret <4 x i16> %tmp2
 }
@@ -6056,9 +6056,9 @@ define <4 x i16> @test_v4i16_post_reg_ld1lane(i16* %bar, i16** %ptr, i64 %inc, <
 define <4 x i32> @test_v4i32_post_imm_ld1lane(i32* %bar, i32** %ptr, <4 x i32> %A) {
 ; CHECK-LABEL: test_v4i32_post_imm_ld1lane:
 ; CHECK: ld1.s { v0 }[1], [x0], #4
-  %tmp1 = load i32* %bar
+  %tmp1 = load i32, i32* %bar
   %tmp2 = insertelement <4 x i32> %A, i32 %tmp1, i32 1
-  %tmp3 = getelementptr i32* %bar, i64 1
+  %tmp3 = getelementptr i32, i32* %bar, i64 1
   store i32* %tmp3, i32** %ptr
   ret <4 x i32> %tmp2
 }
@@ -6066,9 +6066,9 @@ define <4 x i32> @test_v4i32_post_imm_ld1lane(i32* %bar, i32** %ptr, <4 x i32> %
 define <4 x i32> @test_v4i32_post_reg_ld1lane(i32* %bar, i32** %ptr, i64 %inc, <4 x i32> %A) {
 ; CHECK-LABEL: test_v4i32_post_reg_ld1lane:
 ; CHECK: ld1.s { v0 }[1], [x0], x{{[0-9]+}}
-  %tmp1 = load i32* %bar
+  %tmp1 = load i32, i32* %bar
   %tmp2 = insertelement <4 x i32> %A, i32 %tmp1, i32 1
-  %tmp3 = getelementptr i32* %bar, i64 %inc
+  %tmp3 = getelementptr i32, i32* %bar, i64 %inc
   store i32* %tmp3, i32** %ptr
   ret <4 x i32> %tmp2
 }
@@ -6076,9 +6076,9 @@ define <4 x i32> @test_v4i32_post_reg_ld1lane(i32* %bar, i32** %ptr, i64 %inc, <
 define <2 x i32> @test_v2i32_post_imm_ld1lane(i32* %bar, i32** %ptr, <2 x i32> %A) {
 ; CHECK-LABEL: test_v2i32_post_imm_ld1lane:
 ; CHECK: ld1.s { v0 }[1], [x0], #4
-  %tmp1 = load i32* %bar
+  %tmp1 = load i32, i32* %bar
   %tmp2 = insertelement <2 x i32> %A, i32 %tmp1, i32 1
-  %tmp3 = getelementptr i32* %bar, i64 1
+  %tmp3 = getelementptr i32, i32* %bar, i64 1
   store i32* %tmp3, i32** %ptr
   ret <2 x i32> %tmp2
 }
@@ -6086,9 +6086,9 @@ define <2 x i32> @test_v2i32_post_imm_ld1lane(i32* %bar, i32** %ptr, <2 x i32> %
 define <2 x i32> @test_v2i32_post_reg_ld1lane(i32* %bar, i32** %ptr, i64 %inc, <2 x i32> %A) {
 ; CHECK-LABEL: test_v2i32_post_reg_ld1lane:
 ; CHECK: ld1.s { v0 }[1], [x0], x{{[0-9]+}}
-  %tmp1 = load i32* %bar
+  %tmp1 = load i32, i32* %bar
   %tmp2 = insertelement <2 x i32> %A, i32 %tmp1, i32 1
-  %tmp3 = getelementptr i32* %bar, i64 %inc
+  %tmp3 = getelementptr i32, i32* %bar, i64 %inc
   store i32* %tmp3, i32** %ptr
   ret <2 x i32> %tmp2
 }
@@ -6096,9 +6096,9 @@ define <2 x i32> @test_v2i32_post_reg_ld1lane(i32* %bar, i32** %ptr, i64 %inc, <
 define <2 x i64> @test_v2i64_post_imm_ld1lane(i64* %bar, i64** %ptr, <2 x i64> %A) {
 ; CHECK-LABEL: test_v2i64_post_imm_ld1lane:
 ; CHECK: ld1.d { v0 }[1], [x0], #8
-  %tmp1 = load i64* %bar
+  %tmp1 = load i64, i64* %bar
   %tmp2 = insertelement <2 x i64> %A, i64 %tmp1, i32 1
-  %tmp3 = getelementptr i64* %bar, i64 1
+  %tmp3 = getelementptr i64, i64* %bar, i64 1
   store i64* %tmp3, i64** %ptr
   ret <2 x i64> %tmp2
 }
@@ -6106,9 +6106,9 @@ define <2 x i64> @test_v2i64_post_imm_ld1lane(i64* %bar, i64** %ptr, <2 x i64> %
 define <2 x i64> @test_v2i64_post_reg_ld1lane(i64* %bar, i64** %ptr, i64 %inc, <2 x i64> %A) {
 ; CHECK-LABEL: test_v2i64_post_reg_ld1lane:
 ; CHECK: ld1.d { v0 }[1], [x0], x{{[0-9]+}}
-  %tmp1 = load i64* %bar
+  %tmp1 = load i64, i64* %bar
   %tmp2 = insertelement <2 x i64> %A, i64 %tmp1, i32 1
-  %tmp3 = getelementptr i64* %bar, i64 %inc
+  %tmp3 = getelementptr i64, i64* %bar, i64 %inc
   store i64* %tmp3, i64** %ptr
   ret <2 x i64> %tmp2
 }
@@ -6116,9 +6116,9 @@ define <2 x i64> @test_v2i64_post_reg_ld1lane(i64* %bar, i64** %ptr, i64 %inc, <
 define <4 x float> @test_v4f32_post_imm_ld1lane(float* %bar, float** %ptr, <4 x float> %A) {
 ; CHECK-LABEL: test_v4f32_post_imm_ld1lane:
 ; CHECK: ld1.s { v0 }[1], [x0], #4
-  %tmp1 = load float* %bar
+  %tmp1 = load float, float* %bar
   %tmp2 = insertelement <4 x float> %A, float %tmp1, i32 1
-  %tmp3 = getelementptr float* %bar, i64 1
+  %tmp3 = getelementptr float, float* %bar, i64 1
   store float* %tmp3, float** %ptr
   ret <4 x float> %tmp2
 }
@@ -6126,9 +6126,9 @@ define <4 x float> @test_v4f32_post_imm_ld1lane(float* %bar, float** %ptr, <4 x
 define <4 x float> @test_v4f32_post_reg_ld1lane(float* %bar, float** %ptr, i64 %inc, <4 x float> %A) {
 ; CHECK-LABEL: test_v4f32_post_reg_ld1lane:
 ; CHECK: ld1.s { v0 }[1], [x0], x{{[0-9]+}}
-  %tmp1 = load float* %bar
+  %tmp1 = load float, float* %bar
   %tmp2 = insertelement <4 x float> %A, float %tmp1, i32 1
-  %tmp3 = getelementptr float* %bar, i64 %inc
+  %tmp3 = getelementptr float, float* %bar, i64 %inc
   store float* %tmp3, float** %ptr
   ret <4 x float> %tmp2
 }
@@ -6136,9 +6136,9 @@ define <4 x float> @test_v4f32_post_reg_ld1lane(float* %bar, float** %ptr, i64 %
 define <2 x float> @test_v2f32_post_imm_ld1lane(float* %bar, float** %ptr, <2 x float> %A) {
 ; CHECK-LABEL: test_v2f32_post_imm_ld1lane:
 ; CHECK: ld1.s { v0 }[1], [x0], #4
-  %tmp1 = load float* %bar
+  %tmp1 = load float, float* %bar
   %tmp2 = insertelement <2 x float> %A, float %tmp1, i32 1
-  %tmp3 = getelementptr float* %bar, i64 1
+  %tmp3 = getelementptr float, float* %bar, i64 1
   store float* %tmp3, float** %ptr
   ret <2 x float> %tmp2
 }
@@ -6146,9 +6146,9 @@ define <2 x float> @test_v2f32_post_imm_ld1lane(float* %bar, float** %ptr, <2 x
 define <2 x float> @test_v2f32_post_reg_ld1lane(float* %bar, float** %ptr, i64 %inc, <2 x float> %A) {
 ; CHECK-LABEL: test_v2f32_post_reg_ld1lane:
 ; CHECK: ld1.s { v0 }[1], [x0], x{{[0-9]+}}
-  %tmp1 = load float* %bar
+  %tmp1 = load float, float* %bar
   %tmp2 = insertelement <2 x float> %A, float %tmp1, i32 1
-  %tmp3 = getelementptr float* %bar, i64 %inc
+  %tmp3 = getelementptr float, float* %bar, i64 %inc
   store float* %tmp3, float** %ptr
   ret <2 x float> %tmp2
 }
@@ -6156,9 +6156,9 @@ define <2 x float> @test_v2f32_post_reg_ld1lane(float* %bar, float** %ptr, i64 %
 define <2 x double> @test_v2f64_post_imm_ld1lane(double* %bar, double** %ptr, <2 x double> %A) {
 ; CHECK-LABEL: test_v2f64_post_imm_ld1lane:
 ; CHECK: ld1.d { v0 }[1], [x0], #8
-  %tmp1 = load double* %bar
+  %tmp1 = load double, double* %bar
   %tmp2 = insertelement <2 x double> %A, double %tmp1, i32 1
-  %tmp3 = getelementptr double* %bar, i64 1
+  %tmp3 = getelementptr double, double* %bar, i64 1
   store double* %tmp3, double** %ptr
   ret <2 x double> %tmp2
 }
@@ -6166,9 +6166,76 @@ define <2 x double> @test_v2f64_post_imm_ld1lane(double* %bar, double** %ptr, <2
 define <2 x double> @test_v2f64_post_reg_ld1lane(double* %bar, double** %ptr, i64 %inc, <2 x double> %A) {
 ; CHECK-LABEL: test_v2f64_post_reg_ld1lane:
 ; CHECK: ld1.d { v0 }[1], [x0], x{{[0-9]+}}
-  %tmp1 = load double* %bar
+  %tmp1 = load double, double* %bar
   %tmp2 = insertelement <2 x double> %A, double %tmp1, i32 1
-  %tmp3 = getelementptr double* %bar, i64 %inc
+  %tmp3 = getelementptr double, double* %bar, i64 %inc
   store double* %tmp3, double** %ptr
   ret <2 x double> %tmp2
-}
\ No newline at end of file
+}
+
+; Check for dependencies between the vector and the scalar load.
+define <4 x float> @test_v4f32_post_reg_ld1lane_dep_vec_on_load(float* %bar, float** %ptr, i64 %inc, <4 x float>* %dep_ptr_1, <4 x float>* %dep_ptr_2) {
+; CHECK-LABEL: test_v4f32_post_reg_ld1lane_dep_vec_on_load:
+; CHECK: BB#0:
+; CHECK-NEXT: ldr s[[LD:[0-9]+]], [x0]
+; CHECK-NEXT: movi.2d v0, #0000000000000000
+; CHECK-NEXT: str q0, [x3]
+; CHECK-NEXT: ldr q0, [x4]
+; CHECK-NEXT: ins.s v0[1], v[[LD]][0]
+; CHECK-NEXT: add [[POST:x[0-9]]], x0, x2, lsl #2
+; CHECK-NEXT: str [[POST]], [x1]
+; CHECK-NEXT: ret
+  %tmp1 = load float, float* %bar
+  store <4 x float> zeroinitializer, <4 x float>* %dep_ptr_1, align 16
+  %A = load <4 x float>, <4 x float>* %dep_ptr_2, align 16
+  %tmp2 = insertelement <4 x float> %A, float %tmp1, i32 1
+  %tmp3 = getelementptr float, float* %bar, i64 %inc
+  store float* %tmp3, float** %ptr
+  ret <4 x float> %tmp2
+}
+
+; Make sure that we test the narrow V64 code path.
+; The tests above don't, because there, 64-bit insert_vector_elt nodes will be
+; widened to 128-bit before the LD1LANEpost combine has the chance to run,
+; making it avoid narrow vector types.
+; One way to trick that combine into running early is to force the vector ops
+; legalizer to run.  We achieve that using the ctpop.
+; PR23265
+define <4 x i16> @test_v4i16_post_reg_ld1lane_forced_narrow(i16* %bar, i16** %ptr, i64 %inc, <4 x i16> %A, <2 x i32>* %d) {
+; CHECK-LABEL: test_v4i16_post_reg_ld1lane_forced_narrow:
+; CHECK: ld1.h  { v0 }[1], [x0], x{{[0-9]+}}
+  %tmp1 = load i16, i16* %bar
+  %tmp2 = insertelement <4 x i16> %A, i16 %tmp1, i32 1
+  %tmp3 = getelementptr i16, i16* %bar, i64 %inc
+  store i16* %tmp3, i16** %ptr
+  %dl =  load <2 x i32>,  <2 x i32>* %d
+  %dr = call <2 x i32> @llvm.ctpop.v2i32(<2 x i32> %dl)
+  store <2 x i32> %dr, <2 x i32>* %d
+  ret <4 x i16> %tmp2
+}
+
+declare <2 x i32> @llvm.ctpop.v2i32(<2 x i32>)
+
+; CHECK-LABEL: test_ld1lane_build:
+; CHECK-DAG: ld1.s { [[REG0:v[0-9]+]] }[0], [x0]
+; CHECK-DAG: ld1.s { [[REG0:v[0-9]+]] }[1], [x1]
+; CHECK-DAG: ld1.s { [[REG1:v[0-9]+]] }[0], [x2]
+; CHECK-DAG: ld1.s { [[REG1:v[0-9]+]] }[1], [x3]
+; CHECK: sub.2s v[[REGNUM2:[0-9]+]], [[REG0]], [[REG1]]
+; CHECK-NEXT: str d[[REGNUM2]], [x4]
+; CHECK-NEXT: ret
+define void @test_ld1lane_build(i32* %ptr0, i32* %ptr1, i32* %ptr2, i32* %ptr3, <2 x i32>* %out) {
+  %load0 = load i32, i32* %ptr0, align 4
+  %load1 = load i32, i32* %ptr1, align 4
+  %vec0_0 = insertelement <2 x i32> undef, i32 %load0, i32 0
+  %vec0_1 = insertelement <2 x i32> %vec0_0, i32 %load1, i32 1
+
+  %load2 = load i32, i32* %ptr2, align 4
+  %load3 = load i32, i32* %ptr3, align 4
+  %vec1_0 = insertelement <2 x i32> undef, i32 %load2, i32 0
+  %vec1_1 = insertelement <2 x i32> %vec1_0, i32 %load3, i32 1
+
+  %sub = sub nsw <2 x i32> %vec0_1, %vec1_1
+  store <2 x i32> %sub, <2 x i32>* %out, align 16
+  ret void
+}