[FastISel][AArch64] Don't fold the 'and' instruction into the 'tbz/tbnz' instruction...

[oota-llvm.git] / test / Bitcode / atomic.ll

diff --git a/test/Bitcode/atomic.ll b/test/Bitcode/atomic.ll
index 37815a749b55f85027bef1d421b0b7e8a224f5cd..c09e74c1c2f24e047d38fcc3d16f404d2f6c4f13 100644 (file)
--- a/test/Bitcode/atomic.ll
+++ b/test/Bitcode/atomic.ll
@@ -1,4 +1,5 @@
 ; RUN: llvm-as %s -o - | llvm-dis | FileCheck %s
+; RUN: verify-uselistorder < %s
 
 define void @test_cmpxchg(i32* %addr, i32 %desired, i32 %new) {
   cmpxchg i32* %addr, i32 %desired, i32 %new seq_cst seq_cst
@@ -14,4 +15,4 @@ define void @test_cmpxchg(i32* %addr, i32 %desired, i32 %new) {
   ; CHECK: cmpxchg weak volatile i32* %addr, i32 %desired, i32 %new singlethread release monotonic
 
   ret void
-}
\ No newline at end of file
+}