#include "llvm/PassManager.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/Passes.h"
+#include "llvm/Support/FormattedStream.h"
#include "llvm/Target/TargetOptions.h"
#include "llvm/Target/TargetMachineRegistry.h"
using namespace llvm;
int X86TargetMachineModule = 0;
// Register the target.
+extern Target TheX86_32Target;
static RegisterTarget<X86_32TargetMachine>
-X("x86", " 32-bit X86: Pentium-Pro and above");
+X(TheX86_32Target, "x86", "32-bit X86: Pentium-Pro and above");
+
+extern Target TheX86_64Target;
static RegisterTarget<X86_64TargetMachine>
-Y("x86-64", " 64-bit X86: EM64T and AMD64");
+Y(TheX86_64Target, "x86-64", "64-bit X86: EM64T and AMD64");
+
+// Force static initialization.
+extern "C" void LLVMInitializeX86Target() {
+
+}
const TargetAsmInfo *X86TargetMachine::createTargetAsmInfo() const {
if (Subtarget.isFlavorIntel())
case X86Subtarget::isWindows:
return new X86WinTargetAsmInfo(*this);
default:
- return new X86TargetAsmInfo(*this);
+ return new X86GenericTargetAsmInfo(*this);
}
}
-unsigned X86_32TargetMachine::getJITMatchQuality() {
-#if defined(i386) || defined(__i386__) || defined(__x86__) || defined(_M_IX86)
- return 10;
-#endif
- return 0;
-}
-
-unsigned X86_64TargetMachine::getJITMatchQuality() {
-#if defined(__x86_64__) || defined(_M_AMD64)
- return 10;
-#endif
- return 0;
-}
-
-unsigned X86_32TargetMachine::getModuleMatchQuality(const Module &M) {
- // We strongly match "i[3-9]86-*".
- std::string TT = M.getTargetTriple();
- if (TT.size() >= 5 && TT[0] == 'i' && TT[2] == '8' && TT[3] == '6' &&
- TT[4] == '-' && TT[1] - '3' < 6)
- return 20;
- // If the target triple is something non-X86, we don't match.
- if (!TT.empty()) return 0;
-
- if (M.getEndianness() == Module::LittleEndian &&
- M.getPointerSize() == Module::Pointer32)
- return 10; // Weak match
- else if (M.getEndianness() != Module::AnyEndianness ||
- M.getPointerSize() != Module::AnyPointerSize)
- return 0; // Match for some other target
-
- return getJITMatchQuality()/2;
+X86_32TargetMachine::X86_32TargetMachine(const Target &T, const Module &M,
+ const std::string &FS)
+ : X86TargetMachine(T, M, FS, false) {
}
-unsigned X86_64TargetMachine::getModuleMatchQuality(const Module &M) {
- // We strongly match "x86_64-*".
- std::string TT = M.getTargetTriple();
- if (TT.size() >= 7 && TT[0] == 'x' && TT[1] == '8' && TT[2] == '6' &&
- TT[3] == '_' && TT[4] == '6' && TT[5] == '4' && TT[6] == '-')
- return 20;
-
- // We strongly match "amd64-*".
- if (TT.size() >= 6 && TT[0] == 'a' && TT[1] == 'm' && TT[2] == 'd' &&
- TT[3] == '6' && TT[4] == '4' && TT[5] == '-')
- return 20;
-
- // If the target triple is something non-X86-64, we don't match.
- if (!TT.empty()) return 0;
-
- if (M.getEndianness() == Module::LittleEndian &&
- M.getPointerSize() == Module::Pointer64)
- return 10; // Weak match
- else if (M.getEndianness() != Module::AnyEndianness ||
- M.getPointerSize() != Module::AnyPointerSize)
- return 0; // Match for some other target
-
- return getJITMatchQuality()/2;
-}
-X86_32TargetMachine::X86_32TargetMachine(const Module &M, const std::string &FS)
- : X86TargetMachine(M, FS, false) {
+X86_64TargetMachine::X86_64TargetMachine(const Target &T, const Module &M,
+ const std::string &FS)
+ : X86TargetMachine(T, M, FS, true) {
}
-
-X86_64TargetMachine::X86_64TargetMachine(const Module &M, const std::string &FS)
- : X86TargetMachine(M, FS, true) {
-}
-
-/// X86TargetMachine ctor - Create an ILP32 architecture model
+/// X86TargetMachine ctor - Create an X86 target.
///
-X86TargetMachine::X86TargetMachine(const Module &M, const std::string &FS,
- bool is64Bit)
- : Subtarget(M, FS, is64Bit),
+X86TargetMachine::X86TargetMachine(const Target &T, const Module &M,
+ const std::string &FS, bool is64Bit)
+ : LLVMTargetMachine(T),
+ Subtarget(M, FS, is64Bit),
DataLayout(Subtarget.getDataLayout()),
FrameInfo(TargetFrameInfo::StackGrowsDown,
Subtarget.getStackAlignment(), Subtarget.is64Bit() ? -8 : -4),
- InstrInfo(*this), JITInfo(*this), TLInfo(*this) {
+ InstrInfo(*this), JITInfo(*this), TLInfo(*this), ELFWriterInfo(*this) {
DefRelocModel = getRelocationModel();
- // FIXME: Correctly select PIC model for Win64 stuff
+
+ // If no relocation model was picked, default as appropriate for the target.
if (getRelocationModel() == Reloc::Default) {
- if (Subtarget.isTargetDarwin() ||
- (Subtarget.isTargetCygMing() && !Subtarget.isTargetWin64()))
- setRelocationModel(Reloc::DynamicNoPIC);
- else
+ if (!Subtarget.isTargetDarwin())
setRelocationModel(Reloc::Static);
+ else if (Subtarget.is64Bit())
+ setRelocationModel(Reloc::PIC_);
+ else
+ setRelocationModel(Reloc::DynamicNoPIC);
}
- if (Subtarget.is64Bit()) {
- // No DynamicNoPIC support under X86-64.
- if (getRelocationModel() == Reloc::DynamicNoPIC)
+
+ assert(getRelocationModel() != Reloc::Default &&
+ "Relocation mode not picked");
+
+ // If no code model is picked, default to small.
+ if (getCodeModel() == CodeModel::Default)
+ setCodeModel(CodeModel::Small);
+
+ // ELF and X86-64 don't have a distinct DynamicNoPIC model. DynamicNoPIC
+ // is defined as a model for code which may be used in static or dynamic
+ // executables but not necessarily a shared library. On X86-32 we just
+ // compile in -static mode, in x86-64 we use PIC.
+ if (getRelocationModel() == Reloc::DynamicNoPIC) {
+ if (is64Bit)
setRelocationModel(Reloc::PIC_);
- // Default X86-64 code model is small.
- if (getCodeModel() == CodeModel::Default)
- setCodeModel(CodeModel::Small);
+ else if (!Subtarget.isTargetDarwin())
+ setRelocationModel(Reloc::Static);
}
- if (Subtarget.isTargetCygMing())
- Subtarget.setPICStyle(PICStyle::WinPIC);
- else if (Subtarget.isTargetDarwin()) {
+ // If we are on Darwin, disallow static relocation model in X86-64 mode, since
+ // the Mach-O file format doesn't support it.
+ if (getRelocationModel() == Reloc::Static &&
+ Subtarget.isTargetDarwin() &&
+ is64Bit)
+ setRelocationModel(Reloc::PIC_);
+
+ // Determine the PICStyle based on the target selected.
+ if (getRelocationModel() == Reloc::Static) {
+ // Unless we're in PIC or DynamicNoPIC mode, set the PIC style to None.
+ Subtarget.setPICStyle(PICStyles::None);
+ } else if (Subtarget.isTargetCygMing()) {
+ Subtarget.setPICStyle(PICStyles::None);
+ } else if (Subtarget.isTargetDarwin()) {
if (Subtarget.is64Bit())
- Subtarget.setPICStyle(PICStyle::RIPRel);
- else
- Subtarget.setPICStyle(PICStyle::Stub);
+ Subtarget.setPICStyle(PICStyles::RIPRel);
+ else if (getRelocationModel() == Reloc::PIC_)
+ Subtarget.setPICStyle(PICStyles::StubPIC);
+ else {
+ assert(getRelocationModel() == Reloc::DynamicNoPIC);
+ Subtarget.setPICStyle(PICStyles::StubDynamicNoPIC);
+ }
} else if (Subtarget.isTargetELF()) {
if (Subtarget.is64Bit())
- Subtarget.setPICStyle(PICStyle::RIPRel);
+ Subtarget.setPICStyle(PICStyles::RIPRel);
else
- Subtarget.setPICStyle(PICStyle::GOT);
+ Subtarget.setPICStyle(PICStyles::GOT);
}
+
+ // Finally, if we have "none" as our PIC style, force to static mode.
+ if (Subtarget.getPICStyle() == PICStyles::None)
+ setRelocationModel(Reloc::Static);
}
//===----------------------------------------------------------------------===//
// Pass Pipeline Configuration
//===----------------------------------------------------------------------===//
-bool X86TargetMachine::addInstSelector(PassManagerBase &PM, bool Fast) {
+bool X86TargetMachine::addInstSelector(PassManagerBase &PM,
+ CodeGenOpt::Level OptLevel) {
// Install an instruction selector.
- PM.add(createX86ISelDag(*this, Fast));
+ PM.add(createX86ISelDag(*this, OptLevel));
+
+ // If we're using Fast-ISel, clean up the mess.
+ if (EnableFastISel)
+ PM.add(createDeadMachineInstructionElimPass());
+
+ // Install a pass to insert x87 FP_REG_KILL instructions, as needed.
+ PM.add(createX87FPRegKillInserterPass());
+
return false;
}
-bool X86TargetMachine::addPreRegAlloc(PassManagerBase &PM, bool Fast) {
+bool X86TargetMachine::addPreRegAlloc(PassManagerBase &PM,
+ CodeGenOpt::Level OptLevel) {
// Calculate and set max stack object alignment early, so we can decide
// whether we will need stack realignment (and thus FP).
PM.add(createX86MaxStackAlignmentCalculatorPass());
return false; // -print-machineinstr shouldn't print after this.
}
-bool X86TargetMachine::addPostRegAlloc(PassManagerBase &PM, bool Fast) {
+bool X86TargetMachine::addPostRegAlloc(PassManagerBase &PM,
+ CodeGenOpt::Level OptLevel) {
PM.add(createX86FloatingPointStackifierPass());
return true; // -print-machineinstr should print after this.
}
-bool X86TargetMachine::addAssemblyEmitter(PassManagerBase &PM, bool Fast,
- std::ostream &Out) {
- PM.add(createX86CodePrinterPass(Out, *this));
+bool X86TargetMachine::addAssemblyEmitter(PassManagerBase &PM,
+ CodeGenOpt::Level OptLevel,
+ bool Verbose,
+ formatted_raw_ostream &Out) {
+ FunctionPass *Printer = getTarget().createAsmPrinter(Out, *this, Verbose);
+ if (!Printer)
+ llvm_report_error("unable to create assembly printer");
+ PM.add(Printer);
return false;
}
-bool X86TargetMachine::addCodeEmitter(PassManagerBase &PM, bool Fast,
- bool DumpAsm, MachineCodeEmitter &MCE) {
+bool X86TargetMachine::addCodeEmitter(PassManagerBase &PM,
+ CodeGenOpt::Level OptLevel,
+ MachineCodeEmitter &MCE) {
// FIXME: Move this to TargetJITInfo!
- // Do not override 64-bit setting made in X86TargetMachine().
- if (DefRelocModel == Reloc::Default && !Subtarget.is64Bit())
+ // On Darwin, do not override 64-bit setting made in X86TargetMachine().
+ if (DefRelocModel == Reloc::Default &&
+ (!Subtarget.isTargetDarwin() || !Subtarget.is64Bit())) {
setRelocationModel(Reloc::Static);
+ Subtarget.setPICStyle(PICStyles::None);
+ }
// 64-bit JIT places everything in the same buffer except external functions.
- // Use small code model but hack the call instruction for externals.
- if (Subtarget.is64Bit())
- setCodeModel(CodeModel::Small);
+ // On Darwin, use small code model but hack the call instruction for
+ // externals. Elsewhere, do not assume globals are in the lower 4G.
+ if (Subtarget.is64Bit()) {
+ if (Subtarget.isTargetDarwin())
+ setCodeModel(CodeModel::Small);
+ else
+ setCodeModel(CodeModel::Large);
+ }
PM.add(createX86CodeEmitterPass(*this, MCE));
- if (DumpAsm)
- PM.add(createX86CodePrinterPass(*cerr.stream(), *this));
return false;
}
-bool X86TargetMachine::addSimpleCodeEmitter(PassManagerBase &PM, bool Fast,
- bool DumpAsm, MachineCodeEmitter &MCE) {
+bool X86TargetMachine::addCodeEmitter(PassManagerBase &PM,
+ CodeGenOpt::Level OptLevel,
+ JITCodeEmitter &JCE) {
+ // FIXME: Move this to TargetJITInfo!
+ // On Darwin, do not override 64-bit setting made in X86TargetMachine().
+ if (DefRelocModel == Reloc::Default &&
+ (!Subtarget.isTargetDarwin() || !Subtarget.is64Bit())) {
+ setRelocationModel(Reloc::Static);
+ Subtarget.setPICStyle(PICStyles::None);
+ }
+
+ // 64-bit JIT places everything in the same buffer except external functions.
+ // On Darwin, use small code model but hack the call instruction for
+ // externals. Elsewhere, do not assume globals are in the lower 4G.
+ if (Subtarget.is64Bit()) {
+ if (Subtarget.isTargetDarwin())
+ setCodeModel(CodeModel::Small);
+ else
+ setCodeModel(CodeModel::Large);
+ }
+
+ PM.add(createX86JITCodeEmitterPass(*this, JCE));
+
+ return false;
+}
+
+bool X86TargetMachine::addCodeEmitter(PassManagerBase &PM,
+ CodeGenOpt::Level OptLevel,
+ ObjectCodeEmitter &OCE) {
+ PM.add(createX86ObjectCodeEmitterPass(*this, OCE));
+ return false;
+}
+
+bool X86TargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
+ CodeGenOpt::Level OptLevel,
+ MachineCodeEmitter &MCE) {
PM.add(createX86CodeEmitterPass(*this, MCE));
- if (DumpAsm)
- PM.add(createX86CodePrinterPass(*cerr.stream(), *this));
+ return false;
+}
+
+bool X86TargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
+ CodeGenOpt::Level OptLevel,
+ JITCodeEmitter &JCE) {
+ PM.add(createX86JITCodeEmitterPass(*this, JCE));
+ return false;
+}
+
+bool X86TargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
+ CodeGenOpt::Level OptLevel,
+ ObjectCodeEmitter &OCE) {
+ PM.add(createX86ObjectCodeEmitterPass(*this, OCE));
return false;
}
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