//
// The LLVM Compiler Infrastructure
//
-// This file was developed by the LLVM research group and is distributed under
-// the University of Illinois Open Source License. See LICENSE.TXT for details.
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
//
//===----------------------------------------------------------------------===//
+#include "X86TargetAsmInfo.h"
#include "X86TargetMachine.h"
#include "X86.h"
#include "llvm/Module.h"
#include "llvm/Target/TargetOptions.h"
#include "llvm/Target/TargetMachineRegistry.h"
#include "llvm/Transforms/Scalar.h"
-#include "llvm/Support/CommandLine.h"
-#include "llvm/ADT/Statistic.h"
-#include <iostream>
using namespace llvm;
/// X86TargetMachineModule - Note that this is used on hosts that cannot link
int X86TargetMachineModule = 0;
namespace {
- cl::opt<bool> DisableOutput("disable-x86-llc-output", cl::Hidden,
- cl::desc("Disable the X86 asm printer, for use "
- "when profiling the code generator."));
// Register the target.
- RegisterTarget<X86TargetMachine> X("x86", " IA-32 (Pentium and above)");
+ RegisterTarget<X86_32TargetMachine>
+ X("x86", " 32-bit X86: Pentium-Pro and above");
+ RegisterTarget<X86_64TargetMachine>
+ Y("x86-64", " 64-bit X86: EM64T and AMD64");
}
-unsigned X86TargetMachine::getJITMatchQuality() {
+const TargetAsmInfo *X86TargetMachine::createTargetAsmInfo() const {
+ return new X86TargetAsmInfo(*this);
+}
+
+unsigned X86_32TargetMachine::getJITMatchQuality() {
#if defined(i386) || defined(__i386__) || defined(__x86__) || defined(_M_IX86)
return 10;
-#else
+#endif
return 0;
+}
+
+unsigned X86_64TargetMachine::getJITMatchQuality() {
+#if defined(__x86_64__)
+ return 10;
#endif
+ return 0;
}
-unsigned X86TargetMachine::getModuleMatchQuality(const Module &M) {
+unsigned X86_32TargetMachine::getModuleMatchQuality(const Module &M) {
// We strongly match "i[3-9]86-*".
std::string TT = M.getTargetTriple();
if (TT.size() >= 5 && TT[0] == 'i' && TT[2] == '8' && TT[3] == '6' &&
TT[4] == '-' && TT[1] - '3' < 6)
return 20;
+ // If the target triple is something non-X86, we don't match.
+ if (!TT.empty()) return 0;
if (M.getEndianness() == Module::LittleEndian &&
M.getPointerSize() == Module::Pointer32)
return getJITMatchQuality()/2;
}
-/// X86TargetMachine ctor - Create an ILP32 architecture model
-///
-X86TargetMachine::X86TargetMachine(const Module &M, const std::string &FS)
- : TargetMachine("X86"),
- Subtarget(M, FS),
- DataLayout("e-p:32:32-d:32-l:32"),
- FrameInfo(TargetFrameInfo::StackGrowsDown,
- Subtarget.getStackAlignment(), -4),
- InstrInfo(*this), JITInfo(*this), TLInfo(*this) {
- if (getRelocationModel() == Reloc::Default)
- if (Subtarget.isTargetDarwin())
- setRelocationModel(Reloc::DynamicNoPIC);
- else
- setRelocationModel(Reloc::PIC);
-}
-
-
-// addPassesToEmitFile - We currently use all of the same passes as the JIT
-// does to emit statically compiled machine code.
-bool X86TargetMachine::addPassesToEmitFile(PassManager &PM, std::ostream &Out,
- CodeGenFileType FileType,
- bool Fast) {
- if (FileType != TargetMachine::AssemblyFile &&
- FileType != TargetMachine::ObjectFile) return true;
-
- // Run loop strength reduction before anything else.
- PM.add(createLoopStrengthReducePass(&TLInfo));
-
- // FIXME: Implement efficient support for garbage collection intrinsics.
- PM.add(createLowerGCPass());
-
- // FIXME: Implement the invoke/unwind instructions!
- PM.add(createLowerInvokePass());
-
- // Make sure that no unreachable blocks are instruction selected.
- PM.add(createUnreachableBlockEliminationPass());
+unsigned X86_64TargetMachine::getModuleMatchQuality(const Module &M) {
+ // We strongly match "x86_64-*".
+ std::string TT = M.getTargetTriple();
+ if (TT.size() >= 7 && TT[0] == 'x' && TT[1] == '8' && TT[2] == '6' &&
+ TT[3] == '_' && TT[4] == '6' && TT[5] == '4' && TT[6] == '-')
+ return 20;
- // Install an instruction selector.
- PM.add(createX86ISelDag(*this));
+ // We strongly match "amd64-*".
+ if (TT.size() >= 6 && TT[0] == 'a' && TT[1] == 'm' && TT[2] == 'd' &&
+ TT[3] == '6' && TT[4] == '4' && TT[5] == '-')
+ return 20;
+
+ // If the target triple is something non-X86-64, we don't match.
+ if (!TT.empty()) return 0;
- // Print the instruction selected machine code...
- if (PrintMachineCode)
- PM.add(createMachineFunctionPrinterPass(&std::cerr));
+ if (M.getEndianness() == Module::LittleEndian &&
+ M.getPointerSize() == Module::Pointer64)
+ return 10; // Weak match
+ else if (M.getEndianness() != Module::AnyEndianness ||
+ M.getPointerSize() != Module::AnyPointerSize)
+ return 0; // Match for some other target
- // Perform register allocation to convert to a concrete x86 representation
- PM.add(createRegisterAllocator());
+ return getJITMatchQuality()/2;
+}
- if (PrintMachineCode)
- PM.add(createMachineFunctionPrinterPass(&std::cerr));
+X86_32TargetMachine::X86_32TargetMachine(const Module &M, const std::string &FS)
+ : X86TargetMachine(M, FS, false) {
+}
- PM.add(createX86FloatingPointStackifierPass());
- if (PrintMachineCode)
- PM.add(createMachineFunctionPrinterPass(&std::cerr));
-
- // Insert prolog/epilog code. Eliminate abstract frame index references...
- PM.add(createPrologEpilogCodeInserter());
-
- if (PrintMachineCode) // Print the register-allocated code
- PM.add(createX86CodePrinterPass(std::cerr, *this));
-
- if (!DisableOutput)
- switch (FileType) {
- default:
- assert(0 && "Unexpected filetype here!");
- case TargetMachine::AssemblyFile:
- PM.add(createX86CodePrinterPass(Out, *this));
- break;
- case TargetMachine::ObjectFile:
- // FIXME: We only support emission of ELF files for now, this should check
- // the target triple and decide on the format to write (e.g. COFF on
- // win32).
- addX86ELFObjectWriterPass(PM, Out, *this);
- break;
- }
-
- // Delete machine code for this function
- PM.add(createMachineCodeDeleter());
-
- return false; // success!
+X86_64TargetMachine::X86_64TargetMachine(const Module &M, const std::string &FS)
+ : X86TargetMachine(M, FS, true) {
}
-/// addPassesToJITCompile - Add passes to the specified pass manager to
-/// implement a fast dynamic compiler for this target. Return true if this is
-/// not supported for this target.
+/// X86TargetMachine ctor - Create an ILP32 architecture model
///
-void X86JITInfo::addPassesToJITCompile(FunctionPassManager &PM) {
- // The JIT should use static relocation model.
- TM.setRelocationModel(Reloc::Static);
-
- // Run loop strength reduction before anything else.
- PM.add(createLoopStrengthReducePass(TM.getTargetLowering()));
-
- // FIXME: Implement efficient support for garbage collection intrinsics.
- PM.add(createLowerGCPass());
-
- // FIXME: Implement the invoke/unwind instructions!
- PM.add(createLowerInvokePass());
+X86TargetMachine::X86TargetMachine(const Module &M, const std::string &FS,
+ bool is64Bit)
+ : Subtarget(M, FS, is64Bit),
+ DataLayout(Subtarget.getDataLayout()),
+ FrameInfo(TargetFrameInfo::StackGrowsDown,
+ Subtarget.getStackAlignment(), Subtarget.is64Bit() ? -8 : -4),
+ InstrInfo(*this), JITInfo(*this), TLInfo(*this) {
+ DefRelocModel = getRelocationModel();
+ if (getRelocationModel() == Reloc::Default)
+ if (Subtarget.isTargetDarwin() || Subtarget.isTargetCygMing())
+ setRelocationModel(Reloc::DynamicNoPIC);
+ else
+ setRelocationModel(Reloc::Static);
+ if (Subtarget.is64Bit()) {
+ // No DynamicNoPIC support under X86-64.
+ if (getRelocationModel() == Reloc::DynamicNoPIC)
+ setRelocationModel(Reloc::PIC_);
+ // Default X86-64 code model is small.
+ if (getCodeModel() == CodeModel::Default)
+ setCodeModel(CodeModel::Small);
+ }
+
+ if (Subtarget.isTargetCygMing())
+ Subtarget.setPICStyle(PICStyle::WinPIC);
+ else if (Subtarget.isTargetDarwin())
+ if (Subtarget.is64Bit())
+ Subtarget.setPICStyle(PICStyle::RIPRel);
+ else
+ Subtarget.setPICStyle(PICStyle::Stub);
+ else if (Subtarget.isTargetELF())
+ if (Subtarget.is64Bit())
+ Subtarget.setPICStyle(PICStyle::RIPRel);
+ else
+ Subtarget.setPICStyle(PICStyle::GOT);
+}
- // Make sure that no unreachable blocks are instruction selected.
- PM.add(createUnreachableBlockEliminationPass());
+//===----------------------------------------------------------------------===//
+// Pass Pipeline Configuration
+//===----------------------------------------------------------------------===//
+bool X86TargetMachine::addInstSelector(FunctionPassManager &PM, bool Fast) {
// Install an instruction selector.
- PM.add(createX86ISelDag(TM));
-
- // Print the instruction selected machine code...
- if (PrintMachineCode)
- PM.add(createMachineFunctionPrinterPass(&std::cerr));
-
- // Perform register allocation to convert to a concrete x86 representation
- PM.add(createRegisterAllocator());
-
- if (PrintMachineCode)
- PM.add(createMachineFunctionPrinterPass(&std::cerr));
+ PM.add(createX86ISelDag(*this, Fast));
+ return false;
+}
+bool X86TargetMachine::addPostRegAlloc(FunctionPassManager &PM, bool Fast) {
PM.add(createX86FloatingPointStackifierPass());
+ return true; // -print-machineinstr should print after this.
+}
- if (PrintMachineCode)
- PM.add(createMachineFunctionPrinterPass(&std::cerr));
+bool X86TargetMachine::addAssemblyEmitter(FunctionPassManager &PM, bool Fast,
+ std::ostream &Out) {
+ PM.add(createX86CodePrinterPass(Out, *this));
+ return false;
+}
- // Insert prolog/epilog code. Eliminate abstract frame index references...
- PM.add(createPrologEpilogCodeInserter());
+bool X86TargetMachine::addCodeEmitter(FunctionPassManager &PM, bool Fast,
+ bool DumpAsm, MachineCodeEmitter &MCE) {
+ // FIXME: Move this to TargetJITInfo!
+ if (DefRelocModel == Reloc::Default)
+ setRelocationModel(Reloc::Static);
+ Subtarget.setPICStyle(PICStyle::None);
+
+ // JIT cannot ensure globals are placed in the lower 4G of address.
+ if (Subtarget.is64Bit())
+ setCodeModel(CodeModel::Large);
+
+ PM.add(createX86CodeEmitterPass(*this, MCE));
+ if (DumpAsm)
+ PM.add(createX86CodePrinterPass(*cerr.stream(), *this));
- if (PrintMachineCode) // Print the register-allocated code
- PM.add(createX86CodePrinterPass(std::cerr, TM));
+ return false;
}
-bool X86TargetMachine::addPassesToEmitMachineCode(FunctionPassManager &PM,
- MachineCodeEmitter &MCE) {
- PM.add(createX86CodeEmitterPass(MCE));
- // Delete machine code for this function
- PM.add(createMachineCodeDeleter());
+bool X86TargetMachine::addSimpleCodeEmitter(FunctionPassManager &PM, bool Fast,
+ bool DumpAsm, MachineCodeEmitter &MCE) {
+ PM.add(createX86CodeEmitterPass(*this, MCE));
+ if (DumpAsm)
+ PM.add(createX86CodePrinterPass(*cerr.stream(), *this));
return false;
}
projects / oota-llvm.git / blobdiff