//
// The LLVM Compiler Infrastructure
//
-// This file was developed by the LLVM research group and is distributed under
-// the University of Illinois Open Source License. See LICENSE.TXT for details.
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
#define GETASMPREFIX(X) GETASMPREFIX2(X)
#define ASMPREFIX GETASMPREFIX(__USER_LABEL_PREFIX__)
+// Provide a convenient way for disabling usage of CFI directives.
+// This is needed for old/broken assemblers (for example, gas on
+// Darwin is pretty old and doesn't support these directives)
+#if defined(__APPLE__)
+# define CFI(x)
+#else
+// FIXME: Disable this until we really want to use it. Also, we will
+// need to add some workarounds for compilers, which support
+// only subset of these directives.
+# define CFI(x)
+#endif
+
// Provide a wrapper for X86CompilationCallback2 that saves non-traditional
// callee saved registers, for the fastcc calling convention.
extern "C" {
".align 8\n"
".globl " ASMPREFIX "X86CompilationCallback\n"
ASMPREFIX "X86CompilationCallback:\n"
+ CFI(".cfi_startproc\n")
// Save RBP
"pushq %rbp\n"
+ CFI(".cfi_def_cfa_offset 16\n")
+ CFI(".cfi_offset %rbp, -16\n")
// Save RSP
"movq %rsp, %rbp\n"
+ CFI(".cfi_def_cfa_register %rbp\n")
// Save all int arg registers
"pushq %rdi\n"
+ CFI(".cfi_rel_offset %rdi, 0\n")
"pushq %rsi\n"
+ CFI(".cfi_rel_offset %rsi, 8\n")
"pushq %rdx\n"
+ CFI(".cfi_rel_offset %rdx, 16\n")
"pushq %rcx\n"
+ CFI(".cfi_rel_offset %rcx, 24\n")
"pushq %r8\n"
+ CFI(".cfi_rel_offset %r8, 32\n")
"pushq %r9\n"
+ CFI(".cfi_rel_offset %r9, 40\n")
// Align stack on 16-byte boundary. ESP might not be properly aligned
// (8 byte) if this is called from an indirect stub.
"andq $-16, %rsp\n"
"movaps (%rsp), %xmm0\n"
// Restore RSP
"movq %rbp, %rsp\n"
+ CFI(".cfi_def_cfa_register %rsp\n")
// Restore all int arg registers
"subq $48, %rsp\n"
+ CFI(".cfi_adjust_cfa_offset 48\n")
"popq %r9\n"
+ CFI(".cfi_adjust_cfa_offset -8\n")
+ CFI(".cfi_restore %r9\n")
"popq %r8\n"
+ CFI(".cfi_adjust_cfa_offset -8\n")
+ CFI(".cfi_restore %r8\n")
"popq %rcx\n"
+ CFI(".cfi_adjust_cfa_offset -8\n")
+ CFI(".cfi_restore %rcx\n")
"popq %rdx\n"
+ CFI(".cfi_adjust_cfa_offset -8\n")
+ CFI(".cfi_restore %rdx\n")
"popq %rsi\n"
+ CFI(".cfi_adjust_cfa_offset -8\n")
+ CFI(".cfi_restore %rsi\n")
"popq %rdi\n"
+ CFI(".cfi_adjust_cfa_offset -8\n")
+ CFI(".cfi_restore %rdi\n")
// Restore RBP
"popq %rbp\n"
- "ret\n");
+ CFI(".cfi_adjust_cfa_offset -8\n")
+ CFI(".cfi_restore %rbp\n")
+ "ret\n"
+ CFI(".cfi_endproc\n")
+ );
#elif defined(__i386__) || defined(i386) || defined(_M_IX86)
#ifndef _MSC_VER
void X86CompilationCallback(void);
".align 8\n"
".globl " ASMPREFIX "X86CompilationCallback\n"
ASMPREFIX "X86CompilationCallback:\n"
+ CFI(".cfi_startproc\n")
"pushl %ebp\n"
+ CFI(".cfi_def_cfa_offset 8\n")
+ CFI(".cfi_offset %ebp, -8\n")
"movl %esp, %ebp\n" // Standard prologue
+ CFI(".cfi_def_cfa_register %ebp\n")
"pushl %eax\n"
+ CFI(".cfi_rel_offset %eax, 0\n")
"pushl %edx\n" // Save EAX/EDX/ECX
+ CFI(".cfi_rel_offset %edx, 4\n")
"pushl %ecx\n"
+ CFI(".cfi_rel_offset %ecx, 8\n")
#if defined(__APPLE__)
"andl $-16, %esp\n" // Align ESP on 16-byte boundary
#endif
"movl %ebp, (%esp)\n"
"call " ASMPREFIX "X86CompilationCallback2\n"
"movl %ebp, %esp\n" // Restore ESP
+ CFI(".cfi_def_cfa_register %esp\n")
"subl $12, %esp\n"
+ CFI(".cfi_adjust_cfa_offset 12\n")
"popl %ecx\n"
+ CFI(".cfi_adjust_cfa_offset -4\n")
+ CFI(".cfi_restore %ecx\n")
"popl %edx\n"
+ CFI(".cfi_adjust_cfa_offset -4\n")
+ CFI(".cfi_restore %edx\n")
"popl %eax\n"
+ CFI(".cfi_adjust_cfa_offset -4\n")
+ CFI(".cfi_restore %eax\n")
"popl %ebp\n"
- "ret\n");
+ CFI(".cfi_adjust_cfa_offset -4\n")
+ CFI(".cfi_restore %ebp\n")
+ "ret\n"
+ CFI(".cfi_endproc\n")
+ );
// Same as X86CompilationCallback but also saves XMM argument registers.
void X86CompilationCallback_SSE(void);
".align 8\n"
".globl " ASMPREFIX "X86CompilationCallback_SSE\n"
ASMPREFIX "X86CompilationCallback_SSE:\n"
+ CFI(".cfi_startproc\n")
"pushl %ebp\n"
+ CFI(".cfi_def_cfa_offset 8\n")
+ CFI(".cfi_offset %ebp, -8\n")
"movl %esp, %ebp\n" // Standard prologue
+ CFI(".cfi_def_cfa_register %ebp\n")
"pushl %eax\n"
+ CFI(".cfi_rel_offset %eax, 0\n")
"pushl %edx\n" // Save EAX/EDX/ECX
+ CFI(".cfi_rel_offset %edx, 4\n")
"pushl %ecx\n"
+ CFI(".cfi_rel_offset %ecx, 8\n")
"andl $-16, %esp\n" // Align ESP on 16-byte boundary
// Save all XMM arg registers
"subl $64, %esp\n"
+ // FIXME: provide frame move information for xmm registers.
+ // This can be tricky, because CFA register is ebp (unaligned)
+ // and we need to produce offsets relative to it.
"movaps %xmm0, (%esp)\n"
"movaps %xmm1, 16(%esp)\n"
"movaps %xmm2, 32(%esp)\n"
"call " ASMPREFIX "X86CompilationCallback2\n"
"addl $16, %esp\n"
"movaps 48(%esp), %xmm3\n"
+ CFI(".cfi_restore %xmm3\n")
"movaps 32(%esp), %xmm2\n"
+ CFI(".cfi_restore %xmm2\n")
"movaps 16(%esp), %xmm1\n"
+ CFI(".cfi_restore %xmm1\n")
"movaps (%esp), %xmm0\n"
+ CFI(".cfi_restore %xmm0\n")
"movl %ebp, %esp\n" // Restore ESP
+ CFI(".cfi_def_cfa_register esp\n")
"subl $12, %esp\n"
+ CFI(".cfi_adjust_cfa_offset 12\n")
"popl %ecx\n"
+ CFI(".cfi_adjust_cfa_offset -4\n")
+ CFI(".cfi_restore %ecx\n")
"popl %edx\n"
+ CFI(".cfi_adjust_cfa_offset -4\n")
+ CFI(".cfi_restore %edx\n")
"popl %eax\n"
+ CFI(".cfi_adjust_cfa_offset -4\n")
+ CFI(".cfi_restore %eax\n")
"popl %ebp\n"
- "ret\n");
+ CFI(".cfi_adjust_cfa_offset -4\n")
+ CFI(".cfi_restore %ebp\n")
+ "ret\n"
+ CFI(".cfi_endproc\n")
+ );
#else
void X86CompilationCallback2(void);
#ifdef _MSC_VER
extern "C" void X86CompilationCallback2() {
assert(sizeof(size_t) == 4); // FIXME: handle Win64
- unsigned *RetAddrLoc = (unsigned *)_AddressOfReturnAddress();
+ intptr_t *RetAddrLoc = (intptr_t *)_AddressOfReturnAddress();
RetAddrLoc += 4; // skip over ret addr, edx, eax, ecx
- unsigned RetAddr = *RetAddrLoc;
+ intptr_t RetAddr = *RetAddrLoc;
#else
extern "C" void X86CompilationCallback2(intptr_t *StackPtr, intptr_t RetAddr) {
intptr_t *RetAddrLoc = &StackPtr[1];
bool isStub = ((unsigned char*)RetAddr)[0] == 0xCD;
// The call instruction should have pushed the return value onto the stack...
+#ifdef __x86_64__
+ RetAddr--; // Backtrack to the reference itself...
+#else
RetAddr -= 4; // Backtrack to the reference itself...
+#endif
#if 0
DOUT << "In callback! Addr=" << (void*)RetAddr
#endif
// Sanity check to make sure this really is a call instruction.
+#ifdef __x86_64__
+ assert(((unsigned char*)RetAddr)[-2] == 0x41 &&"Not a call instr!");
+ assert(((unsigned char*)RetAddr)[-1] == 0xFF &&"Not a call instr!");
+#else
assert(((unsigned char*)RetAddr)[-1] == 0xE8 &&"Not a call instr!");
+#endif
intptr_t NewVal = (intptr_t)JITCompilerFunction((void*)RetAddr);
// Rewrite the call target... so that we don't end up here every time we
// execute the call.
- *(unsigned *)RetAddr = (unsigned)(NewVal-RetAddr-4);
+#ifdef __x86_64__
+ *(intptr_t *)(RetAddr - 0xa) = NewVal;
+#else
+ *(intptr_t *)RetAddr = (intptr_t)(NewVal-RetAddr-4);
+#endif
if (isStub) {
// If this is a stub, rewrite the call into an unconditional branch
// instruction so that two return addresses are not pushed onto the stack
// when the requested function finally gets called. This also makes the
// 0xCD byte (interrupt) dead, so the marker doesn't effect anything.
+#ifdef __x86_64__
+ ((unsigned char*)RetAddr)[0] = (2 | (4 << 3) | (3 << 6));
+#else
((unsigned char*)RetAddr)[-1] = 0xE9;
+#endif
}
// Change the return address to reexecute the call instruction...
+#ifdef __x86_64__
+ *RetAddrLoc -= 0xd;
+#else
*RetAddrLoc -= 5;
+#endif
}
TargetJITInfo::LazyResolverFn
bool NotCC = Fn != (void*)(intptr_t)X86CompilationCallback;
#endif
if (NotCC) {
+#ifdef __x86_64__
+ MCE.startFunctionStub(13, 4);
+ MCE.emitByte(0x49); // REX prefix
+ MCE.emitByte(0xB8+2); // movabsq r10
+ MCE.emitWordLE(((unsigned *)&Fn)[0]);
+ MCE.emitWordLE(((unsigned *)&Fn)[1]);
+ MCE.emitByte(0x41); // REX prefix
+ MCE.emitByte(0xFF); // jmpq *r10
+ MCE.emitByte(2 | (4 << 3) | (3 << 6));
+#else
MCE.startFunctionStub(5, 4);
MCE.emitByte(0xE9);
MCE.emitWordLE((intptr_t)Fn-MCE.getCurrentPCValue()-4);
+#endif
return MCE.finishFunctionStub(0);
}
+#ifdef __x86_64__
+ MCE.startFunctionStub(14, 4);
+ MCE.emitByte(0x49); // REX prefix
+ MCE.emitByte(0xB8+2); // movabsq r10
+ MCE.emitWordLE(((unsigned *)&Fn)[0]);
+ MCE.emitWordLE(((unsigned *)&Fn)[1]);
+ MCE.emitByte(0x41); // REX prefix
+ MCE.emitByte(0xFF); // callq *r10
+ MCE.emitByte(2 | (2 << 3) | (3 << 6));
+#else
MCE.startFunctionStub(6, 4);
MCE.emitByte(0xE8); // Call with 32 bit pc-rel destination...
MCE.emitWordLE((intptr_t)Fn-MCE.getCurrentPCValue()-4);
+#endif
MCE.emitByte(0xCD); // Interrupt - Just a marker identifying the stub!
return MCE.finishFunctionStub(0);
case X86::reloc_pcrel_word: {
// PC relative relocation, add the relocated value to the value already in
// memory, after we adjust it for where the PC is.
- ResultPtr = ResultPtr-(intptr_t)RelocPos-4-MR->getConstantVal();
+ ResultPtr = ResultPtr -(intptr_t)RelocPos - 4 - MR->getConstantVal();
+ *((unsigned*)RelocPos) += (unsigned)ResultPtr;
+ break;
+ }
+ case X86::reloc_picrel_word: {
+ // PIC base relative relocation, add the relocated value to the value
+ // already in memory, after we adjust it for where the PIC base is.
+ ResultPtr = ResultPtr - ((intptr_t)Function + MR->getConstantVal());
*((unsigned*)RelocPos) += (unsigned)ResultPtr;
break;
}
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