Move the LowerMEMCPY and LowerMEMCPYCall to a common place.

[oota-llvm.git] / lib / Target / X86 / X86ISelLowering.h

diff --git a/lib/Target/X86/X86ISelLowering.h b/lib/Target/X86/X86ISelLowering.h
index 658b34449d6a190a43e71c0440886b1b834d0b65..4f422a9aae17e3f52ae94a3da2658d98fa023dc2 100644 (file)
--- a/lib/Target/X86/X86ISelLowering.h
+++ b/lib/Target/X86/X86ISelLowering.h
@@ -181,7 +181,14 @@ namespace llvm {
       TLSADDR, THREAD_POINTER,
 
       // Exception Handling helpers
-      EH_RETURN
+      EH_RETURN,
+      
+      // tail call return 
+      //   oeprand #0 chain
+      //   operand #1 callee (register or absolute)
+      //   operand #2 stack adjustment
+      //   operand #3 optional in flag
+      TC_RETURN
     };
   }
 
@@ -285,6 +292,7 @@ namespace llvm {
     unsigned VarArgsFPOffset;         // X86-64 vararg func fp reg offset.
     int BytesToPopOnReturn;           // Number of arg bytes ret should pop.
     int BytesCallerReserves;          // Number of arg bytes caller makes.
+
   public:
     explicit X86TargetLowering(TargetMachine &TM);
 
@@ -351,6 +359,12 @@ namespace llvm {
     /// by AM is legal for this target, for a load/store of the specified type.
     virtual bool isLegalAddressingMode(const AddrMode &AM, const Type *Ty)const;
 
+    /// isTruncateFree - Return true if it's free to truncate a value of
+    /// type Ty1 to type Ty2. e.g. On x86 it's free to truncate a i32 value in
+    /// register EAX to i16 by referencing its sub-register AX.
+    virtual bool isTruncateFree(const Type *Ty1, const Type *Ty2) const;
+    virtual bool isTruncateFree(MVT::ValueType VT1, MVT::ValueType VT2) const;
+  
     /// isShuffleMaskLegal - Targets can use this to indicate that they only
     /// support *some* VECTOR_SHUFFLE operations, those with specific masks.
     /// By default, if a target supports the VECTOR_SHUFFLE node, all mask
@@ -364,6 +378,18 @@ namespace llvm {
     virtual bool isVectorClearMaskLegal(std::vector<SDOperand> &BVOps,
                                         MVT::ValueType EVT,
                                         SelectionDAG &DAG) const;
+    
+    /// IsEligibleForTailCallOptimization - Check whether the call is eligible
+    /// for tail call optimization. Target which want to do tail call
+    /// optimization should implement this function.
+    virtual bool IsEligibleForTailCallOptimization(SDOperand Call, 
+                                                   SDOperand Ret, 
+                                                   SelectionDAG &DAG) const;
+
+    virtual const TargetSubtarget* getSubtarget() {
+      return static_cast<const TargetSubtarget*>(Subtarget);
+    }
+
   private:
     /// Subtarget - Keep a pointer to the X86Subtarget around so that we can
     /// make the right decision when generating code for different targets.
@@ -372,7 +398,7 @@ namespace llvm {
 
     /// X86StackPtr - X86 physical register used as stack ptr.
     unsigned X86StackPtr;
-
+   
     /// X86ScalarSSEf32, X86ScalarSSEf64 - Select between SSE or x87 
     /// floating point ops.
     /// When SSE is available, use it for f32 operations.
@@ -402,6 +428,10 @@ namespace llvm {
     SDOperand LowerX86_64CCCArguments(SDOperand Op, SelectionDAG &DAG);
     SDOperand LowerX86_64CCCCallTo(SDOperand Op, SelectionDAG &DAG,unsigned CC);
 
+    // fast calling convention (tail call) implementation for 32/64bit
+    SDOperand LowerX86_TailCallTo(SDOperand Op, 
+                                      SelectionDAG & DAG, unsigned CC);
+    unsigned GetAlignedArgumentStackSize(unsigned StackSize, SelectionDAG &DAG);
     // Fast and FastCall Calling Convention implementation.
     SDOperand LowerFastCCArguments(SDOperand Op, SelectionDAG &DAG);
     SDOperand LowerFastCCCallTo(SDOperand Op, SelectionDAG &DAG, unsigned CC);
@@ -421,11 +451,13 @@ namespace llvm {
     SDOperand LowerFABS(SDOperand Op, SelectionDAG &DAG);
     SDOperand LowerFNEG(SDOperand Op, SelectionDAG &DAG);
     SDOperand LowerFCOPYSIGN(SDOperand Op, SelectionDAG &DAG);
-    SDOperand LowerSETCC(SDOperand Op, SelectionDAG &DAG, SDOperand Chain);
+    SDOperand LowerSETCC(SDOperand Op, SelectionDAG &DAG);
     SDOperand LowerSELECT(SDOperand Op, SelectionDAG &DAG);
     SDOperand LowerBRCOND(SDOperand Op, SelectionDAG &DAG);
     SDOperand LowerMEMSET(SDOperand Op, SelectionDAG &DAG);
-    SDOperand LowerMEMCPY(SDOperand Op, SelectionDAG &DAG);
+    SDOperand LowerMEMCPYInline(SDOperand Dest, SDOperand Source,
+                                SDOperand Chain, unsigned Size, unsigned Align,
+                                SelectionDAG &DAG);
     SDOperand LowerJumpTable(SDOperand Op, SelectionDAG &DAG);
     SDOperand LowerCALL(SDOperand Op, SelectionDAG &DAG);
     SDOperand LowerRET(SDOperand Op, SelectionDAG &DAG);