/// method to print assembly for each instruction.
///
bool X86ATTAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
- // if (forDarwin) {
- // Let PassManager know we need debug information and relay
- // the MachineDebugInfo address on to DwarfWriter.
- DW.SetDebugInfo(&getAnalysis<MachineDebugInfo>());
- // }
+ // Let PassManager know we need debug information and relay
+ // the MachineDebugInfo address on to DwarfWriter.
+ DW.SetDebugInfo(&getAnalysis<MachineDebugInfo>());
SetupMachineFunction(MF);
O << "\n\n";
switch (F->getLinkage()) {
default: assert(0 && "Unknown linkage type!");
case Function::InternalLinkage: // Symbols default to internal.
- SwitchSection(".text", F);
+ SwitchToTextSection(DefaultTextSection, F);
EmitAlignment(4, F); // FIXME: This should be parameterized somewhere.
break;
case Function::ExternalLinkage:
- SwitchSection(".text", F);
+ SwitchToTextSection(DefaultTextSection, F);
EmitAlignment(4, F); // FIXME: This should be parameterized somewhere.
O << "\t.globl\t" << CurrentFnName << "\n";
break;
case Function::WeakLinkage:
case Function::LinkOnceLinkage:
- if (forDarwin) {
- SwitchSection(".section __TEXT,__textcoal_nt,coalesced,pure_instructions",
- F);
+ if (Subtarget->TargetType == X86Subtarget::isDarwin) {
+ SwitchToTextSection(
+ ".section __TEXT,__textcoal_nt,coalesced,pure_instructions", F);
O << "\t.globl\t" << CurrentFnName << "\n";
O << "\t.weak_definition\t" << CurrentFnName << "\n";
+ } else if (Subtarget->TargetType == X86Subtarget::isCygwin) {
+ EmitAlignment(4, F); // FIXME: This should be parameterized somewhere.
+ O << "\t.section\t.llvm.linkonce.t." << CurrentFnName
+ << ",\"ax\"\n";
+ SwitchToTextSection("", F);
+ O << "\t.weak " << CurrentFnName << "\n";
} else {
EmitAlignment(4, F); // FIXME: This should be parameterized somewhere.
O << "\t.section\t.llvm.linkonce.t." << CurrentFnName
<< ",\"ax\",@progbits\n";
+ SwitchToTextSection("", F);
O << "\t.weak " << CurrentFnName << "\n";
}
break;
}
O << CurrentFnName << ":\n";
- if (forDarwin) {
+ if (Subtarget->TargetType == X86Subtarget::isDarwin) {
// Emit pre-function debug information.
DW.BeginFunction(&MF);
}
if (HasDotTypeDotSizeDirective)
O << "\t.size " << CurrentFnName << ", .-" << CurrentFnName << "\n";
- if (forDarwin) {
+ if (Subtarget->TargetType == X86Subtarget::isDarwin) {
// Emit post-function debug information.
DW.EndFunction();
}
const MachineOperand &MO = MI->getOperand(OpNo);
const MRegisterInfo &RI = *TM.getRegisterInfo();
switch (MO.getType()) {
- case MachineOperand::MO_VirtualRegister:
+ case MachineOperand::MO_Register: {
assert(MRegisterInfo::isPhysicalRegister(MO.getReg()) &&
"Virtual registers should not make it this far!");
O << '%';
- for (const char *Name = RI.get(MO.getReg()).Name; *Name; ++Name)
+ unsigned Reg = MO.getReg();
+ if (Modifier && strncmp(Modifier, "trunc", strlen("trunc")) == 0) {
+ MVT::ValueType VT = (strcmp(Modifier,"trunc16") == 0)
+ ? MVT::i16 : MVT::i8;
+ Reg = getX86SubSuperRegister(Reg, VT);
+ }
+ for (const char *Name = RI.get(Reg).Name; *Name; ++Name)
O << (char)tolower(*Name);
return;
+ }
case MachineOperand::MO_Immediate:
if (!Modifier || strcmp(Modifier, "debug") != 0)
if (!isMemOp) O << '$';
O << PrivateGlobalPrefix << "CPI" << getFunctionNumber() << "_"
<< MO.getConstantPoolIndex();
- if (forDarwin && TM.getRelocationModel() == Reloc::PIC)
+ if (Subtarget->TargetType == X86Subtarget::isDarwin &&
+ TM.getRelocationModel() == Reloc::PIC)
O << "-\"L" << getFunctionNumber() << "$pb\"";
int Offset = MO.getOffset();
if (Offset > 0)
bool isMemOp = Modifier && !strcmp(Modifier, "mem");
if (!isMemOp && !isCallOp) O << '$';
// Darwin block shameless ripped from PPCAsmPrinter.cpp
- if (forDarwin && TM.getRelocationModel() != Reloc::Static) {
+ if (Subtarget->TargetType == X86Subtarget::isDarwin &&
+ TM.getRelocationModel() != Reloc::Static) {
GlobalValue *GV = MO.getGlobal();
std::string Name = Mang->getValueName(GV);
// Link-once, External, or Weakly-linked global variables need
}
case MachineOperand::MO_ExternalSymbol: {
bool isCallOp = Modifier && !strcmp(Modifier, "call");
- if (isCallOp && forDarwin && TM.getRelocationModel() != Reloc::Static) {
+ if (isCallOp &&
+ Subtarget->TargetType == X86Subtarget::isDarwin &&
+ TM.getRelocationModel() != Reloc::Static) {
std::string Name(GlobalPrefix);
Name += MO.getSymbolName();
FnStubs.insert(Name);
const char Mode) {
const MRegisterInfo &RI = *TM.getRegisterInfo();
unsigned Reg = MO.getReg();
- const char *Name = RI.get(Reg).Name;
switch (Mode) {
default: return true; // Unknown mode.
case 'b': // Print QImode register
- switch (Reg) {
- default: return true;
- case X86::AH: case X86::AL: case X86::AX: case X86::EAX:
- Name = "al";
- break;
- case X86::DH: case X86::DL: case X86::DX: case X86::EDX:
- Name = "dl";
- break;
- case X86::CH: case X86::CL: case X86::CX: case X86::ECX:
- Name = "cl";
- break;
- case X86::BH: case X86::BL: case X86::BX: case X86::EBX:
- Name = "bl";
- break;
- case X86::ESI:
- Name = "sil";
- break;
- case X86::EDI:
- Name = "dil";
- break;
- case X86::EBP:
- Name = "bpl";
- break;
- case X86::ESP:
- Name = "spl";
- break;
- }
+ Reg = getX86SubSuperRegister(Reg, MVT::i8);
break;
case 'h': // Print QImode high register
- switch (Reg) {
- default: return true;
- case X86::AH: case X86::AL: case X86::AX: case X86::EAX:
- Name = "al";
- break;
- case X86::DH: case X86::DL: case X86::DX: case X86::EDX:
- Name = "dl";
- break;
- case X86::CH: case X86::CL: case X86::CX: case X86::ECX:
- Name = "cl";
- break;
- case X86::BH: case X86::BL: case X86::BX: case X86::EBX:
- Name = "bl";
- break;
- }
+ Reg = getX86SubSuperRegister(Reg, MVT::i8, true);
break;
case 'w': // Print HImode register
- switch (Reg) {
- default: return true;
- case X86::AH: case X86::AL: case X86::AX: case X86::EAX:
- Name = "ax";
- break;
- case X86::DH: case X86::DL: case X86::DX: case X86::EDX:
- Name = "dx";
- break;
- case X86::CH: case X86::CL: case X86::CX: case X86::ECX:
- Name = "cx";
- break;
- case X86::BH: case X86::BL: case X86::BX: case X86::EBX:
- Name = "bx";
- break;
- case X86::ESI:
- Name = "si";
- break;
- case X86::EDI:
- Name = "di";
- break;
- case X86::EBP:
- Name = "bp";
- break;
- case X86::ESP:
- Name = "sp";
- break;
- }
+ Reg = getX86SubSuperRegister(Reg, MVT::i16);
break;
case 'k': // Print SImode register
- switch (Reg) {
- default: return true;
- case X86::AH: case X86::AL: case X86::AX: case X86::EAX:
- Name = "eax";
- break;
- case X86::DH: case X86::DL: case X86::DX: case X86::EDX:
- Name = "edx";
- break;
- case X86::CH: case X86::CL: case X86::CX: case X86::ECX:
- Name = "ecx";
- break;
- case X86::BH: case X86::BL: case X86::BX: case X86::EBX:
- Name = "ebx";
- break;
- case X86::ESI:
- Name = "esi";
- break;
- case X86::EDI:
- Name = "edi";
- break;
- case X86::EBP:
- Name = "ebp";
- break;
- case X86::ESP:
- Name = "esp";
- break;
- }
+ Reg = getX86SubSuperRegister(Reg, MVT::i32);
break;
}
- O << '%' << Name;
+ O << '%';
+ for (const char *Name = RI.get(Reg).Name; *Name; ++Name)
+ O << (char)tolower(*Name);
return false;
}
void X86ATTAsmPrinter::printMachineInstruction(const MachineInstr *MI) {
++EmittedInsts;
// This works around some Darwin assembler bugs.
- if (forDarwin) {
+ if (Subtarget->TargetType == X86Subtarget::isDarwin) {
switch (MI->getOpcode()) {
case X86::REP_MOVSB:
O << "rep/movsb (%esi),(%edi)\n";
}
}
+ // See if a truncate instruction can be turned into a nop.
+ switch (MI->getOpcode()) {
+ default: break;
+ case X86::TRUNC_GR32_GR16:
+ case X86::TRUNC_GR32_GR8:
+ case X86::TRUNC_GR16_GR8: {
+ const MachineOperand &MO0 = MI->getOperand(0);
+ const MachineOperand &MO1 = MI->getOperand(1);
+ unsigned Reg0 = MO0.getReg();
+ unsigned Reg1 = MO1.getReg();
+ if (MI->getOpcode() == X86::TRUNC_GR32_GR16)
+ Reg1 = getX86SubSuperRegister(Reg1, MVT::i16);
+ else
+ Reg1 = getX86SubSuperRegister(Reg1, MVT::i8);
+ O << CommentString << " TRUNCATE ";
+ if (Reg0 != Reg1)
+ O << "\n\t";
+ break;
+ }
+ }
+
// Call the autogenerated instruction printer routines.
printInstruction(MI);
}
projects / oota-llvm.git / blobdiff