Added preliminary x86 subtarget support.

[oota-llvm.git] / lib / Target / X86 / X86.h

diff --git a/lib/Target/X86/X86.h b/lib/Target/X86/X86.h
index eec254cff2f6f33b0026fb63a265dd96d3b12957..ff109c94269ee9630f858139d2cb19fbe39398d3 100644 (file)
--- a/lib/Target/X86/X86.h
+++ b/lib/Target/X86/X86.h
@@ -1,5 +1,12 @@
 //===-- X86.h - Top-level interface for X86 representation ------*- C++ -*-===//
 //
+//                     The LLVM Compiler Infrastructure
+//
+// This file was developed by the LLVM research group and is distributed under
+// the University of Illinois Open Source License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
 // This file contains the entry points for global functions defined in the x86
 // target library, as used by the LLVM JIT.
 //
@@ -9,44 +16,68 @@
 #define TARGET_X86_H
 
 #include <iosfwd>
+
+namespace llvm {
+
 class TargetMachine;
-class Pass;
+class PassManager;
+class FunctionPass;
+class IntrinsicLowering;
+class MachineCodeEmitter;
 
-/// createX86SimpleInstructionSelector - This pass converts an LLVM function
-/// into a machine code representation in a very simple peep-hole fashion.  The
-/// generated code sucks but the implementation is nice and simple.
-///
-Pass *createX86SimpleInstructionSelector(TargetMachine &TM);
+enum X86VectorEnum {
+  AutoDetect, NoSSE, SSE, SSE2, SSE3
+};
 
-/// createX86PatternInstructionSelector - This pass converts an LLVM function
-/// into a machine code representation using pattern matching and a machine
+extern X86VectorEnum X86Vector;
+extern bool X86ScalarSSE;
+extern bool X86DAGIsel;
+
+/// createX86ISelPattern - This pass converts an LLVM function into a 
+/// machine code representation using pattern matching and a machine
 /// description file.
 ///
-Pass *createX86PatternInstructionSelector(TargetMachine &TM);
+FunctionPass *createX86ISelPattern(TargetMachine &TM);
+
+/// createX86ISelDag - This pass converts a legalized DAG into a 
+/// X86-specific DAG, ready for instruction scheduling.
+///
+FunctionPass *createX86ISelDag(TargetMachine &TM);
 
 /// createX86PeepholeOptimizer - Create a pass to perform X86 specific peephole
 /// optimizations.
 ///
-Pass *createX86PeepholeOptimizerPass();
+FunctionPass *createX86PeepholeOptimizerPass();
 
 /// createX86FloatingPointStackifierPass - This function returns a pass which
 /// converts floating point register references and pseudo instructions into
 /// floating point stack references and physical instructions.
 ///
-Pass *createX86FloatingPointStackifierPass();
+FunctionPass *createX86FloatingPointStackifierPass();
 
 /// createX86CodePrinterPass - Returns a pass that prints the X86
 /// assembly code for a MachineFunction to the given output stream,
-/// using the given target machine description.  This should work
-/// regardless of whether the function is in SSA form.
+/// using the given target machine description.
 ///
-Pass *createX86CodePrinterPass(std::ostream &o, TargetMachine &tm);
+FunctionPass *createX86CodePrinterPass(std::ostream &o, TargetMachine &tm);
+
+/// createX86CodeEmitterPass - Return a pass that emits the collected X86 code
+/// to the specified MCE object.
+FunctionPass *createX86CodeEmitterPass(MachineCodeEmitter &MCE);
 
-/// X86EmitCodeToMemory - This function converts a register allocated function
-/// into raw machine code in a dynamically allocated chunk of memory.  A pointer
-/// to the start of the function is returned.
+/// addX86ELFObjectWriterPass - Add passes to the FPM that output the generated
+/// code as an ELF object file.
 ///
-Pass *createEmitX86CodeToMemory();
+void addX86ELFObjectWriterPass(PassManager &FPM,
+                               std::ostream &o, TargetMachine &tm);
+
+/// createX86EmitCodeToMemory - Returns a pass that converts a register
+/// allocated function into raw machine code in a dynamically
+/// allocated chunk of memory.
+///
+FunctionPass *createEmitX86CodeToMemory();
+
+} // End llvm namespace
 
 // Defines symbolic names for X86 registers.  This defines a mapping from
 // register name to register number.