Added preliminary x86 subtarget support.

[oota-llvm.git] / lib / Target / X86 / X86.h

diff --git a/lib/Target/X86/X86.h b/lib/Target/X86/X86.h
index 35845fb0380add4b8a7abbdd925f4dd07033fed2..ff109c94269ee9630f858139d2cb19fbe39398d3 100644 (file)
--- a/lib/Target/X86/X86.h
+++ b/lib/Target/X86/X86.h
@@ -1,10 +1,10 @@
 //===-- X86.h - Top-level interface for X86 representation ------*- C++ -*-===//
-// 
+//
 //                     The LLVM Compiler Infrastructure
 //
 // This file was developed by the LLVM research group and is distributed under
 // the University of Illinois Open Source License. See LICENSE.TXT for details.
-// 
+//
 //===----------------------------------------------------------------------===//
 //
 // This file contains the entry points for global functions defined in the x86
@@ -20,36 +20,35 @@
 namespace llvm {
 
 class TargetMachine;
+class PassManager;
 class FunctionPass;
+class IntrinsicLowering;
+class MachineCodeEmitter;
 
-/// createX86SimpleInstructionSelector - This pass converts an LLVM function
-/// into a machine code representation in a very simple peep-hole fashion.  The
-/// generated code sucks but the implementation is nice and simple.
-///
-FunctionPass *createX86SimpleInstructionSelector(TargetMachine &TM);
+enum X86VectorEnum {
+  AutoDetect, NoSSE, SSE, SSE2, SSE3
+};
+
+extern X86VectorEnum X86Vector;
+extern bool X86ScalarSSE;
+extern bool X86DAGIsel;
 
-/// createX86PatternInstructionSelector - This pass converts an LLVM function
-/// into a machine code representation using pattern matching and a machine
+/// createX86ISelPattern - This pass converts an LLVM function into a 
+/// machine code representation using pattern matching and a machine
 /// description file.
 ///
-FunctionPass *createX86PatternInstructionSelector(TargetMachine &TM);
+FunctionPass *createX86ISelPattern(TargetMachine &TM);
 
-/// createX86SSAPeepholeOptimizerPass - Create a pass to perform SSA-based X86
-/// specific peephole optimizations.
+/// createX86ISelDag - This pass converts a legalized DAG into a 
+/// X86-specific DAG, ready for instruction scheduling.
 ///
-FunctionPass *createX86SSAPeepholeOptimizerPass();
+FunctionPass *createX86ISelDag(TargetMachine &TM);
 
 /// createX86PeepholeOptimizer - Create a pass to perform X86 specific peephole
 /// optimizations.
 ///
 FunctionPass *createX86PeepholeOptimizerPass();
 
-/// createX86FloatingPointKiller - This function returns a pass which
-/// kills every floating point register at the end of each basic block
-/// because our FloatingPointStackifier cannot handle them.
-///
-FunctionPass *createX86FloatingPointKillerPass();
-
 /// createX86FloatingPointStackifierPass - This function returns a pass which
 /// converts floating point register references and pseudo instructions into
 /// floating point stack references and physical instructions.
@@ -58,10 +57,19 @@ FunctionPass *createX86FloatingPointStackifierPass();
 
 /// createX86CodePrinterPass - Returns a pass that prints the X86
 /// assembly code for a MachineFunction to the given output stream,
-/// using the given target machine description.  This should work
-/// regardless of whether the function is in SSA form.
+/// using the given target machine description.
 ///
-FunctionPass *createX86CodePrinterPass(std::ostream &o,TargetMachine &tm);
+FunctionPass *createX86CodePrinterPass(std::ostream &o, TargetMachine &tm);
+
+/// createX86CodeEmitterPass - Return a pass that emits the collected X86 code
+/// to the specified MCE object.
+FunctionPass *createX86CodeEmitterPass(MachineCodeEmitter &MCE);
+
+/// addX86ELFObjectWriterPass - Add passes to the FPM that output the generated
+/// code as an ELF object file.
+///
+void addX86ELFObjectWriterPass(PassManager &FPM,
+                               std::ostream &o, TargetMachine &tm);
 
 /// createX86EmitCodeToMemory - Returns a pass that converts a register
 /// allocated function into raw machine code in a dynamically
@@ -69,11 +77,11 @@ FunctionPass *createX86CodePrinterPass(std::ostream &o,TargetMachine &tm);
 ///
 FunctionPass *createEmitX86CodeToMemory();
 
+} // End llvm namespace
+
 // Defines symbolic names for X86 registers.  This defines a mapping from
 // register name to register number.
 //
-} // End llvm namespace
-
 #include "X86GenRegisterNames.inc"
 
 // Defines symbolic names for the X86 instructions.