wire up 64-bit MCCodeEmitter.

[oota-llvm.git] / lib / Target / X86 / X86.h

diff --git a/lib/Target/X86/X86.h b/lib/Target/X86/X86.h
index ee152d41b378e047868190f3dd68dfc34dfe66e8..1d17a05d5b35320c54d74d98a3099025c3a7fe44 100644 (file)
--- a/lib/Target/X86/X86.h
+++ b/lib/Target/X86/X86.h
@@ -1,61 +1,75 @@
 //===-- X86.h - Top-level interface for X86 representation ------*- C++ -*-===//
 //
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
 // This file contains the entry points for global functions defined in the x86
 // target library, as used by the LLVM JIT.
 //
-// FIXME: This file will be dramatically changed in the future
-//
 //===----------------------------------------------------------------------===//
 
 #ifndef TARGET_X86_H
 #define TARGET_X86_H
 
-#include <iosfwd>
-class TargetMachine;
-class Pass;
+#include "llvm/Target/TargetMachine.h"
+
+namespace llvm {
+
+class X86TargetMachine;
+class FunctionPass;
+class MachineCodeEmitter;
+class MCCodeEmitter;
+class JITCodeEmitter;
+class Target;
+class formatted_raw_ostream;
 
-/// createSimpleX86InstructionSelector - This pass converts an LLVM function
-/// into a machine code representation is a very simple peep-hole fashion.  The
-/// generated code sucks but the implementation is nice and simple.
+/// createX86ISelDag - This pass converts a legalized DAG into a 
+/// X86-specific DAG, ready for instruction scheduling.
 ///
-Pass *createSimpleX86InstructionSelector(TargetMachine &TM);
+FunctionPass *createX86ISelDag(X86TargetMachine &TM,
+                               CodeGenOpt::Level OptLevel);
 
-/// createSimpleRegisterAllocation - This function converts the specified
-/// machine code function from SSA form to use explicit registers by spilling
-/// every register.  Wow, great policy huh?
+/// createX86FloatingPointStackifierPass - This function returns a pass which
+/// converts floating point register references and pseudo instructions into
+/// floating point stack references and physical instructions.
 ///
-Pass *createSimpleRegisterAllocator(TargetMachine &TM);
-Pass *createLocalRegisterAllocator(TargetMachine &TM);
+FunctionPass *createX86FloatingPointStackifierPass();
 
-/// createX86CodePrinterPass - Print out the specified machine code function to
-/// the specified stream.  This function should work regardless of whether or
-/// not the function is in SSA form or not.
+/// createX87FPRegKillInserterPass - This function returns a pass which
+/// inserts FP_REG_KILL instructions where needed.
 ///
-Pass *createX86CodePrinterPass(TargetMachine &TM, std::ostream &O);
+FunctionPass *createX87FPRegKillInserterPass();
 
-/// X86EmitCodeToMemory - This function converts a register allocated function
-/// into raw machine code in a dynamically allocated chunk of memory.  A pointer
-/// to the start of the function is returned.
+/// createX86CodeEmitterPass - Return a pass that emits the collected X86 code
+/// to the specified MCE object.
+FunctionPass *createX86JITCodeEmitterPass(X86TargetMachine &TM,
+                                          JITCodeEmitter &JCE);
+
+MCCodeEmitter *createHeinousX86MCCodeEmitter(const Target &, TargetMachine &TM);
+MCCodeEmitter *createX86_32MCCodeEmitter(const Target &, TargetMachine &TM);
+MCCodeEmitter *createX86_64MCCodeEmitter(const Target &, TargetMachine &TM);
+
+/// createX86EmitCodeToMemory - Returns a pass that converts a register
+/// allocated function into raw machine code in a dynamically
+/// allocated chunk of memory.
 ///
-Pass *createEmitX86CodeToMemory(TargetMachine &TM);
+FunctionPass *createEmitX86CodeToMemory();
+
+extern Target TheX86_32Target, TheX86_64Target;
+
+} // End llvm namespace
+
+// Defines symbolic names for X86 registers.  This defines a mapping from
+// register name to register number.
+//
+#include "X86GenRegisterNames.inc"
 
-// Put symbolic names in a namespace to avoid causing these to clash with all
-// kinds of other things...
+// Defines symbolic names for the X86 instructions.
 //
-namespace X86 {
-  // Defines a large number of symbolic names for X86 registers.  This defines a
-  // mapping from register name to register number.
-  //
-  enum Register {
-#define R(ENUM, NAME, FLAGS, TSFLAGS, ALIAS_SET) ENUM,
-#include "X86RegisterInfo.def"
-  };
-
-  // This defines a large number of symbolic names for X86 instruction opcodes.
-  enum Opcode {
-#define I(ENUM, NAME, BASEOPCODE, FLAGS, TSFLAGS, IMPDEFS, IMPUSES) ENUM,
-#include "X86InstrInfo.def"
-  };
-}
+#include "X86GenInstrNames.inc"
 
 #endif