wire up 64-bit MCCodeEmitter.

[oota-llvm.git] / lib / Target / X86 / X86.h

diff --git a/lib/Target/X86/X86.h b/lib/Target/X86/X86.h
index 7fcd0cfa9876bc7da31e14b1f519d4aef36ac557..1d17a05d5b35320c54d74d98a3099025c3a7fe44 100644 (file)
--- a/lib/Target/X86/X86.h
+++ b/lib/Target/X86/X86.h
@@ -2,8 +2,8 @@
 //
 //                     The LLVM Compiler Infrastructure
 //
-// This file was developed by the LLVM research group and is distributed under
-// the University of Illinois Open Source License. See LICENSE.TXT for details.
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
@@ -15,38 +15,23 @@
 #ifndef TARGET_X86_H
 #define TARGET_X86_H
 
-#include <iosfwd>
+#include "llvm/Target/TargetMachine.h"
 
 namespace llvm {
 
-class TargetMachine;
-class PassManager;
+class X86TargetMachine;
 class FunctionPass;
-class IntrinsicLowering;
 class MachineCodeEmitter;
-
-enum X86VectorEnum {
-  NoSSE, SSE, SSE2, SSE3
-};
-
-extern X86VectorEnum X86Vector;
-extern bool X86ScalarSSE;
-
-/// createX86ISelPattern - This pass converts an LLVM function into a 
-/// machine code representation using pattern matching and a machine
-/// description file.
-///
-FunctionPass *createX86ISelPattern(TargetMachine &TM);
+class MCCodeEmitter;
+class JITCodeEmitter;
+class Target;
+class formatted_raw_ostream;
 
 /// createX86ISelDag - This pass converts a legalized DAG into a 
 /// X86-specific DAG, ready for instruction scheduling.
 ///
-FunctionPass *createX86ISelDag(TargetMachine &TM);
-
-/// createX86PeepholeOptimizer - Create a pass to perform X86 specific peephole
-/// optimizations.
-///
-FunctionPass *createX86PeepholeOptimizerPass();
+FunctionPass *createX86ISelDag(X86TargetMachine &TM,
+                               CodeGenOpt::Level OptLevel);
 
 /// createX86FloatingPointStackifierPass - This function returns a pass which
 /// converts floating point register references and pseudo instructions into
@@ -54,21 +39,19 @@ FunctionPass *createX86PeepholeOptimizerPass();
 ///
 FunctionPass *createX86FloatingPointStackifierPass();
 
-/// createX86CodePrinterPass - Returns a pass that prints the X86
-/// assembly code for a MachineFunction to the given output stream,
-/// using the given target machine description.
+/// createX87FPRegKillInserterPass - This function returns a pass which
+/// inserts FP_REG_KILL instructions where needed.
 ///
-FunctionPass *createX86CodePrinterPass(std::ostream &o, TargetMachine &tm);
+FunctionPass *createX87FPRegKillInserterPass();
 
 /// createX86CodeEmitterPass - Return a pass that emits the collected X86 code
 /// to the specified MCE object.
-FunctionPass *createX86CodeEmitterPass(MachineCodeEmitter &MCE);
+FunctionPass *createX86JITCodeEmitterPass(X86TargetMachine &TM,
+                                          JITCodeEmitter &JCE);
 
-/// addX86ELFObjectWriterPass - Add passes to the FPM that output the generated
-/// code as an ELF object file.
-///
-void addX86ELFObjectWriterPass(PassManager &FPM,
-                               std::ostream &o, TargetMachine &tm);
+MCCodeEmitter *createHeinousX86MCCodeEmitter(const Target &, TargetMachine &TM);
+MCCodeEmitter *createX86_32MCCodeEmitter(const Target &, TargetMachine &TM);
+MCCodeEmitter *createX86_64MCCodeEmitter(const Target &, TargetMachine &TM);
 
 /// createX86EmitCodeToMemory - Returns a pass that converts a register
 /// allocated function into raw machine code in a dynamically
@@ -76,6 +59,8 @@ void addX86ELFObjectWriterPass(PassManager &FPM,
 ///
 FunctionPass *createEmitX86CodeToMemory();
 
+extern Target TheX86_32Target, TheX86_64Target;
+
 } // End llvm namespace
 
 // Defines symbolic names for X86 registers.  This defines a mapping from