namespace llvm {
class WebAssemblySubtarget final : public WebAssemblyGenSubtargetInfo {
- bool HasSIMD;
+ bool HasSIMD128;
/// String name of used CPU.
std::string CPUString;
const WebAssemblyTargetLowering *getTargetLowering() const override {
return &TLInfo;
}
+ const WebAssemblyInstrInfo *getInstrInfo() const override {
+ return &InstrInfo;
+ }
+ const WebAssemblyRegisterInfo *getRegisterInfo() const override {
+ return &getInstrInfo()->getRegisterInfo();
+ }
const Triple &getTargetTriple() const { return TargetTriple; }
bool enableMachineScheduler() const override;
- bool useAA() const override { return true; }
+ bool useAA() const override;
// Predicates used by WebAssemblyInstrInfo.td.
- bool hasSIMD() const { return HasSIMD; }
+ bool hasAddr64() const { return TargetTriple.isArch64Bit(); }
+ bool hasSIMD128() const { return HasSIMD128; }
/// Parses features string setting specified subtarget options. Definition of
/// function is auto generated by tblgen.