//===----------------------------------------------------------------------===//
#include "InstPrinter/WebAssemblyInstPrinter.h"
+#include "MCTargetDesc/WebAssemblyMCTargetDesc.h"
#include "WebAssembly.h"
#include "WebAssemblyMachineFunctionInfo.h"
-#include "MCTargetDesc/WebAssemblyMCTargetDesc.h"
#include "llvm/MC/MCExpr.h"
#include "llvm/MC/MCInst.h"
#include "llvm/MC/MCInstrInfo.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/FormattedStream.h"
#include "llvm/Target/TargetRegisterInfo.h"
-#include <cctype>
using namespace llvm;
#define DEBUG_TYPE "asm-printer"
void WebAssemblyInstPrinter::printInst(const MCInst *MI, raw_ostream &OS,
StringRef Annot,
- const MCSubtargetInfo &STI) {
+ const MCSubtargetInfo & /*STI*/) {
+ // Print the instruction (this uses the AsmStrings from the .td files).
printInstruction(MI, OS);
+ // Print any additional variadic operands.
const MCInstrDesc &Desc = MII.get(MI->getOpcode());
if (Desc.isVariadic())
- for (unsigned i = Desc.getNumOperands(), e = MI->getNumOperands(); i < e;
- ++i) {
+ for (auto i = Desc.getNumOperands(), e = MI->getNumOperands(); i < e; ++i) {
if (i != 0)
OS << ", ";
printOperand(MI, i, OS);
}
+ // Print any added annotation.
printAnnotation(OS, Annot);
}
raw_ostream &O) {
const MCOperand &Op = MI->getOperand(OpNo);
if (Op.isReg()) {
+ assert((OpNo < MII.get(MI->getOpcode()).getNumOperands() ||
+ MII.get(MI->getOpcode()).TSFlags == 0) &&
+ "WebAssembly variable_ops register ops don't use TSFlags");
unsigned WAReg = Op.getReg();
if (int(WAReg) >= 0)
printRegName(O, WAReg);
O << "$push" << (WAReg & INT32_MAX);
else
O << "$discard";
+ // Add a '=' suffix if this is a def.
+ if (OpNo < MII.get(MI->getOpcode()).getNumDefs())
+ O << '=';
} else if (Op.isImm()) {
- switch (MI->getOpcode()) {
- case WebAssembly::PARAM:
- case WebAssembly::RESULT:
- case WebAssembly::LOCAL:
- switch (Op.getImm()) {
- case MVT::i32: O << "i32"; break;
- case MVT::i64: O << "i64"; break;
- case MVT::f32: O << "f32"; break;
- case MVT::f64: O << "f64"; break;
- default: llvm_unreachable("unexpected type");
- }
- break;
- default:
+ assert((OpNo < MII.get(MI->getOpcode()).getNumOperands() ||
+ (MII.get(MI->getOpcode()).TSFlags &
+ WebAssemblyII::VariableOpIsImmediate)) &&
+ "WebAssemblyII::VariableOpIsImmediate should be set for "
+ "variable_ops immediate ops");
+ if (MII.get(MI->getOpcode()).TSFlags &
+ WebAssemblyII::VariableOpImmediateIsType)
+ // The immediates represent types.
+ O << WebAssembly::TypeToString(MVT::SimpleValueType(Op.getImm()));
+ else
O << Op.getImm();
- break;
- }
- } else if (Op.isFPImm())
+ } else if (Op.isFPImm()) {
+ assert((OpNo < MII.get(MI->getOpcode()).getNumOperands() ||
+ MII.get(MI->getOpcode()).TSFlags == 0) &&
+ "WebAssembly variable_ops floating point ops don't use TSFlags");
O << toString(APFloat(Op.getFPImm()));
- else {
+ } else {
+ assert((OpNo < MII.get(MI->getOpcode()).getNumOperands() ||
+ (MII.get(MI->getOpcode()).TSFlags &
+ WebAssemblyII::VariableOpIsImmediate)) &&
+ "WebAssemblyII::VariableOpIsImmediate should be set for "
+ "variable_ops expr ops");
assert(Op.isExpr() && "unknown operand kind in printOperand");
Op.getExpr()->print(O, &MAI);
}
}
+
+const char *llvm::WebAssembly::TypeToString(MVT Ty) {
+ switch (Ty.SimpleTy) {
+ case MVT::i32:
+ return "i32";
+ case MVT::i64:
+ return "i64";
+ case MVT::f32:
+ return "f32";
+ case MVT::f64:
+ return "f64";
+ default:
+ llvm_unreachable("unsupported type");
+ }
+}