MachineInstr::getOpCode() --> getOpcode() in SPARC back-end.

[oota-llvm.git] / lib / Target / SparcV9 / SparcV9PeepholeOpts.cpp

diff --git a/lib/Target/SparcV9/SparcV9PeepholeOpts.cpp b/lib/Target/SparcV9/SparcV9PeepholeOpts.cpp
index 2b22558e6dc2c536f5379f9464106bc7291d6d3b..60c7bcbd0c4b0dd71582a38ce87f3f12a94dcea2 100644 (file)
--- a/lib/Target/SparcV9/SparcV9PeepholeOpts.cpp
+++ b/lib/Target/SparcV9/SparcV9PeepholeOpts.cpp
@@ -13,12 +13,14 @@
 //===----------------------------------------------------------------------===//
 
 #include "SparcInternals.h"
+#include "llvm/BasicBlock.h"
+#include "llvm/Pass.h"
 #include "llvm/CodeGen/MachineFunction.h"
 #include "llvm/CodeGen/MachineInstr.h"
-#include "llvm/Target/TargetMachine.h"
 #include "llvm/Target/TargetInstrInfo.h"
-#include "llvm/BasicBlock.h"
-#include "llvm/Pass.h"
+#include "llvm/Target/TargetMachine.h"
+
+namespace llvm {
 
 //************************* Internal Functions *****************************/
 
@@ -30,7 +32,7 @@ DeleteInstruction(MachineBasicBlock& mvec,
   if (BBI != mvec.begin()) {
       const TargetInstrInfo& mii = target.getInstrInfo();
       MachineInstr* predMI = *(BBI-1);
-      if (unsigned ndelay = mii.getNumDelaySlots(predMI->getOpCode())) {
+      if (unsigned ndelay = mii.getNumDelaySlots(predMI->getOpcode())) {
         // This instruction is in a delay slot of its predecessor, so
         // replace it with a nop. By replacing in place, we save having
         // to update the I-I maps.
@@ -59,11 +61,12 @@ DeleteInstruction(MachineBasicBlock& mvec,
 //----------------------------------------------------------------------------
 
 static bool IsUselessCopy(const TargetMachine &target, const MachineInstr* MI) {
-  if (MI->getOpCode() == V9::FMOVS || MI->getOpCode() == V9::FMOVD) {
-    return (/* both operands are allocated to the same register */
+  if (MI->getOpcode() == V9::FMOVS || MI->getOpcode() == V9::FMOVD) {
+    return (// both operands are allocated to the same register
             MI->getOperand(0).getAllocatedRegNum() == 
             MI->getOperand(1).getAllocatedRegNum());
-  } else if (MI->getOpCode() == V9::ADDr || MI->getOpCode() == V9::ORr) {
+  } else if (MI->getOpcode() == V9::ADDr || MI->getOpcode() == V9::ORr ||
+             MI->getOpcode() == V9::ADDi || MI->getOpcode() == V9::ORi) {
     unsigned srcWithDestReg;
     
     for (srcWithDestReg = 0; srcWithDestReg < 2; ++srcWithDestReg)
@@ -75,14 +78,14 @@ static bool IsUselessCopy(const TargetMachine &target, const MachineInstr* MI) {
     if (srcWithDestReg == 2)
       return false;
     else {
-      /* else source and dest are allocated to the same register */
+      // else source and dest are allocated to the same register
       unsigned otherOp = 1 - srcWithDestReg;
-      return (/* either operand otherOp is register %g0 */
+      return (// either operand otherOp is register %g0
               (MI->getOperand(otherOp).hasAllocatedReg() &&
                MI->getOperand(otherOp).getAllocatedRegNum() ==
                target.getRegInfo().getZeroRegNum()) ||
               
-              /* or operand otherOp == 0 */
+              // or operand otherOp == 0
               (MI->getOperand(otherOp).getType()
                == MachineOperand::MO_SignExtendedImmed &&
                MI->getOperand(otherOp).getImmedValue() == 0));
@@ -111,9 +114,14 @@ class PeepholeOpts: public BasicBlockPass {
   bool visit(MachineBasicBlock& mvec,
              MachineBasicBlock::iterator BBI) const;
 public:
-  PeepholeOpts(const TargetMachine &T): target(T) { }
+  PeepholeOpts(const TargetMachine &TM): target(TM) { }
   bool runOnBasicBlock(BasicBlock &BB); // apply this pass to each BB
   virtual const char *getPassName() const { return "Peephole Optimization"; }
+
+  // getAnalysisUsage - this pass preserves the CFG
+  void getAnalysisUsage(AnalysisUsage &AU) const {
+    AU.setPreservesCFG();
+  }
 };
 
 // Apply a list of peephole optimizations to this machine instruction
@@ -122,7 +130,7 @@ public:
 //
 bool PeepholeOpts::visit(MachineBasicBlock& mvec,
                          MachineBasicBlock::iterator BBI) const {
-  /* Remove redundant copy instructions */
+  // Remove redundant copy instructions
   return RemoveUselessCopies(mvec, BBI, target);
 }
 
@@ -154,11 +162,10 @@ bool PeepholeOpts::runOnBasicBlock(BasicBlock &BB) {
   return true;
 }
 
-
-//===----------------------------------------------------------------------===//
-// createPeepholeOptsPass - Public entrypoint for peephole optimization
-// and this file as a whole...
-//
-FunctionPass* createPeepholeOptsPass(TargetMachine &T) {
-  return new PeepholeOpts(T);
+/// createPeepholeOptsPass - Public entry point for peephole optimization
+///
+FunctionPass* createPeepholeOptsPass(const TargetMachine &TM) {
+  return new PeepholeOpts(TM);
 }
+
+} // End llvm namespace